A set a scripts to take a design in Verilog and convert it to a factorio blueprint.
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  1. ls * | ~/src/eradman-entr-c15b0be493fc/entr sh -c '~/github/yosys/yosys -s script.ys'
  2. python -c 'import sys; import pprint; import json; import zlib; pprint.pprint(json.loads(zlib.decompress(sys.stdin.read()[1:].decode("base64"))))'