From 15cac288193cde17665977a8519a102b660f528b Mon Sep 17 00:00:00 2001
From: John-Mark Gurney <jmg@funkthat.com>
Date: Thu, 24 Mar 2022 18:10:51 -0700
Subject: [PATCH] add a header that implement cycle counting for some arm
 cortex-m cores..

---
 stm32/cycle.h | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 stm32/cycle.h

diff --git a/stm32/cycle.h b/stm32/cycle.h
new file mode 100644
index 0000000..f32f2a4
--- /dev/null
+++ b/stm32/cycle.h
@@ -0,0 +1,38 @@
+/* From: https://stackoverflow.com/questions/32610019/arm-m4-instructions-per-cycle-ipc-counters */
+/* minor formating + type fixes */
+
+volatile unsigned int *DWT_CYCCNT  ;
+volatile unsigned int *DWT_CONTROL ;
+volatile unsigned int *SCB_DEMCR   ;
+
+static void
+reset_timer()
+{
+
+    DWT_CYCCNT   = (unsigned int *)0xE0001004; //address of the register
+    DWT_CONTROL  = (unsigned int *)0xE0001000; //address of the register
+    SCB_DEMCR    = (unsigned int *)0xE000EDFC; //address of the register
+    *SCB_DEMCR   = *SCB_DEMCR | 0x01000000;
+    *DWT_CYCCNT  = 0; // reset the counter
+    *DWT_CONTROL = 0; 
+}
+
+static void start_timer()
+{
+
+    *DWT_CONTROL = *DWT_CONTROL | 1 ; // enable the counter
+}
+
+static void
+stop_timer()
+{
+
+    *DWT_CONTROL = *DWT_CONTROL | 0 ; // disable the counter    
+}
+
+static unsigned int
+getCycles()
+{
+
+    return *DWT_CYCCNT;
+}