diff --git a/hal_generic.c b/hal_generic.c
new file mode 100644
index 0000000..5b07228
--- /dev/null
+++ b/hal_generic.c
@@ -0,0 +1,10 @@
+#include <stm32f1xx_hal.h>
+
+void
+SysTick_Handler(void)
+{
+
+	HAL_IncTick();
+
+	HAL_SYSTICK_IRQHandler();
+}
diff --git a/mk/boards.mk b/mk/boards.mk
index a1ce6b8..2fb4802 100644
--- a/mk/boards.mk
+++ b/mk/boards.mk
@@ -12,6 +12,8 @@ ARMCC?= arm-none-eabi-gcc
 #ARMCC?=clang-mp-9.0
 #ARMTARGET?= -nostdlib -ffreestanding -target arm-none-eabi -mcpu=cortex-m3 -mfloat-abi=soft  -mthumb
 
+CFLAGS+= -Wall -Werror
+
 .include <$(.PARSEDIR)/mu.opts.mk>
 
 .if ${MK_SYSINIT} == "yes"
@@ -50,6 +52,7 @@ ARMTARGET?= -mcpu=cortex-m3 -mthumb
 LINKER_SCRIPT=$(STM32)/f103c8t6/STM32F103C8T6_FLASH.ld
 
 SRCS+=				\
+	hal_generic.c		\
 	startup_stm32f103xb.s	\
 	stm32f1xx_hal.c		\
 	stm32f1xx_hal_cortex.c	\
@@ -109,6 +112,7 @@ CFLAGS+= -DSTM32L151xC
 .if ${MK_USB_CDC} == "yes"
 .PATH: $(STM32)/usb
 SRCS+=				\
+	si_usb.c		\
 	usb_device.c		\
 	usbd_cdc.c		\
 	usbd_cdc_if.c		\
diff --git a/rs485hid/rs485gw.c b/rs485hid/rs485gw.c
index accecce..102c8c4 100644
--- a/rs485hid/rs485gw.c
+++ b/rs485hid/rs485gw.c
@@ -37,7 +37,7 @@
 SYSINIT(hal_init, SI_SUB_HAL, SI_ORDER_FIRST, (void (*)(const void *))HAL_Init, NULL);
 
 static void
-clkenable(const void *none)
+c13led(const void *none)
 {
 	GPIO_InitTypeDef GPIO_InitStruct;
 
@@ -54,8 +54,12 @@ clkenable(const void *none)
 
 	HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
 }
-SYSINIT(clkenable, SI_SUB_HAL, SI_ORDER_SECOND, clkenable, NULL);
+SYSINIT(c13led, SI_SUB_HAL, SI_ORDER_SECOND, c13led, NULL);
 
+/*
+ * Referenced from:
+ * Projects/STM32F103RB-Nucleo/Applications/USB_Device/HID_Standalone/Src/main.c
+ */
 static void
 oscconfig(const void *none)
 {
@@ -63,7 +67,6 @@ oscconfig(const void *none)
 	RCC_OscInitTypeDef oscinitstruct;
 	RCC_PeriphCLKInitTypeDef rccperiphclkinit;
 
-
 	__HAL_RCC_PWR_CLK_ENABLE();
 
 	oscinitstruct = (RCC_OscInitTypeDef){
@@ -78,18 +81,6 @@ oscconfig(const void *none)
 
 	HAL_RCC_OscConfig(&oscinitstruct);
 
-  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-   * clocks dividers */
-  clkinitstruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
-                            RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-
-  clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
-  clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
-  HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2);
-
-
 	/* USB clock selection */
 	rccperiphclkinit = (RCC_PeriphCLKInitTypeDef){
 		.PeriphClockSelection = RCC_PERIPHCLK_USB,
@@ -255,12 +246,19 @@ int
 main(void)
 {
 
-	//debug_printf("starting...\n");
-
-	//clkenable(NULL);
 	sysinit_run();
 
-	//Radio.Init(&revents);
+	//debug_printf("starting...\n");
+
+#if 1
+	int i;
+	for (i = 0; i < 5; i++) {
+		HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_SET);
+		HAL_Delay(250);
+		HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
+		HAL_Delay(250);
+	}
+#endif
 
 	setlinebuf(vcp_usb);
 
@@ -277,8 +275,6 @@ main(void)
 
 #endif
 
-	uint32_t v;
-
 	char inpbuf[1024];
 	char *lastcheck;
 	char *endchr;
diff --git a/si_usb.c b/si_usb.c
new file mode 100644
index 0000000..bf2a231
--- /dev/null
+++ b/si_usb.c
@@ -0,0 +1,28 @@
+/*
+ * Code for initalizing USB CDC via the SYSINIT mechanism.
+ */
+
+#include <sysinit.h>
+
+#include <usb_device.h>
+
+#if 1
+static void
+usb_cdc_init(const void *foo)
+{
+
+	MX_USB_DEVICE_Init();
+}
+
+extern PCD_HandleTypeDef hpcd_USB_FS;
+
+
+void
+USB_LP_IRQHandler(void)
+{
+
+	HAL_PCD_IRQHandler(&hpcd_USB_FS);
+}
+
+SYSINIT(abkdkd, SI_SUB_CONSOLE, SI_ORDER_FIRST, usb_cdc_init, NULL);
+#endif