Implement a secure ICS protocol targeting LoRa Node151 microcontroller for controlling irrigation.
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  1. /*
  2. / _____) _ | |
  3. ( (____ _____ ____ _| |_ _____ ____| |__
  4. \____ \| ___ | (_ _) ___ |/ ___) _ \
  5. _____) ) ____| | | || |_| ____( (___| | | |
  6. (______/|_____)_|_|_| \__)_____)\____)_| |_|
  7. (C) 2014 Semtech
  8. Description: SX1276 FSK modem registers and bits definitions
  9. License: Revised BSD License, see LICENSE.TXT file include in the project
  10. Maintainer: Miguel Luis and Gregory Cristian
  11. */
  12. #ifndef __SX1276_REGS_FSK_H__
  13. #define __SX1276_REGS_FSK_H__
  14. /*!
  15. * ============================================================================
  16. * SX1276 Internal registers Address
  17. * ============================================================================
  18. */
  19. #define REG_FIFO 0x00
  20. // Common settings
  21. #define REG_OPMODE 0x01
  22. #define REG_BITRATEMSB 0x02
  23. #define REG_BITRATELSB 0x03
  24. #define REG_FDEVMSB 0x04
  25. #define REG_FDEVLSB 0x05
  26. #define REG_FRFMSB 0x06
  27. #define REG_FRFMID 0x07
  28. #define REG_FRFLSB 0x08
  29. // Tx settings
  30. #define REG_PACONFIG 0x09
  31. #define REG_PARAMP 0x0A
  32. #define REG_OCP 0x0B
  33. // Rx settings
  34. #define REG_LNA 0x0C
  35. #define REG_RXCONFIG 0x0D
  36. #define REG_RSSICONFIG 0x0E
  37. #define REG_RSSICOLLISION 0x0F
  38. #define REG_RSSITHRESH 0x10
  39. #define REG_RSSIVALUE 0x11
  40. #define REG_RXBW 0x12
  41. #define REG_AFCBW 0x13
  42. #define REG_OOKPEAK 0x14
  43. #define REG_OOKFIX 0x15
  44. #define REG_OOKAVG 0x16
  45. #define REG_RES17 0x17
  46. #define REG_RES18 0x18
  47. #define REG_RES19 0x19
  48. #define REG_AFCFEI 0x1A
  49. #define REG_AFCMSB 0x1B
  50. #define REG_AFCLSB 0x1C
  51. #define REG_FEIMSB 0x1D
  52. #define REG_FEILSB 0x1E
  53. #define REG_PREAMBLEDETECT 0x1F
  54. #define REG_RXTIMEOUT1 0x20
  55. #define REG_RXTIMEOUT2 0x21
  56. #define REG_RXTIMEOUT3 0x22
  57. #define REG_RXDELAY 0x23
  58. // Oscillator settings
  59. #define REG_OSC 0x24
  60. // Packet handler settings
  61. #define REG_PREAMBLEMSB 0x25
  62. #define REG_PREAMBLELSB 0x26
  63. #define REG_SYNCCONFIG 0x27
  64. #define REG_SYNCVALUE1 0x28
  65. #define REG_SYNCVALUE2 0x29
  66. #define REG_SYNCVALUE3 0x2A
  67. #define REG_SYNCVALUE4 0x2B
  68. #define REG_SYNCVALUE5 0x2C
  69. #define REG_SYNCVALUE6 0x2D
  70. #define REG_SYNCVALUE7 0x2E
  71. #define REG_SYNCVALUE8 0x2F
  72. #define REG_PACKETCONFIG1 0x30
  73. #define REG_PACKETCONFIG2 0x31
  74. #define REG_PAYLOADLENGTH 0x32
  75. #define REG_NODEADRS 0x33
  76. #define REG_BROADCASTADRS 0x34
  77. #define REG_FIFOTHRESH 0x35
  78. // SM settings
  79. #define REG_SEQCONFIG1 0x36
  80. #define REG_SEQCONFIG2 0x37
  81. #define REG_TIMERRESOL 0x38
  82. #define REG_TIMER1COEF 0x39
  83. #define REG_TIMER2COEF 0x3A
  84. // Service settings
  85. #define REG_IMAGECAL 0x3B
  86. #define REG_TEMP 0x3C
  87. #define REG_LOWBAT 0x3D
  88. // Status
  89. #define REG_IRQFLAGS1 0x3E
  90. #define REG_IRQFLAGS2 0x3F
  91. // I/O settings
  92. #define REG_DIOMAPPING1 0x40
  93. #define REG_DIOMAPPING2 0x41
  94. // Version
  95. #define REG_VERSION 0x42
  96. // Additional settings
  97. #define REG_PLLHOP 0x44
  98. #define REG_TCXO 0x4B
  99. #define REG_PADAC 0x4D
  100. #define REG_FORMERTEMP 0x5B
  101. #define REG_BITRATEFRAC 0x5D
  102. #define REG_AGCREF 0x61
  103. #define REG_AGCTHRESH1 0x62
  104. #define REG_AGCTHRESH2 0x63
  105. #define REG_AGCTHRESH3 0x64
  106. #define REG_PLL 0x70
  107. /*!
  108. * ============================================================================
  109. * SX1276 FSK bits control definition
  110. * ============================================================================
  111. */
  112. /*!
  113. * RegFifo
  114. */
  115. /*!
  116. * RegOpMode
  117. */
  118. #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F
  119. #define RF_OPMODE_LONGRANGEMODE_OFF 0x00
  120. #define RF_OPMODE_LONGRANGEMODE_ON 0x80
  121. #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F
  122. #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default
  123. #define RF_OPMODE_MODULATIONTYPE_OOK 0x20
  124. #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7
  125. #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default
  126. #define RF_OPMODE_MODULATIONSHAPING_01 0x08
  127. #define RF_OPMODE_MODULATIONSHAPING_10 0x10
  128. #define RF_OPMODE_MODULATIONSHAPING_11 0x18
  129. #define RF_OPMODE_MASK 0xF8
  130. #define RF_OPMODE_SLEEP 0x00
  131. #define RF_OPMODE_STANDBY 0x01 // Default
  132. #define RF_OPMODE_SYNTHESIZER_TX 0x02
  133. #define RF_OPMODE_TRANSMITTER 0x03
  134. #define RF_OPMODE_SYNTHESIZER_RX 0x04
  135. #define RF_OPMODE_RECEIVER 0x05
  136. /*!
  137. * RegBitRate (bits/sec)
  138. */
  139. #define RF_BITRATEMSB_1200_BPS 0x68
  140. #define RF_BITRATELSB_1200_BPS 0x2B
  141. #define RF_BITRATEMSB_2400_BPS 0x34
  142. #define RF_BITRATELSB_2400_BPS 0x15
  143. #define RF_BITRATEMSB_4800_BPS 0x1A // Default
  144. #define RF_BITRATELSB_4800_BPS 0x0B // Default
  145. #define RF_BITRATEMSB_9600_BPS 0x0D
  146. #define RF_BITRATELSB_9600_BPS 0x05
  147. #define RF_BITRATEMSB_15000_BPS 0x08
  148. #define RF_BITRATELSB_15000_BPS 0x55
  149. #define RF_BITRATEMSB_19200_BPS 0x06
  150. #define RF_BITRATELSB_19200_BPS 0x83
  151. #define RF_BITRATEMSB_38400_BPS 0x03
  152. #define RF_BITRATELSB_38400_BPS 0x41
  153. #define RF_BITRATEMSB_76800_BPS 0x01
  154. #define RF_BITRATELSB_76800_BPS 0xA1
  155. #define RF_BITRATEMSB_153600_BPS 0x00
  156. #define RF_BITRATELSB_153600_BPS 0xD0
  157. #define RF_BITRATEMSB_57600_BPS 0x02
  158. #define RF_BITRATELSB_57600_BPS 0x2C
  159. #define RF_BITRATEMSB_115200_BPS 0x01
  160. #define RF_BITRATELSB_115200_BPS 0x16
  161. #define RF_BITRATEMSB_12500_BPS 0x0A
  162. #define RF_BITRATELSB_12500_BPS 0x00
  163. #define RF_BITRATEMSB_25000_BPS 0x05
  164. #define RF_BITRATELSB_25000_BPS 0x00
  165. #define RF_BITRATEMSB_50000_BPS 0x02
  166. #define RF_BITRATELSB_50000_BPS 0x80
  167. #define RF_BITRATEMSB_100000_BPS 0x01
  168. #define RF_BITRATELSB_100000_BPS 0x40
  169. #define RF_BITRATEMSB_150000_BPS 0x00
  170. #define RF_BITRATELSB_150000_BPS 0xD5
  171. #define RF_BITRATEMSB_200000_BPS 0x00
  172. #define RF_BITRATELSB_200000_BPS 0xA0
  173. #define RF_BITRATEMSB_250000_BPS 0x00
  174. #define RF_BITRATELSB_250000_BPS 0x80
  175. #define RF_BITRATEMSB_32768_BPS 0x03
  176. #define RF_BITRATELSB_32768_BPS 0xD1
  177. /*!
  178. * RegFdev (Hz)
  179. */
  180. #define RF_FDEVMSB_2000_HZ 0x00
  181. #define RF_FDEVLSB_2000_HZ 0x21
  182. #define RF_FDEVMSB_5000_HZ 0x00 // Default
  183. #define RF_FDEVLSB_5000_HZ 0x52 // Default
  184. #define RF_FDEVMSB_10000_HZ 0x00
  185. #define RF_FDEVLSB_10000_HZ 0xA4
  186. #define RF_FDEVMSB_15000_HZ 0x00
  187. #define RF_FDEVLSB_15000_HZ 0xF6
  188. #define RF_FDEVMSB_20000_HZ 0x01
  189. #define RF_FDEVLSB_20000_HZ 0x48
  190. #define RF_FDEVMSB_25000_HZ 0x01
  191. #define RF_FDEVLSB_25000_HZ 0x9A
  192. #define RF_FDEVMSB_30000_HZ 0x01
  193. #define RF_FDEVLSB_30000_HZ 0xEC
  194. #define RF_FDEVMSB_35000_HZ 0x02
  195. #define RF_FDEVLSB_35000_HZ 0x3D
  196. #define RF_FDEVMSB_40000_HZ 0x02
  197. #define RF_FDEVLSB_40000_HZ 0x8F
  198. #define RF_FDEVMSB_45000_HZ 0x02
  199. #define RF_FDEVLSB_45000_HZ 0xE1
  200. #define RF_FDEVMSB_50000_HZ 0x03
  201. #define RF_FDEVLSB_50000_HZ 0x33
  202. #define RF_FDEVMSB_55000_HZ 0x03
  203. #define RF_FDEVLSB_55000_HZ 0x85
  204. #define RF_FDEVMSB_60000_HZ 0x03
  205. #define RF_FDEVLSB_60000_HZ 0xD7
  206. #define RF_FDEVMSB_65000_HZ 0x04
  207. #define RF_FDEVLSB_65000_HZ 0x29
  208. #define RF_FDEVMSB_70000_HZ 0x04
  209. #define RF_FDEVLSB_70000_HZ 0x7B
  210. #define RF_FDEVMSB_75000_HZ 0x04
  211. #define RF_FDEVLSB_75000_HZ 0xCD
  212. #define RF_FDEVMSB_80000_HZ 0x05
  213. #define RF_FDEVLSB_80000_HZ 0x1F
  214. #define RF_FDEVMSB_85000_HZ 0x05
  215. #define RF_FDEVLSB_85000_HZ 0x71
  216. #define RF_FDEVMSB_90000_HZ 0x05
  217. #define RF_FDEVLSB_90000_HZ 0xC3
  218. #define RF_FDEVMSB_95000_HZ 0x06
  219. #define RF_FDEVLSB_95000_HZ 0x14
  220. #define RF_FDEVMSB_100000_HZ 0x06
  221. #define RF_FDEVLSB_100000_HZ 0x66
  222. #define RF_FDEVMSB_110000_HZ 0x07
  223. #define RF_FDEVLSB_110000_HZ 0x0A
  224. #define RF_FDEVMSB_120000_HZ 0x07
  225. #define RF_FDEVLSB_120000_HZ 0xAE
  226. #define RF_FDEVMSB_130000_HZ 0x08
  227. #define RF_FDEVLSB_130000_HZ 0x52
  228. #define RF_FDEVMSB_140000_HZ 0x08
  229. #define RF_FDEVLSB_140000_HZ 0xF6
  230. #define RF_FDEVMSB_150000_HZ 0x09
  231. #define RF_FDEVLSB_150000_HZ 0x9A
  232. #define RF_FDEVMSB_160000_HZ 0x0A
  233. #define RF_FDEVLSB_160000_HZ 0x3D
  234. #define RF_FDEVMSB_170000_HZ 0x0A
  235. #define RF_FDEVLSB_170000_HZ 0xE1
  236. #define RF_FDEVMSB_180000_HZ 0x0B
  237. #define RF_FDEVLSB_180000_HZ 0x85
  238. #define RF_FDEVMSB_190000_HZ 0x0C
  239. #define RF_FDEVLSB_190000_HZ 0x29
  240. #define RF_FDEVMSB_200000_HZ 0x0C
  241. #define RF_FDEVLSB_200000_HZ 0xCD
  242. /*!
  243. * RegFrf (MHz)
  244. */
  245. #define RF_FRFMSB_863_MHZ 0xD7
  246. #define RF_FRFMID_863_MHZ 0xC0
  247. #define RF_FRFLSB_863_MHZ 0x00
  248. #define RF_FRFMSB_864_MHZ 0xD8
  249. #define RF_FRFMID_864_MHZ 0x00
  250. #define RF_FRFLSB_864_MHZ 0x00
  251. #define RF_FRFMSB_865_MHZ 0xD8
  252. #define RF_FRFMID_865_MHZ 0x40
  253. #define RF_FRFLSB_865_MHZ 0x00
  254. #define RF_FRFMSB_866_MHZ 0xD8
  255. #define RF_FRFMID_866_MHZ 0x80
  256. #define RF_FRFLSB_866_MHZ 0x00
  257. #define RF_FRFMSB_867_MHZ 0xD8
  258. #define RF_FRFMID_867_MHZ 0xC0
  259. #define RF_FRFLSB_867_MHZ 0x00
  260. #define RF_FRFMSB_868_MHZ 0xD9
  261. #define RF_FRFMID_868_MHZ 0x00
  262. #define RF_FRFLSB_868_MHZ 0x00
  263. #define RF_FRFMSB_869_MHZ 0xD9
  264. #define RF_FRFMID_869_MHZ 0x40
  265. #define RF_FRFLSB_869_MHZ 0x00
  266. #define RF_FRFMSB_870_MHZ 0xD9
  267. #define RF_FRFMID_870_MHZ 0x80
  268. #define RF_FRFLSB_870_MHZ 0x00
  269. #define RF_FRFMSB_902_MHZ 0xE1
  270. #define RF_FRFMID_902_MHZ 0x80
  271. #define RF_FRFLSB_902_MHZ 0x00
  272. #define RF_FRFMSB_903_MHZ 0xE1
  273. #define RF_FRFMID_903_MHZ 0xC0
  274. #define RF_FRFLSB_903_MHZ 0x00
  275. #define RF_FRFMSB_904_MHZ 0xE2
  276. #define RF_FRFMID_904_MHZ 0x00
  277. #define RF_FRFLSB_904_MHZ 0x00
  278. #define RF_FRFMSB_905_MHZ 0xE2
  279. #define RF_FRFMID_905_MHZ 0x40
  280. #define RF_FRFLSB_905_MHZ 0x00
  281. #define RF_FRFMSB_906_MHZ 0xE2
  282. #define RF_FRFMID_906_MHZ 0x80
  283. #define RF_FRFLSB_906_MHZ 0x00
  284. #define RF_FRFMSB_907_MHZ 0xE2
  285. #define RF_FRFMID_907_MHZ 0xC0
  286. #define RF_FRFLSB_907_MHZ 0x00
  287. #define RF_FRFMSB_908_MHZ 0xE3
  288. #define RF_FRFMID_908_MHZ 0x00
  289. #define RF_FRFLSB_908_MHZ 0x00
  290. #define RF_FRFMSB_909_MHZ 0xE3
  291. #define RF_FRFMID_909_MHZ 0x40
  292. #define RF_FRFLSB_909_MHZ 0x00
  293. #define RF_FRFMSB_910_MHZ 0xE3
  294. #define RF_FRFMID_910_MHZ 0x80
  295. #define RF_FRFLSB_910_MHZ 0x00
  296. #define RF_FRFMSB_911_MHZ 0xE3
  297. #define RF_FRFMID_911_MHZ 0xC0
  298. #define RF_FRFLSB_911_MHZ 0x00
  299. #define RF_FRFMSB_912_MHZ 0xE4
  300. #define RF_FRFMID_912_MHZ 0x00
  301. #define RF_FRFLSB_912_MHZ 0x00
  302. #define RF_FRFMSB_913_MHZ 0xE4
  303. #define RF_FRFMID_913_MHZ 0x40
  304. #define RF_FRFLSB_913_MHZ 0x00
  305. #define RF_FRFMSB_914_MHZ 0xE4
  306. #define RF_FRFMID_914_MHZ 0x80
  307. #define RF_FRFLSB_914_MHZ 0x00
  308. #define RF_FRFMSB_915_MHZ 0xE4 // Default
  309. #define RF_FRFMID_915_MHZ 0xC0 // Default
  310. #define RF_FRFLSB_915_MHZ 0x00 // Default
  311. #define RF_FRFMSB_916_MHZ 0xE5
  312. #define RF_FRFMID_916_MHZ 0x00
  313. #define RF_FRFLSB_916_MHZ 0x00
  314. #define RF_FRFMSB_917_MHZ 0xE5
  315. #define RF_FRFMID_917_MHZ 0x40
  316. #define RF_FRFLSB_917_MHZ 0x00
  317. #define RF_FRFMSB_918_MHZ 0xE5
  318. #define RF_FRFMID_918_MHZ 0x80
  319. #define RF_FRFLSB_918_MHZ 0x00
  320. #define RF_FRFMSB_919_MHZ 0xE5
  321. #define RF_FRFMID_919_MHZ 0xC0
  322. #define RF_FRFLSB_919_MHZ 0x00
  323. #define RF_FRFMSB_920_MHZ 0xE6
  324. #define RF_FRFMID_920_MHZ 0x00
  325. #define RF_FRFLSB_920_MHZ 0x00
  326. #define RF_FRFMSB_921_MHZ 0xE6
  327. #define RF_FRFMID_921_MHZ 0x40
  328. #define RF_FRFLSB_921_MHZ 0x00
  329. #define RF_FRFMSB_922_MHZ 0xE6
  330. #define RF_FRFMID_922_MHZ 0x80
  331. #define RF_FRFLSB_922_MHZ 0x00
  332. #define RF_FRFMSB_923_MHZ 0xE6
  333. #define RF_FRFMID_923_MHZ 0xC0
  334. #define RF_FRFLSB_923_MHZ 0x00
  335. #define RF_FRFMSB_924_MHZ 0xE7
  336. #define RF_FRFMID_924_MHZ 0x00
  337. #define RF_FRFLSB_924_MHZ 0x00
  338. #define RF_FRFMSB_925_MHZ 0xE7
  339. #define RF_FRFMID_925_MHZ 0x40
  340. #define RF_FRFLSB_925_MHZ 0x00
  341. #define RF_FRFMSB_926_MHZ 0xE7
  342. #define RF_FRFMID_926_MHZ 0x80
  343. #define RF_FRFLSB_926_MHZ 0x00
  344. #define RF_FRFMSB_927_MHZ 0xE7
  345. #define RF_FRFMID_927_MHZ 0xC0
  346. #define RF_FRFLSB_927_MHZ 0x00
  347. #define RF_FRFMSB_928_MHZ 0xE8
  348. #define RF_FRFMID_928_MHZ 0x00
  349. #define RF_FRFLSB_928_MHZ 0x00
  350. /*!
  351. * RegPaConfig
  352. */
  353. #define RF_PACONFIG_PASELECT_MASK 0x7F
  354. #define RF_PACONFIG_PASELECT_PABOOST 0x80
  355. #define RF_PACONFIG_PASELECT_RFO 0x00 // Default
  356. #define RF_PACONFIG_MAX_POWER_MASK 0x8F
  357. #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0
  358. /*!
  359. * RegPaRamp
  360. */
  361. #define RF_PARAMP_MODULATIONSHAPING_MASK 0x9F
  362. #define RF_PARAMP_MODULATIONSHAPING_00 0x00 // Default
  363. #define RF_PARAMP_MODULATIONSHAPING_01 0x20
  364. #define RF_PARAMP_MODULATIONSHAPING_10 0x40
  365. #define RF_PARAMP_MODULATIONSHAPING_11 0x60
  366. #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF
  367. #define RF_PARAMP_LOWPNTXPLL_OFF 0x10
  368. #define RF_PARAMP_LOWPNTXPLL_ON 0x00 // Default
  369. #define RF_PARAMP_MASK 0xF0
  370. #define RF_PARAMP_3400_US 0x00
  371. #define RF_PARAMP_2000_US 0x01
  372. #define RF_PARAMP_1000_US 0x02
  373. #define RF_PARAMP_0500_US 0x03
  374. #define RF_PARAMP_0250_US 0x04
  375. #define RF_PARAMP_0125_US 0x05
  376. #define RF_PARAMP_0100_US 0x06
  377. #define RF_PARAMP_0062_US 0x07
  378. #define RF_PARAMP_0050_US 0x08
  379. #define RF_PARAMP_0040_US 0x09 // Default
  380. #define RF_PARAMP_0031_US 0x0A
  381. #define RF_PARAMP_0025_US 0x0B
  382. #define RF_PARAMP_0020_US 0x0C
  383. #define RF_PARAMP_0015_US 0x0D
  384. #define RF_PARAMP_0012_US 0x0E
  385. #define RF_PARAMP_0010_US 0x0F
  386. /*!
  387. * RegOcp
  388. */
  389. #define RF_OCP_MASK 0xDF
  390. #define RF_OCP_ON 0x20 // Default
  391. #define RF_OCP_OFF 0x00
  392. #define RF_OCP_TRIM_MASK 0xE0
  393. #define RF_OCP_TRIM_045_MA 0x00
  394. #define RF_OCP_TRIM_050_MA 0x01
  395. #define RF_OCP_TRIM_055_MA 0x02
  396. #define RF_OCP_TRIM_060_MA 0x03
  397. #define RF_OCP_TRIM_065_MA 0x04
  398. #define RF_OCP_TRIM_070_MA 0x05
  399. #define RF_OCP_TRIM_075_MA 0x06
  400. #define RF_OCP_TRIM_080_MA 0x07
  401. #define RF_OCP_TRIM_085_MA 0x08
  402. #define RF_OCP_TRIM_090_MA 0x09
  403. #define RF_OCP_TRIM_095_MA 0x0A
  404. #define RF_OCP_TRIM_100_MA 0x0B // Default
  405. #define RF_OCP_TRIM_105_MA 0x0C
  406. #define RF_OCP_TRIM_110_MA 0x0D
  407. #define RF_OCP_TRIM_115_MA 0x0E
  408. #define RF_OCP_TRIM_120_MA 0x0F
  409. #define RF_OCP_TRIM_130_MA 0x10
  410. #define RF_OCP_TRIM_140_MA 0x11
  411. #define RF_OCP_TRIM_150_MA 0x12
  412. #define RF_OCP_TRIM_160_MA 0x13
  413. #define RF_OCP_TRIM_170_MA 0x14
  414. #define RF_OCP_TRIM_180_MA 0x15
  415. #define RF_OCP_TRIM_190_MA 0x16
  416. #define RF_OCP_TRIM_200_MA 0x17
  417. #define RF_OCP_TRIM_210_MA 0x18
  418. #define RF_OCP_TRIM_220_MA 0x19
  419. #define RF_OCP_TRIM_230_MA 0x1A
  420. #define RF_OCP_TRIM_240_MA 0x1B
  421. /*!
  422. * RegLna
  423. */
  424. #define RF_LNA_GAIN_MASK 0x1F
  425. #define RF_LNA_GAIN_G1 0x20 // Default
  426. #define RF_LNA_GAIN_G2 0x40
  427. #define RF_LNA_GAIN_G3 0x60
  428. #define RF_LNA_GAIN_G4 0x80
  429. #define RF_LNA_GAIN_G5 0xA0
  430. #define RF_LNA_GAIN_G6 0xC0
  431. #define RF_LNA_BOOST_MASK 0xFC
  432. #define RF_LNA_BOOST_OFF 0x00 // Default
  433. #define RF_LNA_BOOST_ON 0x03
  434. /*!
  435. * RegRxConfig
  436. */
  437. #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F
  438. #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80
  439. #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default
  440. #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only
  441. #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only
  442. #define RF_RXCONFIG_AFCAUTO_MASK 0xEF
  443. #define RF_RXCONFIG_AFCAUTO_ON 0x10
  444. #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default
  445. #define RF_RXCONFIG_AGCAUTO_MASK 0xF7
  446. #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default
  447. #define RF_RXCONFIG_AGCAUTO_OFF 0x00
  448. #define RF_RXCONFIG_RXTRIGER_MASK 0xF8
  449. #define RF_RXCONFIG_RXTRIGER_OFF 0x00
  450. #define RF_RXCONFIG_RXTRIGER_RSSI 0x01
  451. #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default
  452. #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07
  453. /*!
  454. * RegRssiConfig
  455. */
  456. #define RF_RSSICONFIG_OFFSET_MASK 0x07
  457. #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default
  458. #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08
  459. #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10
  460. #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18
  461. #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20
  462. #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28
  463. #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30
  464. #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38
  465. #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40
  466. #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48
  467. #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50
  468. #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58
  469. #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60
  470. #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68
  471. #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70
  472. #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78
  473. #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80
  474. #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88
  475. #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90
  476. #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98
  477. #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0
  478. #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8
  479. #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0
  480. #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8
  481. #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0
  482. #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8
  483. #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0
  484. #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8
  485. #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0
  486. #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8
  487. #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0
  488. #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8
  489. #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8
  490. #define RF_RSSICONFIG_SMOOTHING_2 0x00
  491. #define RF_RSSICONFIG_SMOOTHING_4 0x01
  492. #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default
  493. #define RF_RSSICONFIG_SMOOTHING_16 0x03
  494. #define RF_RSSICONFIG_SMOOTHING_32 0x04
  495. #define RF_RSSICONFIG_SMOOTHING_64 0x05
  496. #define RF_RSSICONFIG_SMOOTHING_128 0x06
  497. #define RF_RSSICONFIG_SMOOTHING_256 0x07
  498. /*!
  499. * RegRssiCollision
  500. */
  501. #define RF_RSSICOLISION_THRESHOLD 0x0A // Default
  502. /*!
  503. * RegRssiThresh
  504. */
  505. #define RF_RSSITHRESH_THRESHOLD 0xFF // Default
  506. /*!
  507. * RegRssiValue (Read Only)
  508. */
  509. /*!
  510. * RegRxBw
  511. */
  512. #define RF_RXBW_MANT_MASK 0xE7
  513. #define RF_RXBW_MANT_16 0x00
  514. #define RF_RXBW_MANT_20 0x08
  515. #define RF_RXBW_MANT_24 0x10 // Default
  516. #define RF_RXBW_EXP_MASK 0xF8
  517. #define RF_RXBW_EXP_0 0x00
  518. #define RF_RXBW_EXP_1 0x01
  519. #define RF_RXBW_EXP_2 0x02
  520. #define RF_RXBW_EXP_3 0x03
  521. #define RF_RXBW_EXP_4 0x04
  522. #define RF_RXBW_EXP_5 0x05 // Default
  523. #define RF_RXBW_EXP_6 0x06
  524. #define RF_RXBW_EXP_7 0x07
  525. /*!
  526. * RegAfcBw
  527. */
  528. #define RF_AFCBW_MANTAFC_MASK 0xE7
  529. #define RF_AFCBW_MANTAFC_16 0x00
  530. #define RF_AFCBW_MANTAFC_20 0x08 // Default
  531. #define RF_AFCBW_MANTAFC_24 0x10
  532. #define RF_AFCBW_EXPAFC_MASK 0xF8
  533. #define RF_AFCBW_EXPAFC_0 0x00
  534. #define RF_AFCBW_EXPAFC_1 0x01
  535. #define RF_AFCBW_EXPAFC_2 0x02
  536. #define RF_AFCBW_EXPAFC_3 0x03 // Default
  537. #define RF_AFCBW_EXPAFC_4 0x04
  538. #define RF_AFCBW_EXPAFC_5 0x05
  539. #define RF_AFCBW_EXPAFC_6 0x06
  540. #define RF_AFCBW_EXPAFC_7 0x07
  541. /*!
  542. * RegOokPeak
  543. */
  544. #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default
  545. #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default
  546. #define RF_OOKPEAK_BITSYNC_OFF 0x00
  547. #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7
  548. #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00
  549. #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default
  550. #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10
  551. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8
  552. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default
  553. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01
  554. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02
  555. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03
  556. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04
  557. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05
  558. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06
  559. #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07
  560. /*!
  561. * RegOokFix
  562. */
  563. #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default
  564. /*!
  565. * RegOokAvg
  566. */
  567. #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F
  568. #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default
  569. #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20
  570. #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40
  571. #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60
  572. #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80
  573. #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0
  574. #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0
  575. #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0
  576. #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3
  577. #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default
  578. #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04
  579. #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08
  580. #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C
  581. #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC
  582. #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00
  583. #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01
  584. #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default
  585. #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03
  586. /*!
  587. * RegAfcFei
  588. */
  589. #define RF_AFCFEI_AGCSTART 0x10
  590. #define RF_AFCFEI_AFCCLEAR 0x02
  591. #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE
  592. #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01
  593. #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default
  594. /*!
  595. * RegAfcMsb (Read Only)
  596. */
  597. /*!
  598. * RegAfcLsb (Read Only)
  599. */
  600. /*!
  601. * RegFeiMsb (Read Only)
  602. */
  603. /*!
  604. * RegFeiLsb (Read Only)
  605. */
  606. /*!
  607. * RegPreambleDetect
  608. */
  609. #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F
  610. #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default
  611. #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00
  612. #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F
  613. #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00
  614. #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default
  615. #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40
  616. #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60
  617. #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0
  618. #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00
  619. #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01
  620. #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02
  621. #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03
  622. #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04
  623. #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05
  624. #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06
  625. #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07
  626. #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08
  627. #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09
  628. #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default
  629. #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B
  630. #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C
  631. #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D
  632. #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E
  633. #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F
  634. #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10
  635. #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11
  636. #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12
  637. #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13
  638. #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14
  639. #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15
  640. #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16
  641. #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17
  642. #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18
  643. #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19
  644. #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A
  645. #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B
  646. #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C
  647. #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D
  648. #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E
  649. #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F
  650. /*!
  651. * RegRxTimeout1
  652. */
  653. #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default
  654. /*!
  655. * RegRxTimeout2
  656. */
  657. #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default
  658. /*!
  659. * RegRxTimeout3
  660. */
  661. #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default
  662. /*!
  663. * RegRxDelay
  664. */
  665. #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default
  666. /*!
  667. * RegOsc
  668. */
  669. #define RF_OSC_RCCALSTART 0x08
  670. #define RF_OSC_CLKOUT_MASK 0xF8
  671. #define RF_OSC_CLKOUT_32_MHZ 0x00
  672. #define RF_OSC_CLKOUT_16_MHZ 0x01
  673. #define RF_OSC_CLKOUT_8_MHZ 0x02
  674. #define RF_OSC_CLKOUT_4_MHZ 0x03
  675. #define RF_OSC_CLKOUT_2_MHZ 0x04
  676. #define RF_OSC_CLKOUT_1_MHZ 0x05 // Default
  677. #define RF_OSC_CLKOUT_RC 0x06
  678. #define RF_OSC_CLKOUT_OFF 0x07
  679. /*!
  680. * RegPreambleMsb/RegPreambleLsb
  681. */
  682. #define RF_PREAMBLEMSB_SIZE 0x00 // Default
  683. #define RF_PREAMBLELSB_SIZE 0x03 // Default
  684. /*!
  685. * RegSyncConfig
  686. */
  687. #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F
  688. #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default
  689. #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40
  690. #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00
  691. #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF
  692. #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20
  693. #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default
  694. #define RF_SYNCCONFIG_SYNC_MASK 0xEF
  695. #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default
  696. #define RF_SYNCCONFIG_SYNC_OFF 0x00
  697. #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8
  698. #define RF_SYNCCONFIG_SYNCSIZE_1 0x00
  699. #define RF_SYNCCONFIG_SYNCSIZE_2 0x01
  700. #define RF_SYNCCONFIG_SYNCSIZE_3 0x02
  701. #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default
  702. #define RF_SYNCCONFIG_SYNCSIZE_5 0x04
  703. #define RF_SYNCCONFIG_SYNCSIZE_6 0x05
  704. #define RF_SYNCCONFIG_SYNCSIZE_7 0x06
  705. #define RF_SYNCCONFIG_SYNCSIZE_8 0x07
  706. /*!
  707. * RegSyncValue1-8
  708. */
  709. #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default
  710. #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default
  711. #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default
  712. #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default
  713. #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default
  714. #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default
  715. #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default
  716. #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default
  717. /*!
  718. * RegPacketConfig1
  719. */
  720. #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F
  721. #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00
  722. #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default
  723. #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F
  724. #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default
  725. #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20
  726. #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40
  727. #define RF_PACKETCONFIG1_CRC_MASK 0xEF
  728. #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default
  729. #define RF_PACKETCONFIG1_CRC_OFF 0x00
  730. #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7
  731. #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default
  732. #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08
  733. #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9
  734. #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default
  735. #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02
  736. #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04
  737. #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE
  738. #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default
  739. #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01
  740. /*!
  741. * RegPacketConfig2
  742. */
  743. #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE_MASK 0x7F
  744. #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE 0x80
  745. #define RF_PACKETCONFIG2_WMBUS_CRC_DISABLE 0x00 // Default
  746. #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF
  747. #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00
  748. #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default
  749. #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF
  750. #define RF_PACKETCONFIG2_IOHOME_ON 0x20
  751. #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default
  752. #define RF_PACKETCONFIG2_BEACON_MASK 0xF7
  753. #define RF_PACKETCONFIG2_BEACON_ON 0x08
  754. #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default
  755. #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8
  756. /*!
  757. * RegPayloadLength
  758. */
  759. #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default
  760. /*!
  761. * RegNodeAdrs
  762. */
  763. #define RF_NODEADDRESS_ADDRESS 0x00
  764. /*!
  765. * RegBroadcastAdrs
  766. */
  767. #define RF_BROADCASTADDRESS_ADDRESS 0x00
  768. /*!
  769. * RegFifoThresh
  770. */
  771. #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F
  772. #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 // Default
  773. #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80
  774. #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0
  775. #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default
  776. /*!
  777. * RegSeqConfig1
  778. */
  779. #define RF_SEQCONFIG1_SEQUENCER_START 0x80
  780. #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40
  781. #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF
  782. #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20
  783. #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default
  784. #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7
  785. #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default
  786. #define RF_SEQCONFIG1_FROMSTART_TORX 0x08
  787. #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10
  788. #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18
  789. #define RF_SEQCONFIG1_LPS_MASK 0xFB
  790. #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default
  791. #define RF_SEQCONFIG1_LPS_IDLE 0x04
  792. #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD
  793. #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default
  794. #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02
  795. #define RF_SEQCONFIG1_FROMTX_MASK 0xFE
  796. #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default
  797. #define RF_SEQCONFIG1_FROMTX_TORX 0x01
  798. /*!
  799. * RegSeqConfig2
  800. */
  801. #define RF_SEQCONFIG2_FROMRX_MASK 0x1F
  802. #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default
  803. #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20
  804. #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40
  805. #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60
  806. #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80
  807. #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0
  808. #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0
  809. #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0
  810. #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7
  811. #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default
  812. #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08
  813. #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10
  814. #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18
  815. #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8
  816. #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default
  817. #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01
  818. #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02
  819. #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03
  820. #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04
  821. /*!
  822. * RegTimerResol
  823. */
  824. #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3
  825. #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default
  826. #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04
  827. #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08
  828. #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C
  829. #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC
  830. #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default
  831. #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01
  832. #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02
  833. #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03
  834. /*!
  835. * RegTimer1Coef
  836. */
  837. #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default
  838. /*!
  839. * RegTimer2Coef
  840. */
  841. #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default
  842. /*!
  843. * RegImageCal
  844. */
  845. #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F
  846. #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80
  847. #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default
  848. #define RF_IMAGECAL_IMAGECAL_MASK 0xBF
  849. #define RF_IMAGECAL_IMAGECAL_START 0x40
  850. #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20
  851. #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default
  852. #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08
  853. #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00
  854. #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9
  855. #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00
  856. #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default
  857. #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04
  858. #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06
  859. #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE
  860. #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default
  861. #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01
  862. /*!
  863. * RegTemp (Read Only)
  864. */
  865. /*!
  866. * RegLowBat
  867. */
  868. #define RF_LOWBAT_MASK 0xF7
  869. #define RF_LOWBAT_ON 0x08
  870. #define RF_LOWBAT_OFF 0x00 // Default
  871. #define RF_LOWBAT_TRIM_MASK 0xF8
  872. #define RF_LOWBAT_TRIM_1695 0x00
  873. #define RF_LOWBAT_TRIM_1764 0x01
  874. #define RF_LOWBAT_TRIM_1835 0x02 // Default
  875. #define RF_LOWBAT_TRIM_1905 0x03
  876. #define RF_LOWBAT_TRIM_1976 0x04
  877. #define RF_LOWBAT_TRIM_2045 0x05
  878. #define RF_LOWBAT_TRIM_2116 0x06
  879. #define RF_LOWBAT_TRIM_2185 0x07
  880. /*!
  881. * RegIrqFlags1
  882. */
  883. #define RF_IRQFLAGS1_MODEREADY 0x80
  884. #define RF_IRQFLAGS1_RXREADY 0x40
  885. #define RF_IRQFLAGS1_TXREADY 0x20
  886. #define RF_IRQFLAGS1_PLLLOCK 0x10
  887. #define RF_IRQFLAGS1_RSSI 0x08
  888. #define RF_IRQFLAGS1_TIMEOUT 0x04
  889. #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02
  890. #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01
  891. /*!
  892. * RegIrqFlags2
  893. */
  894. #define RF_IRQFLAGS2_FIFOFULL 0x80
  895. #define RF_IRQFLAGS2_FIFOEMPTY 0x40
  896. #define RF_IRQFLAGS2_FIFOLEVEL 0x20
  897. #define RF_IRQFLAGS2_FIFOOVERRUN 0x10
  898. #define RF_IRQFLAGS2_PACKETSENT 0x08
  899. #define RF_IRQFLAGS2_PAYLOADREADY 0x04
  900. #define RF_IRQFLAGS2_CRCOK 0x02
  901. #define RF_IRQFLAGS2_LOWBAT 0x01
  902. /*!
  903. * RegDioMapping1
  904. */
  905. #define RF_DIOMAPPING1_DIO0_MASK 0x3F
  906. #define RF_DIOMAPPING1_DIO0_00 0x00 // Default
  907. #define RF_DIOMAPPING1_DIO0_01 0x40
  908. #define RF_DIOMAPPING1_DIO0_10 0x80
  909. #define RF_DIOMAPPING1_DIO0_11 0xC0
  910. #define RF_DIOMAPPING1_DIO1_MASK 0xCF
  911. #define RF_DIOMAPPING1_DIO1_00 0x00 // Default
  912. #define RF_DIOMAPPING1_DIO1_01 0x10
  913. #define RF_DIOMAPPING1_DIO1_10 0x20
  914. #define RF_DIOMAPPING1_DIO1_11 0x30
  915. #define RF_DIOMAPPING1_DIO2_MASK 0xF3
  916. #define RF_DIOMAPPING1_DIO2_00 0x00 // Default
  917. #define RF_DIOMAPPING1_DIO2_01 0x04
  918. #define RF_DIOMAPPING1_DIO2_10 0x08
  919. #define RF_DIOMAPPING1_DIO2_11 0x0C
  920. #define RF_DIOMAPPING1_DIO3_MASK 0xFC
  921. #define RF_DIOMAPPING1_DIO3_00 0x00 // Default
  922. #define RF_DIOMAPPING1_DIO3_01 0x01
  923. #define RF_DIOMAPPING1_DIO3_10 0x02
  924. #define RF_DIOMAPPING1_DIO3_11 0x03
  925. /*!
  926. * RegDioMapping2
  927. */
  928. #define RF_DIOMAPPING2_DIO4_MASK 0x3F
  929. #define RF_DIOMAPPING2_DIO4_00 0x00 // Default
  930. #define RF_DIOMAPPING2_DIO4_01 0x40
  931. #define RF_DIOMAPPING2_DIO4_10 0x80
  932. #define RF_DIOMAPPING2_DIO4_11 0xC0
  933. #define RF_DIOMAPPING2_DIO5_MASK 0xCF
  934. #define RF_DIOMAPPING2_DIO5_00 0x00 // Default
  935. #define RF_DIOMAPPING2_DIO5_01 0x10
  936. #define RF_DIOMAPPING2_DIO5_10 0x20
  937. #define RF_DIOMAPPING2_DIO5_11 0x30
  938. #define RF_DIOMAPPING2_MAP_MASK 0xFE
  939. #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
  940. #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default
  941. /*!
  942. * RegVersion (Read Only)
  943. */
  944. /*!
  945. * RegPllHop
  946. */
  947. #define RF_PLLHOP_FASTHOP_MASK 0x7F
  948. #define RF_PLLHOP_FASTHOP_ON 0x80
  949. #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default
  950. /*!
  951. * RegTcxo
  952. */
  953. #define RF_TCXO_TCXOINPUT_MASK 0xEF
  954. #define RF_TCXO_TCXOINPUT_ON 0x10
  955. #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default
  956. /*!
  957. * RegPaDac
  958. */
  959. #define RF_PADAC_20DBM_MASK 0xF8
  960. #define RF_PADAC_20DBM_ON 0x07
  961. #define RF_PADAC_20DBM_OFF 0x04 // Default
  962. /*!
  963. * RegFormerTemp
  964. */
  965. /*!
  966. * RegBitrateFrac
  967. */
  968. #define RF_BITRATEFRAC_MASK 0xF0
  969. /*!
  970. * RegAgcRef
  971. */
  972. /*!
  973. * RegAgcThresh1
  974. */
  975. /*!
  976. * RegAgcThresh2
  977. */
  978. /*!
  979. * RegAgcThresh3
  980. */
  981. /*!
  982. * RegPll
  983. */
  984. #define RF_PLL_BANDWIDTH_MASK 0x3F
  985. #define RF_PLL_BANDWIDTH_75 0x00
  986. #define RF_PLL_BANDWIDTH_150 0x40
  987. #define RF_PLL_BANDWIDTH_225 0x80
  988. #define RF_PLL_BANDWIDTH_300 0xC0 // Default
  989. #endif // __SX1276_REGS_FSK_H__