@@ -0,0 +1,246 @@ | |||
/** | |||
****************************************************************************** | |||
* @file stm32l1xx.h | |||
* @author MCD Application Team | |||
* @brief CMSIS STM32L1xx Device Peripheral Access Layer Header File. | |||
* | |||
* The file is the unique include file that the application programmer | |||
* is using in the C source code, usually in main.c. This file contains: | |||
* - Configuration section that allows to select: | |||
* - The STM32L1xx device used in the target application | |||
* - To use or not the peripheral's drivers in application code(i.e. | |||
* code will be based on direct access to peripheral's registers | |||
* rather than drivers API), this option is controlled by | |||
* "#define USE_HAL_DRIVER" | |||
* | |||
****************************************************************************** | |||
* @attention | |||
* | |||
* <h2><center>© Copyright (c) 2017 STMicroelectronics. | |||
* All rights reserved.</center></h2> | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
/** @addtogroup CMSIS | |||
* @{ | |||
*/ | |||
/** @addtogroup stm32l1xx | |||
* @{ | |||
*/ | |||
#ifndef __STM32L1XX_H | |||
#define __STM32L1XX_H | |||
#ifdef __cplusplus | |||
extern "C" { | |||
#endif /* __cplusplus */ | |||
/** @addtogroup Library_configuration_section | |||
* @{ | |||
*/ | |||
/** | |||
* @brief STM32 Family | |||
*/ | |||
#if !defined (STM32L1) | |||
#define STM32L1 | |||
#endif /* STM32L1 */ | |||
/* Uncomment the line below according to the target STM32L device used in your | |||
application | |||
*/ | |||
#if !defined (STM32L100xB) && !defined (STM32L100xBA) && !defined (STM32L100xC) && \ | |||
!defined (STM32L151xB) && !defined (STM32L151xBA) && !defined (STM32L151xC) && !defined (STM32L151xCA) && !defined (STM32L151xD) && !defined (STM32L151xDX) && !defined (STM32L151xE) && \ | |||
!defined (STM32L152xB) && !defined (STM32L152xBA) && !defined (STM32L152xC) && !defined (STM32L152xCA) && !defined (STM32L152xD) && !defined (STM32L152xDX) && !defined (STM32L152xE) && \ | |||
!defined (STM32L162xC) && !defined (STM32L162xCA) && !defined (STM32L162xD) && !defined (STM32L162xDX) && !defined (STM32L162xE) | |||
/* #define STM32L100xB */ /*!< STM32L100C6, STM32L100R and STM32L100RB Devices */ | |||
/* #define STM32L100xBA */ /*!< STM32L100C6-A, STM32L100R8-A and STM32L100RB-A Devices */ | |||
/* #define STM32L100xC */ /*!< STM32L100RC Devices */ | |||
/* #define STM32L151xB */ /*!< STM32L151C6, STM32L151R6, STM32L151C8, STM32L151R8, STM32L151V8, STM32L151CB, STM32L151RB and STM32L151VB */ | |||
/* #define STM32L151xBA */ /*!< STM32L151C6-A, STM32L151R6-A, STM32L151C8-A, STM32L151R8-A, STM32L151V8-A, STM32L151CB-A, STM32L151RB-A and STM32L151VB-A */ | |||
/* #define STM32L151xC */ /*!< STM32L151CC, STM32L151UC, STM32L151RC and STM32L151VC */ | |||
/* #define STM32L151xCA */ /*!< STM32L151RC-A, STM32L151VC-A, STM32L151QC and STM32L151ZC */ | |||
/* #define STM32L151xD */ /*!< STM32L151QD, STM32L151RD, STM32L151VD & STM32L151ZD */ | |||
/* #define STM32L151xDX */ /*!< STM32L151VD-X Devices */ | |||
/* #define STM32L151xE */ /*!< STM32L151QE, STM32L151RE, STM32L151VE and STM32L151ZE */ | |||
/* #define STM32L152xB */ /*!< STM32L152C6, STM32L152R6, STM32L152C8, STM32L152R8, STM32L152V8, STM32L152CB, STM32L152RB and STM32L152VB */ | |||
/* #define STM32L152xBA */ /*!< STM32L152C6-A, STM32L152R6-A, STM32L152C8-A, STM32L152R8-A, STM32L152V8-A, STM32L152CB-A, STM32L152RB-A and STM32L152VB-A */ | |||
/* #define STM32L152xC */ /*!< STM32L152CC, STM32L152UC, STM32L152RC and STM32L152VC */ | |||
/* #define STM32L152xCA */ /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */ | |||
/* #define STM32L152xD */ /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */ | |||
/* #define STM32L152xDX */ /*!< STM32L152VD-X Devices */ | |||
/* #define STM32L152xE */ /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */ | |||
/* #define STM32L162xC */ /*!< STM32L162RC and STM32L162VC */ | |||
/* #define STM32L162xCA */ /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */ | |||
/* #define STM32L162xD */ /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */ | |||
/* #define STM32L162xDX */ /*!< STM32L162VD-X Devices */ | |||
/* #define STM32L162xE */ /*!< STM32L162RE, STM32L162VE and STM32L162ZE */ | |||
#endif | |||
/* Tip: To avoid modifying this file each time you need to switch between these | |||
devices, you can define the device in your toolchain compiler preprocessor. | |||
*/ | |||
#if !defined (USE_HAL_DRIVER) | |||
/** | |||
* @brief Comment the line below if you will not use the peripherals drivers. | |||
In this case, these drivers will not be included and the application code will | |||
be based on direct access to peripherals registers | |||
*/ | |||
/*#define USE_HAL_DRIVER */ | |||
#endif /* USE_HAL_DRIVER */ | |||
/** | |||
* @brief CMSIS Device version number V2.3.1 | |||
*/ | |||
#define __STM32L1xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */ | |||
#define __STM32L1xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ | |||
#define __STM32L1xx_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */ | |||
#define __STM32L1xx_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ | |||
#define __STM32L1xx_CMSIS_VERSION ((__STM32L1xx_CMSIS_VERSION_MAIN << 24)\ | |||
|(__STM32L1xx_CMSIS_VERSION_SUB1 << 16)\ | |||
|(__STM32L1xx_CMSIS_VERSION_SUB2 << 8 )\ | |||
|(__STM32L1xx_CMSIS_VERSION_RC)) | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup Device_Included | |||
* @{ | |||
*/ | |||
#if defined(STM32L100xB) | |||
#include "stm32l100xb.h" | |||
#elif defined(STM32L100xBA) | |||
#include "stm32l100xba.h" | |||
#elif defined(STM32L100xC) | |||
#include "stm32l100xc.h" | |||
#elif defined(STM32L151xB) | |||
#include "stm32l151xb.h" | |||
#elif defined(STM32L151xBA) | |||
#include "stm32l151xba.h" | |||
#elif defined(STM32L151xC) | |||
#include "stm32l151xc.h" | |||
#elif defined(STM32L151xCA) | |||
#include "stm32l151xca.h" | |||
#elif defined(STM32L151xD) | |||
#include "stm32l151xd.h" | |||
#elif defined(STM32L151xDX) | |||
#include "stm32l151xdx.h" | |||
#elif defined(STM32L151xE) | |||
#include "stm32l151xe.h" | |||
#elif defined(STM32L152xB) | |||
#include "stm32l152xb.h" | |||
#elif defined(STM32L152xBA) | |||
#include "stm32l152xba.h" | |||
#elif defined(STM32L152xC) | |||
#include "stm32l152xc.h" | |||
#elif defined(STM32L152xCA) | |||
#include "stm32l152xca.h" | |||
#elif defined(STM32L152xD) | |||
#include "stm32l152xd.h" | |||
#elif defined(STM32L152xDX) | |||
#include "stm32l152xdx.h" | |||
#elif defined(STM32L152xE) | |||
#include "stm32l152xe.h" | |||
#elif defined(STM32L162xC) | |||
#include "stm32l162xc.h" | |||
#elif defined(STM32L162xCA) | |||
#include "stm32l162xca.h" | |||
#elif defined(STM32L162xD) | |||
#include "stm32l162xd.h" | |||
#elif defined(STM32L162xDX) | |||
#include "stm32l162xdx.h" | |||
#elif defined(STM32L162xE) | |||
#include "stm32l162xe.h" | |||
#else | |||
#error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)" | |||
#endif | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup Exported_types | |||
* @{ | |||
*/ | |||
typedef enum | |||
{ | |||
RESET = 0, | |||
SET = !RESET | |||
} FlagStatus, ITStatus; | |||
typedef enum | |||
{ | |||
DISABLE = 0, | |||
ENABLE = !DISABLE | |||
} FunctionalState; | |||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) | |||
typedef enum | |||
{ | |||
SUCCESS = 0, | |||
ERROR = !SUCCESS | |||
} ErrorStatus; | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup Exported_macros | |||
* @{ | |||
*/ | |||
#define SET_BIT(REG, BIT) ((REG) |= (BIT)) | |||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) | |||
#define READ_BIT(REG, BIT) ((REG) & (BIT)) | |||
#define CLEAR_REG(REG) ((REG) = (0x0)) | |||
#define WRITE_REG(REG, VAL) ((REG) = (VAL)) | |||
#define READ_REG(REG) ((REG)) | |||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) | |||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) | |||
/** | |||
* @} | |||
*/ | |||
#if defined (USE_HAL_DRIVER) | |||
#include "stm32l1xx_hal.h" | |||
#endif /* USE_HAL_DRIVER */ | |||
#ifdef __cplusplus | |||
} | |||
#endif /* __cplusplus */ | |||
#endif /* __STM32L1xx_H */ | |||
/** | |||
* @} | |||
*/ | |||
/** | |||
* @} | |||
*/ | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@@ -0,0 +1,108 @@ | |||
/** | |||
****************************************************************************** | |||
* @file system_stm32l1xx.h | |||
* @author MCD Application Team | |||
* @brief CMSIS Cortex-M3 Device System Source File for STM32L1xx devices. | |||
****************************************************************************** | |||
* @attention | |||
* | |||
* <h2><center>© Copyright (c) 2017 STMicroelectronics. | |||
* All rights reserved.</center></h2> | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
/** @addtogroup CMSIS | |||
* @{ | |||
*/ | |||
/** @addtogroup stm32l1xx_system | |||
* @{ | |||
*/ | |||
/** | |||
* @brief Define to prevent recursive inclusion | |||
*/ | |||
#ifndef __SYSTEM_STM32L1XX_H | |||
#define __SYSTEM_STM32L1XX_H | |||
#ifdef __cplusplus | |||
extern "C" { | |||
#endif | |||
/** @addtogroup STM32L1xx_System_Includes | |||
* @{ | |||
*/ | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup STM32L1xx_System_Exported_types | |||
* @{ | |||
*/ | |||
/* This variable is updated in three ways: | |||
1) by calling CMSIS function SystemCoreClockUpdate() | |||
2) by calling HAL API function HAL_RCC_GetSysClockFreq() | |||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency | |||
Note: If you use this function to configure the system clock; then there | |||
is no need to call the 2 first functions listed above, since SystemCoreClock | |||
variable is updated automatically. | |||
*/ | |||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ | |||
/* | |||
*/ | |||
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ | |||
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ | |||
extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */ | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup STM32L1xx_System_Exported_Constants | |||
* @{ | |||
*/ | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup STM32L1xx_System_Exported_Macros | |||
* @{ | |||
*/ | |||
/** | |||
* @} | |||
*/ | |||
/** @addtogroup STM32L1xx_System_Exported_Functions | |||
* @{ | |||
*/ | |||
extern void SystemInit(void); | |||
extern void SystemCoreClockUpdate(void); | |||
/** | |||
* @} | |||
*/ | |||
#ifdef __cplusplus | |||
} | |||
#endif | |||
#endif /*__SYSTEM_STM32L1XX_H */ | |||
/** | |||
* @} | |||
*/ | |||
/** | |||
* @} | |||
*/ | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@@ -0,0 +1,314 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l100xb.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L100XB Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,314 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l100xba.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L100XBA Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,340 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l100xc.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L100XC Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,312 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xb.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XB Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,312 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xba.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XBA Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,340 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xc.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XC Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,340 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xca.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XC Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,346 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xd.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XD Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD SDIO_IRQHandler ; SDIO | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT SDIO_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
SDIO_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,344 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xdx.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XD-X Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,344 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l151xe.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L151XE Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD 0 ; Reserved | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,314 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xb.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XB Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,314 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xba.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XBA Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,341 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xc.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XC Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,342 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xca.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XCA Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,348 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xd.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XD Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD SDIO_IRQHandler ; SDIO | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT SDIO_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
SDIO_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,346 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xdx.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XD-X Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,346 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l152xe.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L152XE Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD 0 ; Reserved | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,344 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l162xc.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L162XC Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD AES_IRQHandler ; AES | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT AES_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
AES_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,344 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l162xca.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L162XCA Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD AES_IRQHandler ; AES | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT AES_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
AES_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,350 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l162xd.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L162XD Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD SDIO_IRQHandler ; SDIO | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD AES_IRQHandler ; AES | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT SDIO_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT AES_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
SDIO_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
AES_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,348 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l162xdx.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L162XD-X Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD AES_IRQHandler ; AES | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT AES_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
AES_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,348 @@ | |||
;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** | |||
;* File Name : startup_stm32l162xe.s | |||
;* Author : MCD Application Team | |||
;* Description : STM32L162XE Devices vector for MDK-ARM toolchain. | |||
;* This module performs: | |||
;* - Set the initial SP | |||
;* - Set the initial PC == Reset_Handler | |||
;* - Set the vector table entries with the exceptions ISR | |||
;* address. | |||
;* - Configure the system clock | |||
;* - Branches to __main in the C library (which eventually | |||
;* calls main()). | |||
;* After Reset the Cortex-M3 processor is in Thread mode, | |||
;* priority is Privileged, and the Stack is set to Main. | |||
;******************************************************************************** | |||
;* | |||
;* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
;* | |||
;* This software component is licensed by ST under BSD 3-Clause license, | |||
;* the "License"; You may not use this file except in compliance with the | |||
;* License. You may obtain a copy of the License at: | |||
;* opensource.org/licenses/BSD-3-Clause | |||
;* | |||
;******************************************************************************* | |||
;* <<< Use Configuration Wizard in Context Menu >>> | |||
; | |||
; Amount of memory (in bytes) allocated for Stack | |||
; Tailor this value to your application needs | |||
; <h> Stack Configuration | |||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Stack_Size EQU 0x00000400 | |||
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |||
Stack_Mem SPACE Stack_Size | |||
__initial_sp | |||
; <h> Heap Configuration | |||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |||
; </h> | |||
Heap_Size EQU 0x00000200 | |||
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |||
__heap_base | |||
Heap_Mem SPACE Heap_Size | |||
__heap_limit | |||
PRESERVE8 | |||
THUMB | |||
; Vector Table Mapped to Address 0 at Reset | |||
AREA RESET, DATA, READONLY | |||
EXPORT __Vectors | |||
EXPORT __Vectors_End | |||
EXPORT __Vectors_Size | |||
__Vectors DCD __initial_sp ; Top of Stack | |||
DCD Reset_Handler ; Reset Handler | |||
DCD NMI_Handler ; NMI Handler | |||
DCD HardFault_Handler ; Hard Fault Handler | |||
DCD MemManage_Handler ; MPU Fault Handler | |||
DCD BusFault_Handler ; Bus Fault Handler | |||
DCD UsageFault_Handler ; Usage Fault Handler | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD 0 ; Reserved | |||
DCD SVC_Handler ; SVCall Handler | |||
DCD DebugMon_Handler ; Debug Monitor Handler | |||
DCD 0 ; Reserved | |||
DCD PendSV_Handler ; PendSV Handler | |||
DCD SysTick_Handler ; SysTick Handler | |||
; External Interrupts | |||
DCD WWDG_IRQHandler ; Window Watchdog | |||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | |||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp | |||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup | |||
DCD FLASH_IRQHandler ; FLASH | |||
DCD RCC_IRQHandler ; RCC | |||
DCD EXTI0_IRQHandler ; EXTI Line 0 | |||
DCD EXTI1_IRQHandler ; EXTI Line 1 | |||
DCD EXTI2_IRQHandler ; EXTI Line 2 | |||
DCD EXTI3_IRQHandler ; EXTI Line 3 | |||
DCD EXTI4_IRQHandler ; EXTI Line 4 | |||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |||
DCD ADC1_IRQHandler ; ADC1 | |||
DCD USB_HP_IRQHandler ; USB High Priority | |||
DCD USB_LP_IRQHandler ; USB Low Priority | |||
DCD DAC_IRQHandler ; DAC | |||
DCD COMP_IRQHandler ; COMP through EXTI Line | |||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |||
DCD LCD_IRQHandler ; LCD | |||
DCD TIM9_IRQHandler ; TIM9 | |||
DCD TIM10_IRQHandler ; TIM10 | |||
DCD TIM11_IRQHandler ; TIM11 | |||
DCD TIM2_IRQHandler ; TIM2 | |||
DCD TIM3_IRQHandler ; TIM3 | |||
DCD TIM4_IRQHandler ; TIM4 | |||
DCD I2C1_EV_IRQHandler ; I2C1 Event | |||
DCD I2C1_ER_IRQHandler ; I2C1 Error | |||
DCD I2C2_EV_IRQHandler ; I2C2 Event | |||
DCD I2C2_ER_IRQHandler ; I2C2 Error | |||
DCD SPI1_IRQHandler ; SPI1 | |||
DCD SPI2_IRQHandler ; SPI2 | |||
DCD USART1_IRQHandler ; USART1 | |||
DCD USART2_IRQHandler ; USART2 | |||
DCD USART3_IRQHandler ; USART3 | |||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line | |||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend | |||
DCD TIM6_IRQHandler ; TIM6 | |||
DCD TIM7_IRQHandler ; TIM7 | |||
DCD 0 ; Reserved | |||
DCD TIM5_IRQHandler ; TIM5 | |||
DCD SPI3_IRQHandler ; SPI3 | |||
DCD UART4_IRQHandler ; UART4 | |||
DCD UART5_IRQHandler ; UART5 | |||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 | |||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 | |||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 | |||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 | |||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 | |||
DCD AES_IRQHandler ; AES | |||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition | |||
__Vectors_End | |||
__Vectors_Size EQU __Vectors_End - __Vectors | |||
AREA |.text|, CODE, READONLY | |||
; Reset handler routine | |||
Reset_Handler PROC | |||
EXPORT Reset_Handler [WEAK] | |||
IMPORT __main | |||
IMPORT SystemInit | |||
LDR R0, =SystemInit | |||
BLX R0 | |||
LDR R0, =__main | |||
BX R0 | |||
ENDP | |||
; Dummy Exception Handlers (infinite loops which can be modified) | |||
NMI_Handler PROC | |||
EXPORT NMI_Handler [WEAK] | |||
B . | |||
ENDP | |||
HardFault_Handler\ | |||
PROC | |||
EXPORT HardFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
MemManage_Handler\ | |||
PROC | |||
EXPORT MemManage_Handler [WEAK] | |||
B . | |||
ENDP | |||
BusFault_Handler\ | |||
PROC | |||
EXPORT BusFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
UsageFault_Handler\ | |||
PROC | |||
EXPORT UsageFault_Handler [WEAK] | |||
B . | |||
ENDP | |||
SVC_Handler PROC | |||
EXPORT SVC_Handler [WEAK] | |||
B . | |||
ENDP | |||
DebugMon_Handler\ | |||
PROC | |||
EXPORT DebugMon_Handler [WEAK] | |||
B . | |||
ENDP | |||
PendSV_Handler PROC | |||
EXPORT PendSV_Handler [WEAK] | |||
B . | |||
ENDP | |||
SysTick_Handler PROC | |||
EXPORT SysTick_Handler [WEAK] | |||
B . | |||
ENDP | |||
Default_Handler PROC | |||
EXPORT WWDG_IRQHandler [WEAK] | |||
EXPORT PVD_IRQHandler [WEAK] | |||
EXPORT TAMPER_STAMP_IRQHandler [WEAK] | |||
EXPORT RTC_WKUP_IRQHandler [WEAK] | |||
EXPORT FLASH_IRQHandler [WEAK] | |||
EXPORT RCC_IRQHandler [WEAK] | |||
EXPORT EXTI0_IRQHandler [WEAK] | |||
EXPORT EXTI1_IRQHandler [WEAK] | |||
EXPORT EXTI2_IRQHandler [WEAK] | |||
EXPORT EXTI3_IRQHandler [WEAK] | |||
EXPORT EXTI4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel5_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel6_IRQHandler [WEAK] | |||
EXPORT DMA1_Channel7_IRQHandler [WEAK] | |||
EXPORT ADC1_IRQHandler [WEAK] | |||
EXPORT USB_HP_IRQHandler [WEAK] | |||
EXPORT USB_LP_IRQHandler [WEAK] | |||
EXPORT DAC_IRQHandler [WEAK] | |||
EXPORT COMP_IRQHandler [WEAK] | |||
EXPORT EXTI9_5_IRQHandler [WEAK] | |||
EXPORT LCD_IRQHandler [WEAK] | |||
EXPORT TIM9_IRQHandler [WEAK] | |||
EXPORT TIM10_IRQHandler [WEAK] | |||
EXPORT TIM11_IRQHandler [WEAK] | |||
EXPORT TIM2_IRQHandler [WEAK] | |||
EXPORT TIM3_IRQHandler [WEAK] | |||
EXPORT TIM4_IRQHandler [WEAK] | |||
EXPORT I2C1_EV_IRQHandler [WEAK] | |||
EXPORT I2C1_ER_IRQHandler [WEAK] | |||
EXPORT I2C2_EV_IRQHandler [WEAK] | |||
EXPORT I2C2_ER_IRQHandler [WEAK] | |||
EXPORT SPI1_IRQHandler [WEAK] | |||
EXPORT SPI2_IRQHandler [WEAK] | |||
EXPORT USART1_IRQHandler [WEAK] | |||
EXPORT USART2_IRQHandler [WEAK] | |||
EXPORT USART3_IRQHandler [WEAK] | |||
EXPORT EXTI15_10_IRQHandler [WEAK] | |||
EXPORT RTC_Alarm_IRQHandler [WEAK] | |||
EXPORT USB_FS_WKUP_IRQHandler [WEAK] | |||
EXPORT TIM6_IRQHandler [WEAK] | |||
EXPORT TIM7_IRQHandler [WEAK] | |||
EXPORT TIM5_IRQHandler [WEAK] | |||
EXPORT SPI3_IRQHandler [WEAK] | |||
EXPORT UART4_IRQHandler [WEAK] | |||
EXPORT UART5_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel1_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel2_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel3_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel4_IRQHandler [WEAK] | |||
EXPORT DMA2_Channel5_IRQHandler [WEAK] | |||
EXPORT AES_IRQHandler [WEAK] | |||
EXPORT COMP_ACQ_IRQHandler [WEAK] | |||
WWDG_IRQHandler | |||
PVD_IRQHandler | |||
TAMPER_STAMP_IRQHandler | |||
RTC_WKUP_IRQHandler | |||
FLASH_IRQHandler | |||
RCC_IRQHandler | |||
EXTI0_IRQHandler | |||
EXTI1_IRQHandler | |||
EXTI2_IRQHandler | |||
EXTI3_IRQHandler | |||
EXTI4_IRQHandler | |||
DMA1_Channel1_IRQHandler | |||
DMA1_Channel2_IRQHandler | |||
DMA1_Channel3_IRQHandler | |||
DMA1_Channel4_IRQHandler | |||
DMA1_Channel5_IRQHandler | |||
DMA1_Channel6_IRQHandler | |||
DMA1_Channel7_IRQHandler | |||
ADC1_IRQHandler | |||
USB_HP_IRQHandler | |||
USB_LP_IRQHandler | |||
DAC_IRQHandler | |||
COMP_IRQHandler | |||
EXTI9_5_IRQHandler | |||
LCD_IRQHandler | |||
TIM9_IRQHandler | |||
TIM10_IRQHandler | |||
TIM11_IRQHandler | |||
TIM2_IRQHandler | |||
TIM3_IRQHandler | |||
TIM4_IRQHandler | |||
I2C1_EV_IRQHandler | |||
I2C1_ER_IRQHandler | |||
I2C2_EV_IRQHandler | |||
I2C2_ER_IRQHandler | |||
SPI1_IRQHandler | |||
SPI2_IRQHandler | |||
USART1_IRQHandler | |||
USART2_IRQHandler | |||
USART3_IRQHandler | |||
EXTI15_10_IRQHandler | |||
RTC_Alarm_IRQHandler | |||
USB_FS_WKUP_IRQHandler | |||
TIM6_IRQHandler | |||
TIM7_IRQHandler | |||
TIM5_IRQHandler | |||
SPI3_IRQHandler | |||
UART4_IRQHandler | |||
UART5_IRQHandler | |||
DMA2_Channel1_IRQHandler | |||
DMA2_Channel2_IRQHandler | |||
DMA2_Channel3_IRQHandler | |||
DMA2_Channel4_IRQHandler | |||
DMA2_Channel5_IRQHandler | |||
AES_IRQHandler | |||
COMP_ACQ_IRQHandler | |||
B . | |||
ENDP | |||
ALIGN | |||
;******************************************************************************* | |||
; User Stack and Heap initialization | |||
;******************************************************************************* | |||
IF :DEF:__MICROLIB | |||
EXPORT __initial_sp | |||
EXPORT __heap_base | |||
EXPORT __heap_limit | |||
ELSE | |||
IMPORT __use_two_region_memory | |||
EXPORT __user_initial_stackheap | |||
__user_initial_stackheap | |||
LDR R0, = Heap_Mem | |||
LDR R1, =(Stack_Mem + Stack_Size) | |||
LDR R2, = (Heap_Mem + Heap_Size) | |||
LDR R3, = Stack_Mem | |||
BX LR | |||
ALIGN | |||
ENDIF | |||
END | |||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
@@ -0,0 +1,379 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l100xb.s | |||
* @author MCD Application Team | |||
* @brief STM32L100XB Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L100XB devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,379 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l100xba.s | |||
* @author MCD Application Team | |||
* @brief STM32L100XBA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L100XBA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,400 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l100xc.s | |||
* @author MCD Application Team | |||
* @brief STM32L100XC Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L100XC devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,376 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xb.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XB Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XB devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,376 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xba.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XBA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XBA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,400 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xc.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XC Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XC devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,400 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xca.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XCA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XCA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,409 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xd.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XD Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word SDIO_IRQHandler | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XD devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak SDIO_IRQHandler | |||
.thumb_set SDIO_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,406 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xdx.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XD-X Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XD-X devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,406 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l151xe.s | |||
* @author MCD Application Team | |||
* @brief STM32L151XE Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word 0 | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L151XE devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,379 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xb.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XB Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XB devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,379 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xba.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XBA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XBA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,403 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xc.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XC Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XC devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,403 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xca.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XCA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XCA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,412 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xd.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XD Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word SDIO_IRQHandler | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XD devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak SDIO_IRQHandler | |||
.thumb_set SDIO_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,409 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xdx.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XD-X Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XD-X devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,409 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l152xe.s | |||
* @author MCD Application Team | |||
* @brief STM32L152XE Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word 0 | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L152XE devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,406 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l162xc.s | |||
* @author MCD Application Team | |||
* @brief STM32L162XC Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word AES_IRQHandler | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L162XC devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak AES_IRQHandler | |||
.thumb_set AES_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,406 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l162xca.s | |||
* @author MCD Application Team | |||
* @brief STM32L162XCA Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word AES_IRQHandler | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L162XCA devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak AES_IRQHandler | |||
.thumb_set AES_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,415 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l162xd.s | |||
* @author MCD Application Team | |||
* @brief STM32L162XD Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word SDIO_IRQHandler | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word AES_IRQHandler | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L162XD devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak SDIO_IRQHandler | |||
.thumb_set SDIO_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak AES_IRQHandler | |||
.thumb_set AES_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,412 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l162xdx.s | |||
* @author MCD Application Team | |||
* @brief STM32L162XD-X Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word AES_IRQHandler | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L162XD-X devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak AES_IRQHandler | |||
.thumb_set AES_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,412 @@ | |||
/** | |||
****************************************************************************** | |||
* @file startup_stm32l162xe.s | |||
* @author MCD Application Team | |||
* @brief STM32L162XE Devices vector table for GCC toolchain. | |||
* This module performs: | |||
* - Set the initial SP | |||
* - Set the initial PC == Reset_Handler, | |||
* - Set the vector table entries with the exceptions ISR address | |||
* - Configure the clock system | |||
* - Branches to main in the C library (which eventually | |||
* calls main()). | |||
* After Reset the Cortex-M3 processor is in Thread mode, | |||
* priority is Privileged, and the Stack is set to Main. | |||
****************************************************************************** | |||
* | |||
* @attention | |||
* | |||
* Copyright (c) 2017 STMicroelectronics. All rights reserved. | |||
* | |||
* This software component is licensed by ST under BSD 3-Clause license, | |||
* the "License"; You may not use this file except in compliance with the | |||
* License. You may obtain a copy of the License at: | |||
* opensource.org/licenses/BSD-3-Clause | |||
* | |||
****************************************************************************** | |||
*/ | |||
.syntax unified | |||
.cpu cortex-m3 | |||
.fpu softvfp | |||
.thumb | |||
.global g_pfnVectors | |||
.global Default_Handler | |||
/* start address for the initialization values of the .data section. | |||
defined in linker script */ | |||
.word _sidata | |||
/* start address for the .data section. defined in linker script */ | |||
.word _sdata | |||
/* end address for the .data section. defined in linker script */ | |||
.word _edata | |||
/* start address for the .bss section. defined in linker script */ | |||
.word _sbss | |||
/* end address for the .bss section. defined in linker script */ | |||
.word _ebss | |||
.equ BootRAM, 0xF108F85F | |||
/** | |||
* @brief This is the code that gets called when the processor first | |||
* starts execution following a reset event. Only the absolutely | |||
* necessary set is performed, after which the application | |||
* supplied main() routine is called. | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Reset_Handler | |||
.weak Reset_Handler | |||
.type Reset_Handler, %function | |||
Reset_Handler: | |||
/* Copy the data segment initializers from flash to SRAM */ | |||
movs r1, #0 | |||
b LoopCopyDataInit | |||
CopyDataInit: | |||
ldr r3, =_sidata | |||
ldr r3, [r3, r1] | |||
str r3, [r0, r1] | |||
adds r1, r1, #4 | |||
LoopCopyDataInit: | |||
ldr r0, =_sdata | |||
ldr r3, =_edata | |||
adds r2, r0, r1 | |||
cmp r2, r3 | |||
bcc CopyDataInit | |||
ldr r2, =_sbss | |||
b LoopFillZerobss | |||
/* Zero fill the bss segment. */ | |||
FillZerobss: | |||
movs r3, #0 | |||
str r3, [r2], #4 | |||
LoopFillZerobss: | |||
ldr r3, = _ebss | |||
cmp r2, r3 | |||
bcc FillZerobss | |||
/* Call the clock system intitialization function.*/ | |||
bl SystemInit | |||
/* Call static constructors */ | |||
bl __libc_init_array | |||
/* Call the application's entry point.*/ | |||
bl main | |||
bx lr | |||
.size Reset_Handler, .-Reset_Handler | |||
/** | |||
* @brief This is the code that gets called when the processor receives an | |||
* unexpected interrupt. This simply enters an infinite loop, preserving | |||
* the system state for examination by a debugger. | |||
* | |||
* @param None | |||
* @retval : None | |||
*/ | |||
.section .text.Default_Handler,"ax",%progbits | |||
Default_Handler: | |||
Infinite_Loop: | |||
b Infinite_Loop | |||
.size Default_Handler, .-Default_Handler | |||
/****************************************************************************** | |||
* | |||
* The minimal vector table for a Cortex M3. Note that the proper constructs | |||
* must be placed on this to ensure that it ends up at physical address | |||
* 0x0000.0000. | |||
* | |||
******************************************************************************/ | |||
.section .isr_vector,"a",%progbits | |||
.type g_pfnVectors, %object | |||
.size g_pfnVectors, .-g_pfnVectors | |||
g_pfnVectors: | |||
.word _estack | |||
.word Reset_Handler | |||
.word NMI_Handler | |||
.word HardFault_Handler | |||
.word MemManage_Handler | |||
.word BusFault_Handler | |||
.word UsageFault_Handler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word SVC_Handler | |||
.word DebugMon_Handler | |||
.word 0 | |||
.word PendSV_Handler | |||
.word SysTick_Handler | |||
.word WWDG_IRQHandler | |||
.word PVD_IRQHandler | |||
.word TAMPER_STAMP_IRQHandler | |||
.word RTC_WKUP_IRQHandler | |||
.word FLASH_IRQHandler | |||
.word RCC_IRQHandler | |||
.word EXTI0_IRQHandler | |||
.word EXTI1_IRQHandler | |||
.word EXTI2_IRQHandler | |||
.word EXTI3_IRQHandler | |||
.word EXTI4_IRQHandler | |||
.word DMA1_Channel1_IRQHandler | |||
.word DMA1_Channel2_IRQHandler | |||
.word DMA1_Channel3_IRQHandler | |||
.word DMA1_Channel4_IRQHandler | |||
.word DMA1_Channel5_IRQHandler | |||
.word DMA1_Channel6_IRQHandler | |||
.word DMA1_Channel7_IRQHandler | |||
.word ADC1_IRQHandler | |||
.word USB_HP_IRQHandler | |||
.word USB_LP_IRQHandler | |||
.word DAC_IRQHandler | |||
.word COMP_IRQHandler | |||
.word EXTI9_5_IRQHandler | |||
.word LCD_IRQHandler | |||
.word TIM9_IRQHandler | |||
.word TIM10_IRQHandler | |||
.word TIM11_IRQHandler | |||
.word TIM2_IRQHandler | |||
.word TIM3_IRQHandler | |||
.word TIM4_IRQHandler | |||
.word I2C1_EV_IRQHandler | |||
.word I2C1_ER_IRQHandler | |||
.word I2C2_EV_IRQHandler | |||
.word I2C2_ER_IRQHandler | |||
.word SPI1_IRQHandler | |||
.word SPI2_IRQHandler | |||
.word USART1_IRQHandler | |||
.word USART2_IRQHandler | |||
.word USART3_IRQHandler | |||
.word EXTI15_10_IRQHandler | |||
.word RTC_Alarm_IRQHandler | |||
.word USB_FS_WKUP_IRQHandler | |||
.word TIM6_IRQHandler | |||
.word TIM7_IRQHandler | |||
.word 0 | |||
.word TIM5_IRQHandler | |||
.word SPI3_IRQHandler | |||
.word UART4_IRQHandler | |||
.word UART5_IRQHandler | |||
.word DMA2_Channel1_IRQHandler | |||
.word DMA2_Channel2_IRQHandler | |||
.word DMA2_Channel3_IRQHandler | |||
.word DMA2_Channel4_IRQHandler | |||
.word DMA2_Channel5_IRQHandler | |||
.word AES_IRQHandler | |||
.word COMP_ACQ_IRQHandler | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word 0 | |||
.word BootRAM /* @0x108. This is for boot in RAM mode for | |||
STM32L162XE devices. */ | |||
/******************************************************************************* | |||
* | |||
* Provide weak aliases for each Exception handler to the Default_Handler. | |||
* As they are weak aliases, any function with the same name will override | |||
* this definition. | |||
* | |||
*******************************************************************************/ | |||
.weak NMI_Handler | |||
.thumb_set NMI_Handler,Default_Handler | |||
.weak HardFault_Handler | |||
.thumb_set HardFault_Handler,Default_Handler | |||
.weak MemManage_Handler | |||
.thumb_set MemManage_Handler,Default_Handler | |||
.weak BusFault_Handler | |||
.thumb_set BusFault_Handler,Default_Handler | |||
.weak UsageFault_Handler | |||
.thumb_set UsageFault_Handler,Default_Handler | |||
.weak SVC_Handler | |||
.thumb_set SVC_Handler,Default_Handler | |||
.weak DebugMon_Handler | |||
.thumb_set DebugMon_Handler,Default_Handler | |||
.weak PendSV_Handler | |||
.thumb_set PendSV_Handler,Default_Handler | |||
.weak SysTick_Handler | |||
.thumb_set SysTick_Handler,Default_Handler | |||
.weak WWDG_IRQHandler | |||
.thumb_set WWDG_IRQHandler,Default_Handler | |||
.weak PVD_IRQHandler | |||
.thumb_set PVD_IRQHandler,Default_Handler | |||
.weak TAMPER_STAMP_IRQHandler | |||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler | |||
.weak RTC_WKUP_IRQHandler | |||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler | |||
.weak FLASH_IRQHandler | |||
.thumb_set FLASH_IRQHandler,Default_Handler | |||
.weak RCC_IRQHandler | |||
.thumb_set RCC_IRQHandler,Default_Handler | |||
.weak EXTI0_IRQHandler | |||
.thumb_set EXTI0_IRQHandler,Default_Handler | |||
.weak EXTI1_IRQHandler | |||
.thumb_set EXTI1_IRQHandler,Default_Handler | |||
.weak EXTI2_IRQHandler | |||
.thumb_set EXTI2_IRQHandler,Default_Handler | |||
.weak EXTI3_IRQHandler | |||
.thumb_set EXTI3_IRQHandler,Default_Handler | |||
.weak EXTI4_IRQHandler | |||
.thumb_set EXTI4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel1_IRQHandler | |||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler | |||
.weak DMA1_Channel2_IRQHandler | |||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler | |||
.weak DMA1_Channel3_IRQHandler | |||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler | |||
.weak DMA1_Channel4_IRQHandler | |||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler | |||
.weak DMA1_Channel5_IRQHandler | |||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler | |||
.weak DMA1_Channel6_IRQHandler | |||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler | |||
.weak DMA1_Channel7_IRQHandler | |||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler | |||
.weak ADC1_IRQHandler | |||
.thumb_set ADC1_IRQHandler,Default_Handler | |||
.weak USB_HP_IRQHandler | |||
.thumb_set USB_HP_IRQHandler,Default_Handler | |||
.weak USB_LP_IRQHandler | |||
.thumb_set USB_LP_IRQHandler,Default_Handler | |||
.weak DAC_IRQHandler | |||
.thumb_set DAC_IRQHandler,Default_Handler | |||
.weak COMP_IRQHandler | |||
.thumb_set COMP_IRQHandler,Default_Handler | |||
.weak EXTI9_5_IRQHandler | |||
.thumb_set EXTI9_5_IRQHandler,Default_Handler | |||
.weak LCD_IRQHandler | |||
.thumb_set LCD_IRQHandler,Default_Handler | |||
.weak TIM9_IRQHandler | |||
.thumb_set TIM9_IRQHandler,Default_Handler | |||
.weak TIM10_IRQHandler | |||
.thumb_set TIM10_IRQHandler,Default_Handler | |||
.weak TIM11_IRQHandler | |||
.thumb_set TIM11_IRQHandler,Default_Handler | |||
.weak TIM2_IRQHandler | |||
.thumb_set TIM2_IRQHandler,Default_Handler | |||
.weak TIM3_IRQHandler | |||
.thumb_set TIM3_IRQHandler,Default_Handler | |||
.weak TIM4_IRQHandler | |||
.thumb_set TIM4_IRQHandler,Default_Handler | |||
.weak I2C1_EV_IRQHandler | |||
.thumb_set I2C1_EV_IRQHandler,Default_Handler | |||
.weak I2C1_ER_IRQHandler | |||
.thumb_set I2C1_ER_IRQHandler,Default_Handler | |||
.weak I2C2_EV_IRQHandler | |||
.thumb_set I2C2_EV_IRQHandler,Default_Handler | |||
.weak I2C2_ER_IRQHandler | |||
.thumb_set I2C2_ER_IRQHandler,Default_Handler | |||
.weak SPI1_IRQHandler | |||
.thumb_set SPI1_IRQHandler,Default_Handler | |||
.weak SPI2_IRQHandler | |||
.thumb_set SPI2_IRQHandler,Default_Handler | |||
.weak USART1_IRQHandler | |||
.thumb_set USART1_IRQHandler,Default_Handler | |||
.weak USART2_IRQHandler | |||
.thumb_set USART2_IRQHandler,Default_Handler | |||
.weak USART3_IRQHandler | |||
.thumb_set USART3_IRQHandler,Default_Handler | |||
.weak EXTI15_10_IRQHandler | |||
.thumb_set EXTI15_10_IRQHandler,Default_Handler | |||
.weak RTC_Alarm_IRQHandler | |||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler | |||
.weak USB_FS_WKUP_IRQHandler | |||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler | |||
.weak TIM6_IRQHandler | |||
.thumb_set TIM6_IRQHandler,Default_Handler | |||
.weak TIM7_IRQHandler | |||
.thumb_set TIM7_IRQHandler,Default_Handler | |||
.weak TIM5_IRQHandler | |||
.thumb_set TIM5_IRQHandler,Default_Handler | |||
.weak SPI3_IRQHandler | |||
.thumb_set SPI3_IRQHandler,Default_Handler | |||
.weak UART4_IRQHandler | |||
.thumb_set UART4_IRQHandler,Default_Handler | |||
.weak UART5_IRQHandler | |||
.thumb_set UART5_IRQHandler,Default_Handler | |||
.weak DMA2_Channel1_IRQHandler | |||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler | |||
.weak DMA2_Channel2_IRQHandler | |||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler | |||
.weak DMA2_Channel3_IRQHandler | |||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler | |||
.weak DMA2_Channel4_IRQHandler | |||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler | |||
.weak DMA2_Channel5_IRQHandler | |||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler | |||
.weak AES_IRQHandler | |||
.thumb_set AES_IRQHandler,Default_Handler | |||
.weak COMP_ACQ_IRQHandler | |||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler | |||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |||
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0805FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,34 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0802FFFF; | |||
define symbol __ICFEDIT_region_ROM1_start__ = 0x08040000 ; | |||
define symbol __ICFEDIT_region_ROM1_end__ = 0x0806FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] | | |||
mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0805FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x1000; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,34 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x08000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x0802FFFF; | |||
define symbol __ICFEDIT_region_ROM1_start__ = 0x08040000 ; | |||
define symbol __ICFEDIT_region_ROM1_end__ = 0x0806FFFF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] | | |||
mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |
@@ -0,0 +1,31 @@ | |||
/*###ICF### Section handled by ICF editor, don't touch! ****/ | |||
/*-Editor annotation file-*/ | |||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ | |||
/*-Specials-*/ | |||
define symbol __ICFEDIT_intvec_start__ = 0x20000000; | |||
/*-Memory Regions-*/ | |||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; | |||
define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; | |||
define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; | |||
define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; | |||
/*-Sizes-*/ | |||
define symbol __ICFEDIT_size_cstack__ = 0x400; | |||
define symbol __ICFEDIT_size_heap__ = 0x200; | |||
/**** End of ICF editor section. ###ICF###*/ | |||
define memory mem with size = 4G; | |||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; | |||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; | |||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; | |||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; | |||
initialize by copy { readwrite }; | |||
do not initialize { section .noinit }; | |||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; | |||
place in ROM_region { readonly }; | |||
place in RAM_region { readwrite, | |||
block CSTACK, block HEAP }; |