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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_eth_ex.c
  4. * @author MCD Application Team
  5. * @version V1.2.0
  6. * @date 29-December-2017
  7. * @brief ETH HAL Extended module driver.
  8. *
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  13. *
  14. * Redistribution and use in source and binary forms, with or without modification,
  15. * are permitted provided that the following conditions are met:
  16. * 1. Redistributions of source code must retain the above copyright notice,
  17. * this list of conditions and the following disclaimer.
  18. * 2. Redistributions in binary form must reproduce the above copyright notice,
  19. * this list of conditions and the following disclaimer in the documentation
  20. * and/or other materials provided with the distribution.
  21. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  22. * may be used to endorse or promote products derived from this software
  23. * without specific prior written permission.
  24. *
  25. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  29. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  31. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  32. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. ******************************************************************************
  37. */
  38. /* Includes ------------------------------------------------------------------*/
  39. #include "stm32h7xx_hal.h"
  40. /** @addtogroup STM32H7xx_HAL_Driver
  41. * @{
  42. */
  43. /** @defgroup ETHEx ETHEx
  44. * @brief ETH HAL Extended module driver
  45. * @{
  46. */
  47. #ifdef HAL_ETH_MODULE_ENABLED
  48. /* Private typedef -----------------------------------------------------------*/
  49. /* Private define ------------------------------------------------------------*/
  50. /** @defgroup ETHEx_Private_Constants ETHEx Private Constants
  51. * @{
  52. */
  53. #define ETH_MACL4CR_MASK (ETH_MACL3L4CR_L4PEN | ETH_MACL3L4CR_L4SPM | \
  54. ETH_MACL3L4CR_L4SPIM | ETH_MACL3L4CR_L4DPM | \
  55. ETH_MACL3L4CR_L4DPIM)
  56. #define ETH_MACL3CR_MASK (ETH_MACL3L4CR_L3PEN | ETH_MACL3L4CR_L3SAM | \
  57. ETH_MACL3L4CR_L3SAIM | ETH_MACL3L4CR_L3DAM | \
  58. ETH_MACL3L4CR_L3DAIM | ETH_MACL3L4CR_L3HSBM | \
  59. ETH_MACL3L4CR_L3HDBM)
  60. #define ETH_MACRXVLAN_MASK (ETH_MACVTR_EIVLRXS | ETH_MACVTR_EIVLS | \
  61. ETH_MACVTR_ERIVLT | ETH_MACVTR_EDVLP | \
  62. ETH_MACVTR_VTHM | ETH_MACVTR_EVLRXS | \
  63. ETH_MACVTR_EVLS | ETH_MACVTR_DOVLTC | \
  64. ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL | \
  65. ETH_MACVTR_VTIM | ETH_MACVTR_ETV)
  66. #define ETH_MACTXVLAN_MASK (ETH_MACVIR_VLTI | ETH_MACVIR_CSVL | \
  67. ETH_MACVIR_VLP | ETH_MACVIR_VLC)
  68. /**
  69. * @}
  70. */
  71. /* Private macros ------------------------------------------------------------*/
  72. /* Private function prototypes -----------------------------------------------*/
  73. /* Exported functions ---------------------------------------------------------*/
  74. /** @defgroup ETHEx_Exported_Functions ETH Extended Exported Functions
  75. * @{
  76. */
  77. /** @defgroup ETHEx_Exported_Functions_Group1 Extended features functions
  78. * @brief Extended features functions
  79. *
  80. @verbatim
  81. ===============================================================================
  82. ##### Extended features functions #####
  83. ===============================================================================
  84. [..] This section provides functions allowing to:
  85. (+) Configure ARP offload module
  86. (+) Configure L3 and L4 filters
  87. (+) Configure Extended VLAN features
  88. (+) Configure Energy Efficient Ethernet module
  89. @endverbatim
  90. * @{
  91. */
  92. /**
  93. * @brief Enables ARP Offload.
  94. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  95. * the configuration information for ETHERNET module
  96. * @retval None
  97. */
  98. void HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef *heth)
  99. {
  100. SET_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
  101. }
  102. /**
  103. * @brief Disables ARP Offload.
  104. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  105. * the configuration information for ETHERNET module
  106. * @retval None
  107. */
  108. void HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef *heth)
  109. {
  110. CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
  111. }
  112. /**
  113. * @brief Set the ARP Match IP address
  114. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  115. * the configuration information for ETHERNET module
  116. * @param IpAddress: IP Address to be matched for incoming ARP requests
  117. * @retval None
  118. */
  119. void HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef *heth, uint32_t IpAddress)
  120. {
  121. WRITE_REG(heth->Instance->MACARPAR, IpAddress);
  122. }
  123. /**
  124. * @brief Configures the L4 Filter, this function allow to:
  125. * set the layer 4 protocol to be matched (TCP or UDP)
  126. * enable/disable L4 source/destination port perfect/inverse match.
  127. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  128. * the configuration information for ETHERNET module
  129. * @param Filter: L4 filter to configured, this parameter must be one of the following
  130. * ETH_L4_FILTER_0
  131. * ETH_L4_FILTER_1
  132. * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
  133. * that contains L4 filter configuration.
  134. * @retval HAL status
  135. */
  136. HAL_StatusTypeDef HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter , ETH_L4FilterConfigTypeDef *pL4FilterConfig)
  137. {
  138. __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
  139. if(pL4FilterConfig == NULL)
  140. {
  141. return HAL_ERROR;
  142. }
  143. /* Write configuration to (MACL3L4C0R + filter )register */
  144. MODIFY_REG(*configreg, ETH_MACL4CR_MASK ,(pL4FilterConfig->Protocol |
  145. pL4FilterConfig->SrcPortFilterMatch |
  146. pL4FilterConfig->DestPortFilterMatch));
  147. configreg = ((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter));
  148. /* Write configuration to (MACL4A0R + filter )register */
  149. MODIFY_REG(*configreg, (ETH_MACL4AR_L4DP | ETH_MACL4AR_L4SP) , (pL4FilterConfig->SourcePort |
  150. (pL4FilterConfig->DestinationPort << 16)));
  151. /* Enable L4 filter */
  152. SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
  153. return HAL_OK;
  154. }
  155. /**
  156. * @brief Configures the L4 Filter, this function allow to:
  157. * set the layer 4 protocol to be matched (TCP or UDP)
  158. * enable/disable L4 source/destination port perfect/inverse match.
  159. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  160. * the configuration information for ETHERNET module
  161. * @param Filter: L4 filter to configured, this parameter must be one of the following
  162. * ETH_L4_FILTER_0
  163. * ETH_L4_FILTER_1
  164. * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
  165. * that contains L4 filter configuration.
  166. * @retval HAL status
  167. */
  168. HAL_StatusTypeDef HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L4FilterConfigTypeDef *pL4FilterConfig)
  169. {
  170. if(pL4FilterConfig == NULL)
  171. {
  172. return HAL_ERROR;
  173. }
  174. /* Get configuration to (MACL3L4C0R + filter )register */
  175. pL4FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L4PEN);
  176. pL4FilterConfig->DestPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4DPM | ETH_MACL3L4CR_L4DPIM));
  177. pL4FilterConfig->SrcPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4SPM | ETH_MACL3L4CR_L4SPIM));
  178. /* Get configuration to (MACL3L4C0R + filter )register */
  179. pL4FilterConfig->DestinationPort = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4DP) >> 16);
  180. pL4FilterConfig->SourcePort = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4SP);
  181. return HAL_OK;
  182. }
  183. /**
  184. * @brief Configures the L3 Filter, this function allow to:
  185. * set the layer 3 protocol to be matched (IPv4 or IPv6)
  186. * enable/disable L3 source/destination port perfect/inverse match.
  187. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  188. * the configuration information for ETHERNET module
  189. * @param Filter: L3 filter to configured, this parameter must be one of the following
  190. * ETH_L3_FILTER_0
  191. * ETH_L3_FILTER_1
  192. * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
  193. * that contains L3 filter configuration.
  194. * @retval HAL status
  195. */
  196. HAL_StatusTypeDef HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig)
  197. {
  198. __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
  199. if(pL3FilterConfig == NULL)
  200. {
  201. return HAL_ERROR;
  202. }
  203. /* Write configuration to (MACL3L4C0R + filter )register */
  204. MODIFY_REG(*configreg, ETH_MACL3CR_MASK, (pL3FilterConfig->Protocol |
  205. pL3FilterConfig->SrcAddrFilterMatch |
  206. pL3FilterConfig->DestAddrFilterMatch |
  207. (pL3FilterConfig->SrcAddrHigherBitsMatch << 6) |
  208. (pL3FilterConfig->DestAddrHigherBitsMatch << 11)));
  209. /* Check if IPv6 protocol is selected */
  210. if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
  211. {
  212. /* Set the IPv6 address match */
  213. /* Set Bits[31:0] of 128-bit IP addr */
  214. *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip6Addr[0];
  215. /* Set Bits[63:32] of 128-bit IP addr */
  216. *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip6Addr[1];
  217. /* update Bits[95:64] of 128-bit IP addr */
  218. *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter)) = pL3FilterConfig->Ip6Addr[2];
  219. /* update Bits[127:96] of 128-bit IP addr */
  220. *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter)) = pL3FilterConfig->Ip6Addr[3];
  221. }
  222. else /* IPv4 protocol is selected */
  223. {
  224. /* Set the IPv4 source address match */
  225. *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip4SrcAddr;
  226. /* Set the IPv4 destination address match */
  227. *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip4DestAddr;
  228. }
  229. return HAL_OK;
  230. }
  231. /**
  232. * @brief Configures the L3 Filter, this function allow to:
  233. * set the layer 3 protocol to be matched (IPv4 or IPv6)
  234. * enable/disable L3 source/destination port perfect/inverse match.
  235. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  236. * the configuration information for ETHERNET module
  237. * @param Filter: L3 filter to configured, this parameter must be one of the following
  238. * ETH_L3_FILTER_0
  239. * ETH_L3_FILTER_1
  240. * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
  241. * that will contain the L3 filter configuration.
  242. * @retval HAL status
  243. */
  244. HAL_StatusTypeDef HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig)
  245. {
  246. if(pL3FilterConfig == NULL)
  247. {
  248. return HAL_ERROR;
  249. }
  250. pL3FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3PEN);
  251. pL3FilterConfig->SrcAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3SAM | ETH_MACL3L4CR_L3SAIM));
  252. pL3FilterConfig->DestAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3DAM | ETH_MACL3L4CR_L3DAIM));
  253. pL3FilterConfig->SrcAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HSBM) >> 6);
  254. pL3FilterConfig->DestAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HDBM) >> 11);
  255. if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
  256. {
  257. pL3FilterConfig->Ip6Addr[0] = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
  258. pL3FilterConfig->Ip6Addr[1] = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
  259. pL3FilterConfig->Ip6Addr[2] = *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter));
  260. pL3FilterConfig->Ip6Addr[3] = *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter));
  261. }
  262. else
  263. {
  264. pL3FilterConfig->Ip4SrcAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
  265. pL3FilterConfig->Ip4DestAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
  266. }
  267. return HAL_OK;
  268. }
  269. /**
  270. * @brief Enables L3 and L4 filtering process.
  271. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  272. * the configuration information for ETHERNET module
  273. * @retval None.
  274. */
  275. void HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef *heth)
  276. {
  277. /* Enable L3/L4 filter */
  278. SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
  279. }
  280. /**
  281. * @brief Disables L3 and L4 filtering process.
  282. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  283. * the configuration information for ETHERNET module
  284. * @retval None.
  285. */
  286. void HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef *heth)
  287. {
  288. /* Disable L3/L4 filter */
  289. CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
  290. }
  291. /**
  292. * @brief Get the VLAN Configuration for Receive Packets.
  293. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  294. * the configuration information for ETHERNET module
  295. * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
  296. * that will contain the VLAN filter configuration.
  297. * @retval HAL status
  298. */
  299. HAL_StatusTypeDef HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
  300. {
  301. if(pVlanConfig == NULL)
  302. {
  303. return HAL_ERROR;
  304. }
  305. pVlanConfig->InnerVLANTagInStatus = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLRXS) >> 31);
  306. pVlanConfig->StripInnerVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLS);
  307. pVlanConfig->InnerVLANTag = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27);
  308. pVlanConfig->DoubleVLANProcessing = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP) >> 26);
  309. pVlanConfig->VLANTagHashTableMatch = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTHM) >> 25);
  310. pVlanConfig->VLANTagInStatus = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24);
  311. pVlanConfig->StripVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLS);
  312. pVlanConfig->VLANTypeCheck = READ_BIT(heth->Instance->MACVTR, (ETH_MACVTR_DOVLTC | ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL));
  313. pVlanConfig->VLANTagInverceMatch = (FunctionalState)(READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17);
  314. return HAL_OK;
  315. }
  316. /**
  317. * @brief Set the VLAN Configuration for Receive Packets.
  318. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  319. * the configuration information for ETHERNET module
  320. * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
  321. * that contains VLAN filter configuration.
  322. * @retval HAL status
  323. */
  324. HAL_StatusTypeDef HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
  325. {
  326. if(pVlanConfig == NULL)
  327. {
  328. return HAL_ERROR;
  329. }
  330. /* Write config to MACVTR */
  331. MODIFY_REG(heth->Instance->MACVTR, ETH_MACRXVLAN_MASK, ((uint32_t)(pVlanConfig->InnerVLANTagInStatus << 31) |
  332. pVlanConfig->StripInnerVLANTag |
  333. (uint32_t)(pVlanConfig->InnerVLANTag << 27) |
  334. (uint32_t)(pVlanConfig->DoubleVLANProcessing << 26) |
  335. (uint32_t)(pVlanConfig->VLANTagHashTableMatch << 25) |
  336. (uint32_t)(pVlanConfig->VLANTagInStatus << 24) |
  337. pVlanConfig->StripVLANTag |
  338. pVlanConfig->VLANTypeCheck |
  339. (uint32_t)(pVlanConfig->VLANTagInverceMatch << 17)));
  340. return HAL_OK;
  341. }
  342. /**
  343. * @brief Set the VLAN Hash Table
  344. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  345. * the configuration information for ETHERNET module
  346. * @param VLANHashTable: VLAN hash table 16 bit value
  347. * @retval None
  348. */
  349. void HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef *heth, uint32_t VLANHashTable)
  350. {
  351. MODIFY_REG(heth->Instance->MACVHTR, ETH_MACVHTR_VLHT, VLANHashTable);
  352. }
  353. /**
  354. * @brief Get the VLAN Configuration for Transmit Packets.
  355. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  356. * the configuration information for ETHERNET module
  357. * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
  358. * ETH_OUTER_TX_VLANTAG
  359. * ETH_INNER_TX_VLANTAG
  360. * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
  361. * that will contain the Tx VLAN filter configuration.
  362. * @retval HAL Status.
  363. */
  364. HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig)
  365. {
  366. if (pVlanConfig == NULL)
  367. {
  368. return HAL_ERROR;
  369. }
  370. if(VLANTag == ETH_INNER_TX_VLANTAG)
  371. {
  372. pVlanConfig->SourceTxDesc = (FunctionalState)(READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20);
  373. pVlanConfig->SVLANType = (FunctionalState)(READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19);
  374. pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACIVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
  375. }
  376. else
  377. {
  378. pVlanConfig->SourceTxDesc = (FunctionalState)(READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20);
  379. pVlanConfig->SVLANType = (FunctionalState)(READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19);
  380. pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
  381. }
  382. return HAL_OK;;
  383. }
  384. /**
  385. * @brief Set the VLAN Configuration for Transmit Packets.
  386. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  387. * the configuration information for ETHERNET module
  388. * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
  389. * ETH_OUTER_TX_VLANTAG
  390. * ETH_INNER_TX_VLANTAG
  391. * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
  392. * that contains Tx VLAN filter configuration.
  393. * @retval HAL Status
  394. */
  395. HAL_StatusTypeDef HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig)
  396. {
  397. if(VLANTag == ETH_INNER_TX_VLANTAG)
  398. {
  399. MODIFY_REG(heth->Instance->MACIVIR, ETH_MACTXVLAN_MASK, ((uint32_t)(pVlanConfig->SourceTxDesc << 20) |
  400. (uint32_t)(pVlanConfig->SVLANType << 19) |
  401. pVlanConfig->VLANTagControl));
  402. /* Enable Double VLAN processing */
  403. SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
  404. }
  405. else
  406. {
  407. MODIFY_REG(heth->Instance->MACVIR, ETH_MACTXVLAN_MASK, ((uint32_t)(pVlanConfig->SourceTxDesc << 20) |
  408. (uint32_t)(pVlanConfig->SVLANType << 19) |
  409. pVlanConfig->VLANTagControl));
  410. }
  411. return HAL_OK;
  412. }
  413. /**
  414. * @brief Set the VLAN Tag Identifier for Transmit Packets.
  415. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  416. * the configuration information for ETHERNET module
  417. * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
  418. * ETH_OUTER_TX_VLANTAG
  419. * ETH_INNER_TX_VLANTAG
  420. * @param VLANIdentifier: VLAN Identifier 16 bit value
  421. * @retval None
  422. */
  423. void HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t VLANTag ,uint32_t VLANIdentifier)
  424. {
  425. if(VLANTag == ETH_INNER_TX_VLANTAG)
  426. {
  427. MODIFY_REG(heth->Instance->MACIVIR, ETH_MACVIR_VLT, VLANIdentifier);
  428. }
  429. else
  430. {
  431. MODIFY_REG(heth->Instance->MACVIR, ETH_MACVIR_VLT, VLANIdentifier);
  432. }
  433. }
  434. /**
  435. * @brief Enables the VLAN Tag Filtering process.
  436. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  437. * the configuration information for ETHERNET module
  438. * @retval None.
  439. */
  440. void HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef *heth)
  441. {
  442. /* Enable VLAN processing */
  443. SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
  444. }
  445. /**
  446. * @brief Disables the VLAN Tag Filtering process.
  447. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  448. * the configuration information for ETHERNET module
  449. * @retval None.
  450. */
  451. void HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef *heth)
  452. {
  453. /* Disable VLAN processing */
  454. CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
  455. }
  456. /**
  457. * @brief Enters the Low Power Idle (LPI) mode
  458. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  459. * the configuration information for ETHERNET module
  460. * @param TxAutomate: Enable/Disbale automate enter/exit LPI mode.
  461. * @param TxClockStop: Enable/Disbale Tx clock stop in LPI mode.
  462. * @retval None
  463. */
  464. void HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef *heth, FunctionalState TxAutomate, FunctionalState TxClockStop)
  465. {
  466. /* Enable LPI Interrupts */
  467. __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_LPIIE);
  468. /* Write to LPI Control register: Enter low power mode */
  469. MODIFY_REG(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE), (((uint32_t)TxAutomate << 19) |
  470. ((uint32_t)TxClockStop << 21) |
  471. ETH_MACLCSR_LPIEN));
  472. }
  473. /**
  474. * @brief Exits the Low Power Idle (LPI) mode.
  475. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  476. * the configuration information for ETHERNET module
  477. * @retval None
  478. */
  479. void HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef *heth)
  480. {
  481. /* Clear the LPI Config and exit low power mode */
  482. CLEAR_BIT(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE));
  483. /* Enable LPI Interrupts */
  484. __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_LPIIE);
  485. }
  486. /**
  487. * @brief Returns the ETH MAC LPI event
  488. * @param heth: pointer to a ETH_HandleTypeDef structure that contains
  489. * the configuration information for ETHERNET module
  490. * @retval ETH MAC WakeUp event
  491. */
  492. uint32_t HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef *heth)
  493. {
  494. return heth->MACLPIEvent;
  495. }
  496. /**
  497. * @}
  498. */
  499. /**
  500. * @}
  501. */
  502. #endif /* HAL_ETH_MODULE_ENABLED */
  503. /**
  504. * @}
  505. */
  506. /**
  507. * @}
  508. */
  509. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/