You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 

2091 lines
71 KiB

  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_tim_ex.c
  4. * @author MCD Application Team
  5. * @version V1.2.0
  6. * @date 29-December-2017
  7. * @brief TIM HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Timer Extended peripheral:
  10. * + Time Hall Sensor Interface Initialization
  11. * + Time Hall Sensor Interface Start
  12. * + Time Complementary signal bread and dead time configuration
  13. * + Time Master and Slave synchronization configuration
  14. * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
  15. * + Time OCRef clear configuration
  16. * + Timer remapping capabilities configuration
  17. @verbatim
  18. ==============================================================================
  19. ##### TIM Extended features #####
  20. ==============================================================================
  21. [..]
  22. The Timer Extended features include:
  23. (#) Complementary outputs with programmable dead-time for :
  24. (++) Output Compare
  25. (++) PWM generation (Edge and Center-aligned Mode)
  26. (++) One-pulse mode output
  27. (#) Synchronization circuit to control the timer with external signals and to
  28. interconnect several timers together.
  29. (#) Break input to put the timer output signals in reset state or in a known state.
  30. (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  31. positioning purposes
  32. ##### How to use this driver #####
  33. ==============================================================================
  34. [..]
  35. (#) Initialize the TIM low level resources by implementing the following functions
  36. depending from feature used :
  37. (++) Complementary Output Compare : HAL_TIM_OC_MspInit().
  38. (++) Complementary PWM generation : HAL_TIM_PWM_MspInit().
  39. (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit().
  40. (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit().
  41. (#) Initialize the TIM low level resources :
  42. (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  43. (##) TIM pins configuration
  44. (+++) Enable the clock for the TIM GPIOs using the following function:
  45. __HAL_RCC_GPIOx_CLK_ENABLE();
  46. (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  47. (#) The external Clock can be configured, if needed (the default clock is the
  48. internal clock from the APBx), using the following function:
  49. HAL_TIM_ConfigClockSource, the clock configuration should be done before
  50. any start function.
  51. (#) Configure the TIM in the desired functioning mode using one of the
  52. initialization function of this driver:
  53. (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the
  54. Timer Hall Sensor Interface and the commutation event with the corresponding
  55. Interrupt and DMA request if needed (Note that One Timer is used to interface
  56. with the Hall sensor Interface and another Timer should be used to use
  57. the commutation event).
  58. (#) Activate the TIM peripheral using one of the start functions:
  59. (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT().
  60. (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT().
  61. (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT().
  62. (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
  63. @endverbatim
  64. ******************************************************************************
  65. * @attention
  66. *
  67. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  68. *
  69. * Redistribution and use in source and binary forms, with or without modification,
  70. * are permitted provided that the following conditions are met:
  71. * 1. Redistributions of source code must retain the above copyright notice,
  72. * this list of conditions and the following disclaimer.
  73. * 2. Redistributions in binary form must reproduce the above copyright notice,
  74. * this list of conditions and the following disclaimer in the documentation
  75. * and/or other materials provided with the distribution.
  76. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  77. * may be used to endorse or promote products derived from this software
  78. * without specific prior written permission.
  79. *
  80. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  81. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  82. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  83. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  84. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  85. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  86. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  87. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  88. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  89. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90. *
  91. ******************************************************************************
  92. */
  93. /* Includes ------------------------------------------------------------------*/
  94. #include "stm32h7xx_hal.h"
  95. /** @addtogroup STM32H7xx_HAL_Driver
  96. * @{
  97. */
  98. /** @defgroup TIMEx TIMEx
  99. * @brief TIM Extended HAL module driver
  100. * @{
  101. */
  102. #ifdef HAL_TIM_MODULE_ENABLED
  103. /* Private typedef -----------------------------------------------------------*/
  104. /* Private define ------------------------------------------------------------*/
  105. #define BDTR_BKF_SHIFT (16)
  106. #define BDTR_BK2F_SHIFT (20)
  107. #define TIMx_ETRSEL_MASK ((uint32_t)0x003C000)
  108. #define TIMx_TIxSEL_MASK ((uint32_t)0x000000F)
  109. /* Private macro -------------------------------------------------------------*/
  110. /* Private variables ---------------------------------------------------------*/
  111. /* Private function prototypes -----------------------------------------------*/
  112. static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
  113. /* Private functions ---------------------------------------------------------*/
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  116. * @{
  117. */
  118. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  119. * @brief TIM Hall Sensor functions
  120. *
  121. @verbatim
  122. ==============================================================================
  123. ##### TIM Hall Sensor functions #####
  124. ==============================================================================
  125. [..]
  126. This section provides functions allowing to:
  127. (+) Initialize and configure TIM HAL Sensor.
  128. (+) De-initialize TIM HAL Sensor.
  129. (+) Start the Hall Sensor Interface.
  130. (+) Stop the Hall Sensor Interface.
  131. (+) Start the Hall Sensor Interface and enable interrupts.
  132. (+) Stop the Hall Sensor Interface and disable interrupts.
  133. (+) Start the Hall Sensor Interface and enable DMA transfers.
  134. (+) Stop the Hall Sensor Interface and disable DMA transfers.
  135. @endverbatim
  136. * @{
  137. */
  138. /**
  139. * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  140. * @param htim: TIM Encoder Interface handle
  141. * @param sConfig: TIM Hall Sensor configuration structure.
  142. * @retval HAL status
  143. */
  144. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
  145. {
  146. TIM_OC_InitTypeDef OC_Config;
  147. /* Check the TIM handle allocation */
  148. if(htim == NULL)
  149. {
  150. return HAL_ERROR;
  151. }
  152. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  153. assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  154. assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  155. assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  156. assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  157. assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  158. if(htim->State == HAL_TIM_STATE_RESET)
  159. {
  160. /* Allocate lock resource and initialize it */
  161. htim->Lock = HAL_UNLOCKED;
  162. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  163. HAL_TIMEx_HallSensor_MspInit(htim);
  164. }
  165. /* Set the TIM state */
  166. htim->State = HAL_TIM_STATE_BUSY;
  167. /* Configure the Time base in the Encoder Mode */
  168. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  169. /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
  170. TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  171. /* Reset the IC1PSC Bits */
  172. htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  173. /* Set the IC1PSC value */
  174. htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  175. /* Enable the Hall sensor interface (XOR function of the three inputs) */
  176. htim->Instance->CR2 |= TIM_CR2_TI1S;
  177. /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  178. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  179. htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  180. /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  181. htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  182. htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  183. /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  184. OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  185. OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  186. OC_Config.OCMode = TIM_OCMODE_PWM2;
  187. OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  188. OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  189. OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  190. OC_Config.Pulse = sConfig->Commutation_Delay;
  191. TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  192. /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  193. register to 101 */
  194. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  195. htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  196. /* Initialize the TIM state*/
  197. htim->State= HAL_TIM_STATE_READY;
  198. return HAL_OK;
  199. }
  200. /**
  201. * @brief DeInitialize the TIM Hall Sensor interface
  202. * @param htim: TIM Hall Sensor handle.
  203. * @retval HAL status
  204. */
  205. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  206. {
  207. /* Check the parameters */
  208. assert_param(IS_TIM_INSTANCE(htim->Instance));
  209. htim->State = HAL_TIM_STATE_BUSY;
  210. /* Disable the TIM Peripheral Clock */
  211. __HAL_TIM_DISABLE(htim);
  212. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  213. HAL_TIMEx_HallSensor_MspDeInit(htim);
  214. /* Change TIM state */
  215. htim->State = HAL_TIM_STATE_RESET;
  216. /* Release Lock */
  217. __HAL_UNLOCK(htim);
  218. return HAL_OK;
  219. }
  220. /**
  221. * @brief Initializes the TIM Hall Sensor MSP.
  222. * @param htim: TIM handle
  223. * @retval None
  224. */
  225. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  226. {
  227. /* Prevent unused argument(s) compilation warning */
  228. UNUSED(htim);
  229. /* NOTE : This function Should not be modified, when the callback is needed,
  230. the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  231. */
  232. }
  233. /**
  234. * @brief DeInitialize TIM Hall Sensor MSP.
  235. * @param htim: TIM handle
  236. * @retval None
  237. */
  238. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  239. {
  240. /* Prevent unused argument(s) compilation warning */
  241. UNUSED(htim);
  242. /* NOTE : This function Should not be modified, when the callback is needed,
  243. the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  244. */
  245. }
  246. /**
  247. * @brief Starts the TIM Hall Sensor Interface.
  248. * @param htim : TIM Hall Sensor handle
  249. * @retval HAL status
  250. */
  251. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  252. {
  253. /* Check the parameters */
  254. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  255. /* Enable the Input Capture channels 1
  256. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  257. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  258. /* Enable the Peripheral */
  259. __HAL_TIM_ENABLE(htim);
  260. /* Return function status */
  261. return HAL_OK;
  262. }
  263. /**
  264. * @brief Stops the TIM Hall sensor Interface.
  265. * @param htim : TIM Hall Sensor handle
  266. * @retval HAL status
  267. */
  268. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  269. {
  270. /* Check the parameters */
  271. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  272. /* Disable the Input Capture channels 1, 2 and 3
  273. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  274. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  275. /* Disable the Peripheral */
  276. __HAL_TIM_DISABLE(htim);
  277. /* Return function status */
  278. return HAL_OK;
  279. }
  280. /**
  281. * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
  282. * @param htim : TIM Hall Sensor handle.
  283. * @retval HAL status
  284. */
  285. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  286. {
  287. /* Check the parameters */
  288. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  289. /* Enable the capture compare Interrupts 1 event */
  290. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  291. /* Enable the Input Capture channels 1
  292. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  293. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  294. /* Enable the Peripheral */
  295. __HAL_TIM_ENABLE(htim);
  296. /* Return function status */
  297. return HAL_OK;
  298. }
  299. /**
  300. * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
  301. * @param htim : TIM handle.
  302. * @retval HAL status
  303. */
  304. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  305. {
  306. /* Check the parameters */
  307. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  308. /* Disable the Input Capture channels 1
  309. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  310. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  311. /* Disable the capture compare Interrupts event */
  312. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  313. /* Disable the Peripheral */
  314. __HAL_TIM_DISABLE(htim);
  315. /* Return function status */
  316. return HAL_OK;
  317. }
  318. /**
  319. * @brief Starts the TIM Hall Sensor Interface in DMA mode.
  320. * @param htim : TIM Hall Sensor handle.
  321. * @param pData: The destination Buffer address.
  322. * @param Length: The length of data to be transferred from TIM peripheral to memory.
  323. * @retval HAL status
  324. */
  325. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  326. {
  327. /* Check the parameters */
  328. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  329. if((htim->State) == (HAL_TIM_STATE_BUSY))
  330. {
  331. return HAL_BUSY;
  332. }
  333. else if((htim->State) == (HAL_TIM_STATE_READY))
  334. {
  335. if(((uint32_t)pData == 0 ) && (Length > 0))
  336. {
  337. return HAL_ERROR;
  338. }
  339. else
  340. {
  341. htim->State = HAL_TIM_STATE_BUSY;
  342. }
  343. }
  344. /* Enable the Input Capture channels 1
  345. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  346. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  347. /* Set the DMA Input Capture 1 Callback */
  348. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
  349. /* Set the DMA error callback */
  350. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
  351. /* Enable the DMA channel for Capture 1*/
  352. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
  353. /* Enable the capture compare 1 Interrupt */
  354. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  355. /* Enable the Peripheral */
  356. __HAL_TIM_ENABLE(htim);
  357. /* Return function status */
  358. return HAL_OK;
  359. }
  360. /**
  361. * @brief Stops the TIM Hall Sensor Interface in DMA mode.
  362. * @param htim : TIM handle.
  363. * @retval HAL status
  364. */
  365. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  366. {
  367. /* Check the parameters */
  368. assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  369. /* Disable the Input Capture channels 1
  370. (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  371. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  372. /* Disable the capture compare Interrupts 1 event */
  373. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  374. /* Disable the Peripheral */
  375. __HAL_TIM_DISABLE(htim);
  376. /* Return function status */
  377. return HAL_OK;
  378. }
  379. /**
  380. * @}
  381. */
  382. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  383. * @brief TIM Complementary Output Compare functions
  384. *
  385. @verbatim
  386. ==============================================================================
  387. ##### TIM Complementary Output Compare functions #####
  388. ==============================================================================
  389. [..]
  390. This section provides functions allowing to:
  391. (+) Start the Complementary Output Compare/PWM.
  392. (+) Stop the Complementary Output Compare/PWM.
  393. (+) Start the Complementary Output Compare/PWM and enable interrupts.
  394. (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  395. (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  396. (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  397. @endverbatim
  398. * @{
  399. */
  400. /**
  401. * @brief Starts the TIM Output Compare signal generation on the complementary
  402. * output.
  403. * @param htim : TIM Output Compare handle
  404. * @param Channel : TIM Channel to be enabled.
  405. * This parameter can be one of the following values:
  406. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  407. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  408. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  409. * @arg TIM_CHANNEL_4: TIM Channel 4 selected
  410. * @retval HAL status
  411. */
  412. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  413. {
  414. /* Check the parameters */
  415. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  416. /* Enable the Capture compare channel N */
  417. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  418. /* Enable the Main Ouput */
  419. __HAL_TIM_MOE_ENABLE(htim);
  420. /* Enable the Peripheral */
  421. __HAL_TIM_ENABLE(htim);
  422. /* Return function status */
  423. return HAL_OK;
  424. }
  425. /**
  426. * @brief Stops the TIM Output Compare signal generation on the complementary
  427. * output.
  428. * @param htim : TIM handle
  429. * @param Channel : TIM Channel to be disabled.
  430. * This parameter can be one of the following values:
  431. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  432. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  433. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  434. * @arg TIM_CHANNEL_4: TIM Channel 4 selected
  435. * @retval HAL status
  436. */
  437. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  438. {
  439. /* Check the parameters */
  440. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  441. /* Disable the Capture compare channel N */
  442. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  443. /* Disable the Main Ouput */
  444. __HAL_TIM_MOE_DISABLE(htim);
  445. /* Disable the Peripheral */
  446. __HAL_TIM_DISABLE(htim);
  447. /* Return function status */
  448. return HAL_OK;
  449. }
  450. /**
  451. * @brief Starts the TIM Output Compare signal generation in interrupt mode
  452. * on the complementary output.
  453. * @param htim : TIM OC handle
  454. * @param Channel : TIM Channel to be enabled.
  455. * This parameter can be one of the following values:
  456. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  457. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  458. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  459. * @retval HAL status
  460. */
  461. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  462. {
  463. /* Check the parameters */
  464. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  465. switch (Channel)
  466. {
  467. case TIM_CHANNEL_1:
  468. {
  469. /* Enable the TIM Output Compare interrupt */
  470. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  471. }
  472. break;
  473. case TIM_CHANNEL_2:
  474. {
  475. /* Enable the TIM Output Compare interrupt */
  476. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  477. }
  478. break;
  479. case TIM_CHANNEL_3:
  480. {
  481. /* Enable the TIM Output Compare interrupt */
  482. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  483. }
  484. break;
  485. default:
  486. break;
  487. }
  488. /* Enable the TIM Break interrupt */
  489. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  490. /* Enable the Capture compare channel N */
  491. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  492. /* Enable the Main Ouput */
  493. __HAL_TIM_MOE_ENABLE(htim);
  494. /* Enable the Peripheral */
  495. __HAL_TIM_ENABLE(htim);
  496. /* Return function status */
  497. return HAL_OK;
  498. }
  499. /**
  500. * @brief Stops the TIM Output Compare signal generation in interrupt mode
  501. * on the complementary output.
  502. * @param htim : TIM Output Compare handle.
  503. * @param Channel : TIM Channel to be disabled.
  504. * This parameter can be one of the following values:
  505. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  506. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  507. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  508. * @retval HAL status
  509. */
  510. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  511. {
  512. uint32_t tmpccer = 0;
  513. /* Check the parameters */
  514. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  515. switch (Channel)
  516. {
  517. case TIM_CHANNEL_1:
  518. {
  519. /* Disable the TIM Output Compare interrupt */
  520. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  521. }
  522. break;
  523. case TIM_CHANNEL_2:
  524. {
  525. /* Disable the TIM Output Compare interrupt */
  526. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  527. }
  528. break;
  529. case TIM_CHANNEL_3:
  530. {
  531. /* Disable the TIM Output Compare interrupt */
  532. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  533. }
  534. break;
  535. default:
  536. break;
  537. }
  538. /* Disable the Capture compare channel N */
  539. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  540. /* Disable the TIM Break interrupt (only if no more channel is active) */
  541. tmpccer = htim->Instance->CCER;
  542. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
  543. {
  544. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  545. }
  546. /* Disable the Main Ouput */
  547. __HAL_TIM_MOE_DISABLE(htim);
  548. /* Disable the Peripheral */
  549. __HAL_TIM_DISABLE(htim);
  550. /* Return function status */
  551. return HAL_OK;
  552. }
  553. /**
  554. * @brief Starts the TIM Output Compare signal generation in DMA mode
  555. * on the complementary output.
  556. * @param htim : TIM Output Compare handle
  557. * @param Channel : TIM Channel to be enabled.
  558. * This parameter can be one of the following values:
  559. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  560. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  561. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  562. * @param pData: The source Buffer address.
  563. * @param Length: The length of data to be transferred from memory to TIM peripheral
  564. * @retval HAL status
  565. */
  566. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  567. {
  568. /* Check the parameters */
  569. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  570. if((htim->State) == (HAL_TIM_STATE_BUSY))
  571. {
  572. return HAL_BUSY;
  573. }
  574. else if((htim->State) == (HAL_TIM_STATE_READY))
  575. {
  576. if(((uint32_t)pData == 0 ) && (Length > 0))
  577. {
  578. return HAL_ERROR;
  579. }
  580. else
  581. {
  582. htim->State = HAL_TIM_STATE_BUSY;
  583. }
  584. }
  585. switch (Channel)
  586. {
  587. case TIM_CHANNEL_1:
  588. {
  589. /* Set the DMA Period elapsed callback */
  590. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  591. /* Set the DMA error callback */
  592. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
  593. /* Enable the DMA channel */
  594. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
  595. /* Enable the TIM Output Compare DMA request */
  596. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  597. }
  598. break;
  599. case TIM_CHANNEL_2:
  600. {
  601. /* Set the DMA Period elapsed callback */
  602. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  603. /* Set the DMA error callback */
  604. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
  605. /* Enable the DMA channel */
  606. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
  607. /* Enable the TIM Output Compare DMA request */
  608. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  609. }
  610. break;
  611. case TIM_CHANNEL_3:
  612. {
  613. /* Set the DMA Period elapsed callback */
  614. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  615. /* Set the DMA error callback */
  616. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
  617. /* Enable the DMA channel */
  618. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
  619. /* Enable the TIM Output Compare DMA request */
  620. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  621. }
  622. break;
  623. default:
  624. break;
  625. }
  626. /* Enable the Capture compare channel N */
  627. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  628. /* Enable the Main Ouput */
  629. __HAL_TIM_MOE_ENABLE(htim);
  630. /* Enable the Peripheral */
  631. __HAL_TIM_ENABLE(htim);
  632. /* Return function status */
  633. return HAL_OK;
  634. }
  635. /**
  636. * @brief Stops the TIM Output Compare signal generation in DMA mode
  637. * on the complementary output.
  638. * @param htim : TIM Output Compare handle
  639. * @param Channel : TIM Channel to be disabled.
  640. * This parameter can be one of the following values:
  641. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  642. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  643. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  644. * @retval HAL status
  645. */
  646. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  647. {
  648. /* Check the parameters */
  649. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  650. switch (Channel)
  651. {
  652. case TIM_CHANNEL_1:
  653. {
  654. /* Disable the TIM Output Compare DMA request */
  655. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  656. }
  657. break;
  658. case TIM_CHANNEL_2:
  659. {
  660. /* Disable the TIM Output Compare DMA request */
  661. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  662. }
  663. break;
  664. case TIM_CHANNEL_3:
  665. {
  666. /* Disable the TIM Output Compare DMA request */
  667. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  668. }
  669. break;
  670. default:
  671. break;
  672. }
  673. /* Disable the Capture compare channel N */
  674. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  675. /* Disable the Main Ouput */
  676. __HAL_TIM_MOE_DISABLE(htim);
  677. /* Disable the Peripheral */
  678. __HAL_TIM_DISABLE(htim);
  679. /* Change the htim state */
  680. htim->State = HAL_TIM_STATE_READY;
  681. /* Return function status */
  682. return HAL_OK;
  683. }
  684. /**
  685. * @}
  686. */
  687. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  688. * @brief TIM Complementary PWM functions
  689. *
  690. @verbatim
  691. ==============================================================================
  692. ##### TIM Complementary PWM functions #####
  693. ==============================================================================
  694. [..]
  695. This section provides functions allowing to:
  696. (+) Start the Complementary PWM.
  697. (+) Stop the Complementary PWM.
  698. (+) Start the Complementary PWM and enable interrupts.
  699. (+) Stop the Complementary PWM and disable interrupts.
  700. (+) Start the Complementary PWM and enable DMA transfers.
  701. (+) Stop the Complementary PWM and disable DMA transfers.
  702. (+) Start the Complementary Input Capture measurement.
  703. (+) Stop the Complementary Input Capture.
  704. (+) Start the Complementary Input Capture and enable interrupts.
  705. (+) Stop the Complementary Input Capture and disable interrupts.
  706. (+) Start the Complementary Input Capture and enable DMA transfers.
  707. (+) Stop the Complementary Input Capture and disable DMA transfers.
  708. (+) Start the Complementary One Pulse generation.
  709. (+) Stop the Complementary One Pulse.
  710. (+) Start the Complementary One Pulse and enable interrupts.
  711. (+) Stop the Complementary One Pulse and disable interrupts.
  712. @endverbatim
  713. * @{
  714. */
  715. /**
  716. * @brief Starts the PWM signal generation on the complementary output.
  717. * @param htim : TIM handle
  718. * @param Channel : TIM Channel to be enabled.
  719. * This parameter can be one of the following values:
  720. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  721. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  722. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  723. * @arg TIM_CHANNEL_4: TIM Channel 4 selected
  724. * @retval HAL status
  725. */
  726. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  727. {
  728. /* Check the parameters */
  729. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  730. /* Enable the complementary PWM output */
  731. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  732. /* Enable the Main Ouput */
  733. __HAL_TIM_MOE_ENABLE(htim);
  734. /* Enable the Peripheral */
  735. __HAL_TIM_ENABLE(htim);
  736. /* Return function status */
  737. return HAL_OK;
  738. }
  739. /**
  740. * @brief Stops the PWM signal generation on the complementary output.
  741. * @param htim : TIM handle
  742. * @param Channel : TIM Channel to be disabled.
  743. * This parameter can be one of the following values:
  744. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  745. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  746. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  747. * @arg TIM_CHANNEL_4: TIM Channel 4 selected
  748. * @retval HAL status
  749. */
  750. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  751. {
  752. /* Check the parameters */
  753. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  754. /* Disable the complementary PWM output */
  755. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  756. /* Disable the Main Ouput */
  757. __HAL_TIM_MOE_DISABLE(htim);
  758. /* Disable the Peripheral */
  759. __HAL_TIM_DISABLE(htim);
  760. /* Return function status */
  761. return HAL_OK;
  762. }
  763. /**
  764. * @brief Starts the PWM signal generation in interrupt mode on the
  765. * complementary output.
  766. * @param htim : TIM handle
  767. * @param Channel : TIM Channel to be disabled.
  768. * This parameter can be one of the following values:
  769. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  770. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  771. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  772. * @retval HAL status
  773. */
  774. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  775. {
  776. /* Check the parameters */
  777. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  778. switch (Channel)
  779. {
  780. case TIM_CHANNEL_1:
  781. {
  782. /* Enable the TIM Capture/Compare 1 interrupt */
  783. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  784. }
  785. break;
  786. case TIM_CHANNEL_2:
  787. {
  788. /* Enable the TIM Capture/Compare 2 interrupt */
  789. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  790. }
  791. break;
  792. case TIM_CHANNEL_3:
  793. {
  794. /* Enable the TIM Capture/Compare 3 interrupt */
  795. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  796. }
  797. break;
  798. default:
  799. break;
  800. }
  801. /* Enable the TIM Break interrupt */
  802. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  803. /* Enable the complementary PWM output */
  804. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  805. /* Enable the Main Ouput */
  806. __HAL_TIM_MOE_ENABLE(htim);
  807. /* Enable the Peripheral */
  808. __HAL_TIM_ENABLE(htim);
  809. /* Return function status */
  810. return HAL_OK;
  811. }
  812. /**
  813. * @brief Stops the PWM signal generation in interrupt mode on the
  814. * complementary output.
  815. * @param htim : TIM handle
  816. * @param Channel : TIM Channel to be disabled.
  817. * This parameter can be one of the following values:
  818. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  819. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  820. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  821. * @retval HAL status
  822. */
  823. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
  824. {
  825. uint32_t tmpccer = 0;
  826. /* Check the parameters */
  827. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  828. switch (Channel)
  829. {
  830. case TIM_CHANNEL_1:
  831. {
  832. /* Disable the TIM Capture/Compare 1 interrupt */
  833. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  834. }
  835. break;
  836. case TIM_CHANNEL_2:
  837. {
  838. /* Disable the TIM Capture/Compare 2 interrupt */
  839. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  840. }
  841. break;
  842. case TIM_CHANNEL_3:
  843. {
  844. /* Disable the TIM Capture/Compare 3 interrupt */
  845. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  846. }
  847. break;
  848. default:
  849. break;
  850. }
  851. /* Disable the complementary PWM output */
  852. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  853. /* Disable the TIM Break interrupt (only if no more channel is active) */
  854. tmpccer = htim->Instance->CCER;
  855. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
  856. {
  857. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  858. }
  859. /* Disable the Main Ouput */
  860. __HAL_TIM_MOE_DISABLE(htim);
  861. /* Disable the Peripheral */
  862. __HAL_TIM_DISABLE(htim);
  863. /* Return function status */
  864. return HAL_OK;
  865. }
  866. /**
  867. * @brief Start the TIM PWM signal generation in DMA mode on the
  868. * complementary output
  869. * @param htim : TIM handle
  870. * @param Channel : TIM Channel to be enabled.
  871. * This parameter can be one of the following values:
  872. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  873. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  874. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  875. * @param pData: The source Buffer address.
  876. * @param Length: The length of data to be transferred from memory to TIM peripheral
  877. * @retval HAL status
  878. */
  879. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  880. {
  881. /* Check the parameters */
  882. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  883. if((htim->State) == (HAL_TIM_STATE_BUSY))
  884. {
  885. return HAL_BUSY;
  886. }
  887. else if((htim->State) == (HAL_TIM_STATE_READY))
  888. {
  889. if(((uint32_t)pData == 0 ) && (Length > 0))
  890. {
  891. return HAL_ERROR;
  892. }
  893. else
  894. {
  895. htim->State = HAL_TIM_STATE_BUSY;
  896. }
  897. }
  898. switch (Channel)
  899. {
  900. case TIM_CHANNEL_1:
  901. {
  902. /* Set the DMA Period elapsed callback */
  903. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  904. /* Set the DMA error callback */
  905. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
  906. /* Enable the DMA channel */
  907. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
  908. /* Enable the TIM Capture/Compare 1 DMA request */
  909. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  910. }
  911. break;
  912. case TIM_CHANNEL_2:
  913. {
  914. /* Set the DMA Period elapsed callback */
  915. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  916. /* Set the DMA error callback */
  917. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
  918. /* Enable the DMA channel */
  919. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
  920. /* Enable the TIM Capture/Compare 2 DMA request */
  921. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  922. }
  923. break;
  924. case TIM_CHANNEL_3:
  925. {
  926. /* Set the DMA Period elapsed callback */
  927. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
  928. /* Set the DMA error callback */
  929. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
  930. /* Enable the DMA channel */
  931. HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
  932. /* Enable the TIM Capture/Compare 3 DMA request */
  933. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  934. }
  935. break;
  936. default:
  937. break;
  938. }
  939. /* Enable the complementary PWM output */
  940. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  941. /* Enable the Main Ouput */
  942. __HAL_TIM_MOE_ENABLE(htim);
  943. /* Enable the Peripheral */
  944. __HAL_TIM_ENABLE(htim);
  945. /* Return function status */
  946. return HAL_OK;
  947. }
  948. /**
  949. * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
  950. * output
  951. * @param htim : TIM handle
  952. * @param Channel : TIM Channel to be disabled.
  953. * This parameter can be one of the following values:
  954. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  955. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  956. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  957. * @retval HAL status
  958. */
  959. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  960. {
  961. /* Check the parameters */
  962. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  963. switch (Channel)
  964. {
  965. case TIM_CHANNEL_1:
  966. {
  967. /* Disable the TIM Capture/Compare 1 DMA request */
  968. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  969. }
  970. break;
  971. case TIM_CHANNEL_2:
  972. {
  973. /* Disable the TIM Capture/Compare 2 DMA request */
  974. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  975. }
  976. break;
  977. case TIM_CHANNEL_3:
  978. {
  979. /* Disable the TIM Capture/Compare 3 DMA request */
  980. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  981. }
  982. break;
  983. default:
  984. break;
  985. }
  986. /* Disable the complementary PWM output */
  987. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  988. /* Disable the Main Ouput */
  989. __HAL_TIM_MOE_DISABLE(htim);
  990. /* Disable the Peripheral */
  991. __HAL_TIM_DISABLE(htim);
  992. /* Change the htim state */
  993. htim->State = HAL_TIM_STATE_READY;
  994. /* Return function status */
  995. return HAL_OK;
  996. }
  997. /**
  998. * @}
  999. */
  1000. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1001. * @brief TIM Complementary One Pulse functions
  1002. *
  1003. @verbatim
  1004. ==============================================================================
  1005. ##### TIM Complementary One Pulse functions #####
  1006. ==============================================================================
  1007. [..]
  1008. This section provides functions allowing to:
  1009. (+) Start the Complementary One Pulse generation.
  1010. (+) Stop the Complementary One Pulse.
  1011. (+) Start the Complementary One Pulse and enable interrupts.
  1012. (+) Stop the Complementary One Pulse and disable interrupts.
  1013. @endverbatim
  1014. * @{
  1015. */
  1016. /**
  1017. * @brief Starts the TIM One Pulse signal generation on the complemetary
  1018. * output.
  1019. * @param htim : TIM One Pulse handle
  1020. * @param OutputChannel : TIM Channel to be enabled.
  1021. * This parameter can be one of the following values:
  1022. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1023. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1024. * @retval HAL status
  1025. */
  1026. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1027. {
  1028. /* Check the parameters */
  1029. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1030. /* Enable the complementary One Pulse output */
  1031. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1032. /* Enable the Main Ouput */
  1033. __HAL_TIM_MOE_ENABLE(htim);
  1034. /* Return function status */
  1035. return HAL_OK;
  1036. }
  1037. /**
  1038. * @brief Stops the TIM One Pulse signal generation on the complementary
  1039. * output.
  1040. * @param htim : TIM One Pulse handle
  1041. * @param OutputChannel : TIM Channel to be disabled.
  1042. * This parameter can be one of the following values:
  1043. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1044. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1045. * @retval HAL status
  1046. */
  1047. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1048. {
  1049. /* Check the parameters */
  1050. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1051. /* Disable the complementary One Pulse output */
  1052. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1053. /* Disable the Main Ouput */
  1054. __HAL_TIM_MOE_DISABLE(htim);
  1055. /* Disable the Peripheral */
  1056. __HAL_TIM_DISABLE(htim);
  1057. /* Return function status */
  1058. return HAL_OK;
  1059. }
  1060. /**
  1061. * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
  1062. * complementary channel.
  1063. * @param htim : TIM One Pulse handle
  1064. * @param OutputChannel : TIM Channel to be enabled.
  1065. * This parameter can be one of the following values:
  1066. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1067. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1068. * @retval HAL status
  1069. */
  1070. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1071. {
  1072. /* Check the parameters */
  1073. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1074. /* Enable the TIM Capture/Compare 1 interrupt */
  1075. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1076. /* Enable the TIM Capture/Compare 2 interrupt */
  1077. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1078. /* Enable the complementary One Pulse output */
  1079. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1080. /* Enable the Main Ouput */
  1081. __HAL_TIM_MOE_ENABLE(htim);
  1082. /* Return function status */
  1083. return HAL_OK;
  1084. }
  1085. /**
  1086. * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
  1087. * complementary channel.
  1088. * @param htim : TIM One Pulse handle
  1089. * @param OutputChannel : TIM Channel to be disabled.
  1090. * This parameter can be one of the following values:
  1091. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1092. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1093. * @retval HAL status
  1094. */
  1095. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1096. {
  1097. /* Check the parameters */
  1098. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1099. /* Disable the TIM Capture/Compare 1 interrupt */
  1100. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1101. /* Disable the TIM Capture/Compare 2 interrupt */
  1102. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1103. /* Disable the complementary One Pulse output */
  1104. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1105. /* Disable the Main Ouput */
  1106. __HAL_TIM_MOE_DISABLE(htim);
  1107. /* Disable the Peripheral */
  1108. __HAL_TIM_DISABLE(htim);
  1109. /* Return function status */
  1110. return HAL_OK;
  1111. }
  1112. /**
  1113. * @}
  1114. */
  1115. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1116. * @brief Peripheral Control functions
  1117. *
  1118. @verbatim
  1119. ==============================================================================
  1120. ##### Peripheral Control functions #####
  1121. ==============================================================================
  1122. [..]
  1123. This section provides functions allowing to:
  1124. (+) Configure the commutation event in case of use of the Hall sensor interface.
  1125. (+) Configure Output channels for OC and PWM mode.
  1126. (+) Configure Complementary channels, break features and dead time.
  1127. (+) Configure Master synchronization.
  1128. (+) Configure timer remapping capabilities.
  1129. (+) Enable or disable channel grouping
  1130. @endverbatim
  1131. * @{
  1132. */
  1133. /**
  1134. * @brief Configure the TIM commutation event sequence.
  1135. * @note: this function is mandatory to use the commutation event in order to
  1136. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1137. * the typical use of this feature is with the use of another Timer(interface Timer)
  1138. * configured in Hall sensor interface, this interface Timer will generate the
  1139. * commutation at its TRGO output (connected to Timer used in this function) each time
  1140. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1141. * @param htim: TIM handle
  1142. * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  1143. * This parameter can be one of the following values:
  1144. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1145. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1146. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1147. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1148. * @arg TIM_TS_NONE: No trigger is needed
  1149. * @param CommutationSource : the Commutation Event source.
  1150. * This parameter can be one of the following values:
  1151. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1152. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1153. * @retval HAL status
  1154. */
  1155. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
  1156. {
  1157. /* Check the parameters */
  1158. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1159. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1160. __HAL_LOCK(htim);
  1161. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1162. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1163. {
  1164. /* Select the Input trigger */
  1165. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1166. htim->Instance->SMCR |= InputTrigger;
  1167. }
  1168. /* Select the Capture Compare preload feature */
  1169. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1170. /* Select the Commutation event source */
  1171. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1172. htim->Instance->CR2 |= CommutationSource;
  1173. __HAL_UNLOCK(htim);
  1174. return HAL_OK;
  1175. }
  1176. /**
  1177. * @brief Configure the TIM commutation event sequence with interrupt.
  1178. * @note: this function is mandatory to use the commutation event in order to
  1179. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1180. * the typical use of this feature is with the use of another Timer(interface Timer)
  1181. * configured in Hall sensor interface, this interface Timer will generate the
  1182. * commutation at its TRGO output (connected to Timer used in this function) each time
  1183. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1184. * @param htim: TIM handle
  1185. * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  1186. * This parameter can be one of the following values:
  1187. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1188. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1189. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1190. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1191. * @arg TIM_TS_NONE: No trigger is needed
  1192. * @param CommutationSource : the Commutation Event source.
  1193. * This parameter can be one of the following values:
  1194. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1195. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1196. * @retval HAL status
  1197. */
  1198. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
  1199. {
  1200. /* Check the parameters */
  1201. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1202. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1203. __HAL_LOCK(htim);
  1204. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1205. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1206. {
  1207. /* Select the Input trigger */
  1208. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1209. htim->Instance->SMCR |= InputTrigger;
  1210. }
  1211. /* Select the Capture Compare preload feature */
  1212. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1213. /* Select the Commutation event source */
  1214. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1215. htim->Instance->CR2 |= CommutationSource;
  1216. /* Enable the Commutation Interrupt Request */
  1217. __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1218. __HAL_UNLOCK(htim);
  1219. return HAL_OK;
  1220. }
  1221. /**
  1222. * @brief Configure the TIM commutation event sequence with DMA.
  1223. * @note: this function is mandatory to use the commutation event in order to
  1224. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1225. * the typical use of this feature is with the use of another Timer(interface Timer)
  1226. * configured in Hall sensor interface, this interface Timer will generate the
  1227. * commutation at its TRGO output (connected to Timer used in this function) each time
  1228. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1229. * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set.
  1230. * @param htim: TIM handle
  1231. * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  1232. * This parameter can be one of the following values:
  1233. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1234. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1235. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1236. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1237. * @arg TIM_TS_NONE: No trigger is needed
  1238. * @param CommutationSource : the Commutation Event source.
  1239. * This parameter can be one of the following values:
  1240. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1241. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1242. * @retval HAL status
  1243. */
  1244. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
  1245. {
  1246. /* Check the parameters */
  1247. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1248. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1249. __HAL_LOCK(htim);
  1250. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1251. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1252. {
  1253. /* Select the Input trigger */
  1254. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1255. htim->Instance->SMCR |= InputTrigger;
  1256. }
  1257. /* Select the Capture Compare preload feature */
  1258. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1259. /* Select the Commutation event source */
  1260. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1261. htim->Instance->CR2 |= CommutationSource;
  1262. /* Enable the Commutation DMA Request */
  1263. /* Set the DMA Commutation Callback */
  1264. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
  1265. /* Set the DMA error callback */
  1266. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError;
  1267. /* Enable the Commutation DMA Request */
  1268. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1269. __HAL_UNLOCK(htim);
  1270. return HAL_OK;
  1271. }
  1272. /**
  1273. * @brief Configures the TIM in master mode.
  1274. * @param htim: TIM handle.
  1275. * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
  1276. * contains the selected trigger output (TRGO) and the Master/Slave
  1277. * mode.
  1278. * @retval HAL status
  1279. */
  1280. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1281. TIM_MasterConfigTypeDef * sMasterConfig)
  1282. {
  1283. uint32_t tmpcr2;
  1284. uint32_t tmpsmcr;
  1285. /* Check the parameters */
  1286. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1287. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1288. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1289. /* Check input state */
  1290. __HAL_LOCK(htim);
  1291. /* Get the TIMx CR2 register value */
  1292. tmpcr2 = htim->Instance->CR2;
  1293. /* Get the TIMx SMCR register value */
  1294. tmpsmcr = htim->Instance->SMCR;
  1295. /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
  1296. if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
  1297. {
  1298. /* Check the parameters */
  1299. assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
  1300. /* Clear the MMS2 bits */
  1301. tmpcr2 &= ~TIM_CR2_MMS2;
  1302. /* Select the TRGO2 source*/
  1303. tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
  1304. }
  1305. /* Reset the MMS Bits */
  1306. tmpcr2 &= ~TIM_CR2_MMS;
  1307. /* Select the TRGO source */
  1308. tmpcr2 |= sMasterConfig->MasterOutputTrigger;
  1309. /* Reset the MSM Bit */
  1310. tmpsmcr &= ~TIM_SMCR_MSM;
  1311. /* Set master mode */
  1312. tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1313. /* Update TIMx CR2 */
  1314. htim->Instance->CR2 = tmpcr2;
  1315. /* Update TIMx SMCR */
  1316. htim->Instance->SMCR = tmpsmcr;
  1317. __HAL_UNLOCK(htim);
  1318. return HAL_OK;
  1319. }
  1320. /**
  1321. * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1322. * and the AOE(automatic output enable).
  1323. * @param htim: TIM handle
  1324. * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1325. * contains the BDTR Register configuration information for the TIM peripheral.
  1326. * @retval HAL status
  1327. */
  1328. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1329. TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
  1330. {
  1331. uint32_t tmpbdtr = 0;
  1332. /* Check the parameters */
  1333. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1334. assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1335. assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1336. assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1337. assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1338. assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1339. assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1340. assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
  1341. assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1342. /* Check input state */
  1343. __HAL_LOCK(htim);
  1344. /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1345. the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1346. /* Set the BDTR bits */
  1347. MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1348. MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1349. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1350. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1351. MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1352. MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1353. MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1354. MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT));
  1355. if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
  1356. {
  1357. assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
  1358. assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
  1359. assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
  1360. /* Set the BREAK2 input related BDTR bits */
  1361. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT));
  1362. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
  1363. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
  1364. }
  1365. /* Set TIMx_BDTR */
  1366. htim->Instance->BDTR = tmpbdtr;
  1367. __HAL_UNLOCK(htim);
  1368. return HAL_OK;
  1369. }
  1370. /**
  1371. * @brief Configures the break input source.
  1372. * @param htim: TIM handle.
  1373. * @param BreakInput: Break input to configure.
  1374. * This parameter can be one of the following values:
  1375. * @arg TIM_BREAKINPUT_BRK: Timer break input
  1376. * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
  1377. * @param sBreakInputConfig: Break input source configuration
  1378. * @retval HAL status
  1379. */
  1380. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
  1381. uint32_t BreakInput,
  1382. TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
  1383. {
  1384. uint32_t tmporx = 0;
  1385. uint32_t bkin_enable_mask = 0;
  1386. uint32_t bkin_polarity_mask = 0;
  1387. uint32_t bkin_enable_bitpos = 0;
  1388. uint32_t bkin_polarity_bitpos = 0;
  1389. /* Check the parameters */
  1390. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1391. assert_param(IS_TIM_BREAKINPUT(BreakInput));
  1392. assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
  1393. assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
  1394. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1395. {
  1396. assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
  1397. }
  1398. /* Check input state */
  1399. __HAL_LOCK(htim);
  1400. switch(sBreakInputConfig->Source)
  1401. {
  1402. case TIM_BREAKINPUTSOURCE_BKIN:
  1403. {
  1404. bkin_enable_mask = TIM1_AF1_BKINE;
  1405. bkin_enable_bitpos = 0;
  1406. bkin_polarity_mask = TIM1_AF1_BKINP;
  1407. bkin_polarity_bitpos = 9;
  1408. }
  1409. break;
  1410. case TIM_BREAKINPUTSOURCE_COMP1:
  1411. {
  1412. bkin_enable_mask = TIM1_AF1_BKCMP1E;
  1413. bkin_enable_bitpos = 1;
  1414. bkin_polarity_mask = TIM1_AF1_BKCMP1P;
  1415. bkin_polarity_bitpos = 10;
  1416. }
  1417. break;
  1418. case TIM_BREAKINPUTSOURCE_COMP2:
  1419. {
  1420. bkin_enable_mask = TIM1_AF1_BKCMP2E;
  1421. bkin_enable_bitpos = 2;
  1422. bkin_polarity_mask = TIM1_AF1_BKCMP2P;
  1423. bkin_polarity_bitpos = 11;
  1424. }
  1425. break;
  1426. case TIM_BREAKINPUTSOURCE_DFSDM1:
  1427. {
  1428. bkin_enable_mask = TIM1_AF1_BKDFBK0E;
  1429. bkin_enable_bitpos = 8;
  1430. }
  1431. break;
  1432. default:
  1433. break;
  1434. }
  1435. switch(BreakInput)
  1436. {
  1437. case TIM_BREAKINPUT_BRK:
  1438. {
  1439. /* Get the TIMx_OR2 register value */
  1440. tmporx = htim->Instance->AF1;
  1441. /* Enable the break input */
  1442. tmporx &= ~bkin_enable_mask;
  1443. tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
  1444. /* Set the break input polarity */
  1445. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1446. {
  1447. tmporx &= ~bkin_polarity_mask;
  1448. tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
  1449. }
  1450. /* Set TIMx_OR2 */
  1451. htim->Instance->AF1 = tmporx;
  1452. }
  1453. break;
  1454. case TIM_BREAKINPUT_BRK2:
  1455. {
  1456. /* Get the TIMx_OR3 register value */
  1457. tmporx = htim->Instance->AF2;
  1458. /* Enable the break input */
  1459. tmporx &= ~bkin_enable_mask;
  1460. tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
  1461. /* Set the break input polarity */
  1462. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1463. {
  1464. tmporx &= ~bkin_polarity_mask;
  1465. tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
  1466. }
  1467. /* Set TIMx_OR3 */
  1468. htim->Instance->AF2 = tmporx;
  1469. }
  1470. break;
  1471. default:
  1472. break;
  1473. }
  1474. __HAL_UNLOCK(htim);
  1475. return HAL_OK;
  1476. }
  1477. /**
  1478. * @brief Configures the TIMx Remapping input capabilities.
  1479. * @param htim: TIM handle.
  1480. * @param Remap: specifies the TIM remapping source.
  1481. * For TIM1, the parameter is one of the following values:
  1482. * @arg TIM_TIM1_ETR_GPIO: TIM1_ETR is connected to GPIO
  1483. * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
  1484. * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
  1485. * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
  1486. * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
  1487. * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
  1488. * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
  1489. * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
  1490. * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3:
  1491. *
  1492. * For TIM2, the parameter is one of the following values:
  1493. * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
  1494. * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
  1495. * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
  1496. * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
  1497. * @arg TIM_TIM2_ETR_SAI1_FSA: TIM2_ETR is connected to SAI1 FS_A
  1498. * @arg TIM_TIM2_ETR_SAI1_FSB: TIM2_ETR is connected to SAI1 FS_B
  1499. *
  1500. * For TIM3, the parameter is one of the following values:
  1501. * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
  1502. * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
  1503. *
  1504. * For TIM5, the parameter is one of the following values:
  1505. * @arg TIM_TIM5_ETR_GPIO: TIM5_ETR is connected to GPIO
  1506. * @arg TIM_TIM5_ETR_SAI2_FSA: TIM5_ETR is connected to SAI2 FS_A
  1507. * @arg TIM_TIM5_ETR_SAI2_FSB: TIM5_ETR is connected to SAI2 FS_B
  1508. *
  1509. * For TIM8, the parameter is one of the following values:
  1510. * @arg TIM_TIM8_ETR_GPIO: TIM8_ETR is connected to GPIO
  1511. * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
  1512. * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
  1513. * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
  1514. * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
  1515. * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
  1516. * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
  1517. * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
  1518. * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
  1519. *
  1520. *
  1521. * @retval HAL status
  1522. */
  1523. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1524. {
  1525. uint32_t tmpor2 = 0;
  1526. __HAL_LOCK(htim);
  1527. /* Check parameters */
  1528. assert_param(IS_TIM_ETRSEL_INSTANCE(htim->Instance));
  1529. assert_param(IS_TIM_ETRREMAP(Remap));
  1530. tmpor2 = htim->Instance->AF1;
  1531. tmpor2 &= ~TIMx_ETRSEL_MASK;
  1532. tmpor2 |= (Remap & TIMx_ETRSEL_MASK);
  1533. /* Set TIMx_OR2 */
  1534. htim->Instance->AF1 = tmpor2;
  1535. htim->State = HAL_TIM_STATE_READY;
  1536. __HAL_UNLOCK(htim);
  1537. return HAL_OK;
  1538. }
  1539. /**
  1540. * @brief Configures the TIMx input Selection capabilities.
  1541. * @param htim: TIM handle.
  1542. * @param TISelection : parameter of the TIM_TISelectionStruct structure.
  1543. * @param Channel: specifies the channels that will be selected for configuration:
  1544. * @arg TIM_CHANNEL_1: TIM Channel 1
  1545. * @arg TIM_CHANNEL_2: TIM Channel 2
  1546. * @arg TIM_CHANNEL_3: TIM Channel 3
  1547. * @arg TIM_CHANNEL_4: TIM Channel 4
  1548. *
  1549. * TISelection parameter of the TIM_TISelectionStruct structure is detailed as follows:
  1550. * For TIM1, the parameter is one of the following values:
  1551. * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
  1552. * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
  1553. *
  1554. * For TIM2, the parameter is one of the following values:
  1555. * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
  1556. * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
  1557. * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
  1558. * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
  1559. *
  1560. * For TIM3, the parameter is one of the following values:
  1561. * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
  1562. * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
  1563. * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
  1564. * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
  1565. *
  1566. * For TIM5, the parameter is one of the following values:
  1567. * @arg TIM_TIM5_TI1_GPIO: TIM5 TI1 is connected to GPIO
  1568. * @arg TIM_TIM5_TI1_CAN_TMP: TIM5 TI1 is connected to CAN TMP
  1569. * @arg TIM_TIM5_TI1_CAN_RTP: TIM5 TI1 is connected to CAN RTP
  1570. *
  1571. * For TIM8, the parameter is one of the following values:
  1572. * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
  1573. * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
  1574. *
  1575. * For TIM15, the parameter is one of the following values:
  1576. * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
  1577. * @arg TIM_TIM15_TI1_TIM2: TIM15 TI1 is connected to TIM2 CH1
  1578. * @arg TIM_TIM15_TI1_TIM3: TIM15 TI1 is connected to TIM3 CH1
  1579. * @arg TIM_TIM15_TI1_TIM4: TIM15 TI1 is connected to TIM4 CH1
  1580. * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
  1581. * @arg TIM_TIM15_TI1_CSI: TIM15 TI1 is connected to CSI
  1582. * @arg TIM_TIM15_TI1_MCO2: TIM15 TI1 is connected to MCO2
  1583. * @arg TIM_TIM15_TI2_GPIO: TIM15 TI2 is connected to GPIO
  1584. * @arg TIM_TIM15_TI2_TIM2: TIM15 TI2 is connected to TIM2 CH2
  1585. * @arg TIM_TIM15_TI2_TIM3: TIM15 TI2 is connected to TIM3 CH2
  1586. * @arg TIM_TIM15_TI2_TIM4: TIM15 TI2 is connected to TIM4 CH2
  1587. *
  1588. * For TIM16, the parameter can have the following values:
  1589. * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
  1590. * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
  1591. * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
  1592. * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
  1593. *
  1594. * For TIM17, the parameter can have the following values:
  1595. * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
  1596. * @arg TIM_TIM17_TI1_SPDIFFS: TIM17 TI1 is connected to SPDIF FS
  1597. * @arg TIM_TIM17_TI1_HSE_1MHZ: TIM17 TI1 is connected to HSE 1MHz
  1598. * @arg TIM_TIM17_TI1_MCO1: TIM17 TI1 is connected to MCO1
  1599. *
  1600. * @retval HAL status
  1601. */
  1602. HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection , uint32_t Channel)
  1603. {
  1604. uint32_t tmptisel = 0;
  1605. __HAL_LOCK(htim);
  1606. /* Check parameters */
  1607. assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
  1608. assert_param(IS_TIM_TISEL(TISelection));
  1609. tmptisel = htim->Instance->TISEL;
  1610. tmptisel &= ~(TIMx_TIxSEL_MASK << (Channel << 2));
  1611. tmptisel |= (TISelection);
  1612. /* Set TIMx_TISEL */
  1613. htim->Instance->TISEL = tmptisel;
  1614. htim->State = HAL_TIM_STATE_READY;
  1615. __HAL_UNLOCK(htim);
  1616. return HAL_OK;
  1617. }
  1618. /**
  1619. * @brief Group channel 5 and channel 1, 2 or 3
  1620. * @param htim: TIM handle.
  1621. * @param Channels: specifies the reference signal(s) the OC5REF is combined with.
  1622. * This parameter can be any combination of the following values:
  1623. * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
  1624. * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
  1625. * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
  1626. * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
  1627. * @retval HAL status
  1628. */
  1629. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
  1630. {
  1631. /* Check parameters */
  1632. assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
  1633. assert_param(IS_TIM_GROUPCH5(Channels));
  1634. /* Process Locked */
  1635. __HAL_LOCK(htim);
  1636. htim->State = HAL_TIM_STATE_BUSY;
  1637. /* Clear GC5Cx bit fields */
  1638. htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1);
  1639. /* Set GC5Cx bit fields */
  1640. htim->Instance->CCR5 |= Channels;
  1641. htim->State = HAL_TIM_STATE_READY;
  1642. __HAL_UNLOCK(htim);
  1643. return HAL_OK;
  1644. }
  1645. /**
  1646. * @}
  1647. */
  1648. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  1649. * @brief Extended Callbacks functions
  1650. *
  1651. @verbatim
  1652. ==============================================================================
  1653. ##### Extended Callbacks functions #####
  1654. ==============================================================================
  1655. [..]
  1656. This section provides Extended TIM callback functions:
  1657. (+) TIM Commutation callback
  1658. (+) TIM Break callback
  1659. @endverbatim
  1660. * @{
  1661. */
  1662. /**
  1663. * @brief Hall commutation changed callback in non blocking mode
  1664. * @param htim : TIM handle
  1665. * @retval None
  1666. */
  1667. __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
  1668. {
  1669. /* Prevent unused argument(s) compilation warning */
  1670. UNUSED(htim);
  1671. /* NOTE : This function Should not be modified, when the callback is needed,
  1672. the HAL_TIMEx_CommutationCallback could be implemented in the user file
  1673. */
  1674. }
  1675. /**
  1676. * @brief Hall Break detection callback in non blocking mode
  1677. * @param htim : TIM handle
  1678. * @retval None
  1679. */
  1680. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  1681. {
  1682. /* Prevent unused argument(s) compilation warning */
  1683. UNUSED(htim);
  1684. /* NOTE : This function Should not be modified, when the callback is needed,
  1685. the HAL_TIMEx_BreakCallback could be implemented in the user file
  1686. */
  1687. }
  1688. /**
  1689. * @}
  1690. */
  1691. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  1692. * @brief Extended Peripheral State functions
  1693. *
  1694. @verbatim
  1695. ==============================================================================
  1696. ##### Extended Peripheral State functions #####
  1697. ==============================================================================
  1698. [..]
  1699. This subsection permit to get in run-time the status of the peripheral
  1700. and the data flow.
  1701. @endverbatim
  1702. * @{
  1703. */
  1704. /**
  1705. * @brief Return the TIM Hall Sensor interface state
  1706. * @param htim: TIM Hall Sensor handle
  1707. * @retval HAL state
  1708. */
  1709. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  1710. {
  1711. return htim->State;
  1712. }
  1713. /**
  1714. * @}
  1715. */
  1716. /**
  1717. * @brief TIM DMA Commutation callback.
  1718. * @param hdma : pointer to DMA handle.
  1719. * @retval None
  1720. */
  1721. void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  1722. {
  1723. TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1724. htim->State= HAL_TIM_STATE_READY;
  1725. HAL_TIMEx_CommutationCallback(htim);
  1726. }
  1727. /**
  1728. * @brief Enables or disables the TIM Capture Compare Channel xN.
  1729. * @param TIMx to select the TIM peripheral
  1730. * @param Channel: specifies the TIM Channel
  1731. * This parameter can be one of the following values:
  1732. * @arg TIM_Channel_1: TIM Channel 1
  1733. * @arg TIM_Channel_2: TIM Channel 2
  1734. * @arg TIM_Channel_3: TIM Channel 3
  1735. * @param ChannelNState: specifies the TIM Channel CCxNE bit new state.
  1736. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  1737. * @retval None
  1738. */
  1739. static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
  1740. {
  1741. uint32_t tmp = 0;
  1742. tmp = TIM_CCER_CC1NE << Channel;
  1743. /* Reset the CCxNE Bit */
  1744. TIMx->CCER &= ~tmp;
  1745. /* Set or reset the CCxNE Bit */
  1746. TIMx->CCER |= (uint32_t)(ChannelNState << Channel);
  1747. }
  1748. /**
  1749. * @}
  1750. */
  1751. #endif /* HAL_TIM_MODULE_ENABLED */
  1752. /**
  1753. * @}
  1754. */
  1755. /**
  1756. * @}
  1757. */
  1758. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/