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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_ll_delayblock.c
  4. * @author MCD Application Team
  5. * @version V1.2.0
  6. * @date 29-December-2017
  7. * @brief DelayBlock Low Layer HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Delay Block peripheral:
  11. * + input clock frequency range 25MHz to 208MHz
  12. * + up to 12 oversampling phases
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### DelayBlock peripheral features #####
  17. ==============================================================================
  18. [..] The Delay block is used to generate an Output clock which is de-phased from the Input
  19. clock. The phase of the Output clock is programmed by FW. The Output clock is then used
  20. to clock the receive data in i.e. a SDMMC or QSPI interface.
  21. The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
  22. and recenter the Output clock phase to the receive data.
  23. [..] The Delay Block features include the following:
  24. (+) Input clock frequency range 25MHz to 208MHz.
  25. (+) Up to 12 oversampling phases.
  26. ##### How to use this driver #####
  27. ==============================================================================
  28. [..]
  29. This driver is a considered as a driver of service for external devices drivers
  30. that interfaces with the DELAY peripheral.
  31. The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
  32. and configure the Output clock phase.
  33. The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
  34. @endverbatim
  35. ******************************************************************************
  36. * @attention
  37. *
  38. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  39. *
  40. * Redistribution and use in source and binary forms, with or without modification,
  41. * are permitted provided that the following conditions are met:
  42. * 1. Redistributions of source code must retain the above copyright notice,
  43. * this list of conditions and the following disclaimer.
  44. * 2. Redistributions in binary form must reproduce the above copyright notice,
  45. * this list of conditions and the following disclaimer in the documentation
  46. * and/or other materials provided with the distribution.
  47. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  48. * may be used to endorse or promote products derived from this software
  49. * without specific prior written permission.
  50. *
  51. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  52. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  53. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  54. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  55. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  56. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  57. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  58. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  59. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. ******************************************************************************
  63. */
  64. /* Includes ------------------------------------------------------------------*/
  65. #include "stm32h7xx_hal.h"
  66. /** @addtogroup STM32H7xx_HAL_Driver
  67. * @{
  68. */
  69. /** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
  70. * @brief Low layer module for Delay Block
  71. * @{
  72. */
  73. #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
  74. /* Private typedef -----------------------------------------------------------*/
  75. /* Private define ------------------------------------------------------------*/
  76. /* Private macro -------------------------------------------------------------*/
  77. /* Private variables ---------------------------------------------------------*/
  78. /* Private function prototypes -----------------------------------------------*/
  79. /* Exported functions --------------------------------------------------------*/
  80. /** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
  81. * @{
  82. */
  83. /** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
  84. * @brief Initialization and Configuration functions
  85. *
  86. @verbatim
  87. ===============================================================================
  88. ##### Initialization and de-initialization functions #####
  89. ===============================================================================
  90. [..] This section provides functions allowing to:
  91. @endverbatim
  92. * @{
  93. */
  94. /**
  95. * @brief Enable the Delay Block instance.
  96. * @param DLYBx: Pointer to DLYB instance.
  97. * @retval HAL status
  98. */
  99. HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx)
  100. {
  101. uint32_t i=0,N=0, lng=0, tuningOn = 1;
  102. assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
  103. DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
  104. while((tuningOn != 0) && (i < DLYB_MAX_UNIT))
  105. {
  106. DLYBx->CFGR = 12 | (i << 8);
  107. HAL_Delay(1);
  108. if(((DLYBx->CFGR & DLYB_CFGR_LNGF) != 0)
  109. && ((DLYBx->CFGR & DLYB_CFGR_LNG) != 0)
  110. && ((DLYBx->CFGR & DLYB_CFGR_LNG) != (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10)))
  111. {
  112. tuningOn = 0;
  113. }
  114. i++;
  115. }
  116. if(DLYB_MAX_UNIT != i)
  117. {
  118. lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16;
  119. N = 10;
  120. while((N>0) && ((lng >> N) == 0))
  121. {
  122. N--;
  123. }
  124. if(0 != N)
  125. {
  126. MODIFY_REG(DLYBx->CFGR, DLYB_CFGR_SEL, ((N/2)+1));
  127. /* Disable Selection phase */
  128. DLYBx->CR = DLYB_CR_DEN;
  129. return HAL_OK;
  130. }
  131. }
  132. /* Disable DLYB */
  133. DelayBlock_Disable(DLYBx);
  134. return HAL_ERROR;
  135. }
  136. /**
  137. * @brief Disable the Delay Block instance.
  138. * @param DLYBx: Pointer to DLYB instance.
  139. * @retval HAL status
  140. */
  141. HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx)
  142. {
  143. /* Disable DLYB */
  144. DLYBx->CR = 0;
  145. return HAL_OK;
  146. }
  147. /**
  148. * @}
  149. */
  150. /**
  151. * @}
  152. */
  153. #endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
  154. /**
  155. * @}
  156. */
  157. /**
  158. * @}
  159. */
  160. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/