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- /**
- ******************************************************************************
- * @file startup_stm32wb35xx_cm4.s
- * @author MCD Application Team
- * @brief STM32WB35xx devices vector table GCC toolchain.
- * This module performs:
- * - Set the initial SP
- * - Set the initial PC == Reset_Handler,
- * - Set the vector table entries with the exceptions ISR address
- * - Branches to main in the C library (which eventually
- * calls main()).
- * After Reset the Cortex-M4 processor is in Thread mode,
- * priority is Privileged, and the Stack is set to Main.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2019 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
- .syntax unified
- .cpu cortex-m4
- .fpu softvfp
- .thumb
-
- .global g_pfnVectors
- .global Default_Handler
-
- /* start address for the initialization values of the .data section.
- defined in linker script */
- .word _sidata
- /* start address for the .data section. defined in linker script */
- .word _sdata
- /* end address for the .data section. defined in linker script */
- .word _edata
- /* start address for the .bss section. defined in linker script */
- .word _sbss
- /* end address for the .bss section. defined in linker script */
- .word _ebss
- /* start address for the .MB_MEM2 section. defined in linker script */
- .word _sMB_MEM2
- /* end address for the .MB_MEM2 section. defined in linker script */
- .word _eMB_MEM2
-
- /* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
- .macro INIT_BSS start, end
- ldr r0, =\start
- ldr r1, =\end
- movs r3, #0
- bl LoopFillZerobss
- .endm
-
- /* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
- .macro INIT_DATA start, end, src
- ldr r0, =\start
- ldr r1, =\end
- ldr r2, =\src
- movs r3, #0
- bl LoopCopyDataInit
- .endm
-
- .section .text.data_initializers
- CopyDataInit:
- ldr r4, [r2, r3]
- str r4, [r0, r3]
- adds r3, r3, #4
-
- LoopCopyDataInit:
- adds r4, r0, r3
- cmp r4, r1
- bcc CopyDataInit
- bx lr
-
- FillZerobss:
- str r3, [r0]
- adds r0, r0, #4
-
- LoopFillZerobss:
- cmp r0, r1
- bcc FillZerobss
- bx lr
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
- Reset_Handler:
- ldr r0, =_estack
- mov sp, r0 /* set stack pointer */
- /* Call the clock system intitialization function.*/
- bl SystemInit
-
- /* Copy the data segment initializers from flash to SRAM */
- INIT_DATA _sdata, _edata, _sidata
-
- /* Zero fill the bss segments. */
- INIT_BSS _sbss, _ebss
- INIT_BSS _sMB_MEM2, _eMB_MEM2
-
- /* Call static constructors */
- bl __libc_init_array
- /* Call the application s entry point.*/
- bl main
-
- LoopForever:
- b LoopForever
-
- .size Reset_Handler, .-Reset_Handler
-
- /**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- *
- * @param None
- * @retval None
- */
- .section .text.Default_Handler,"ax",%progbits
- Default_Handler:
- Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
- /******************************************************************************
- *
- * The minimal vector table for a Cortex-M4. Note that the proper constructs
- * must be placed on this to ensure that it ends up at physical address
- * 0x0000.0000.
- *
- ******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-
- g_pfnVectors:
- .word _estack
- .word Reset_Handler
- .word NMI_Handler
- .word HardFault_Handler
- .word MemManage_Handler
- .word BusFault_Handler
- .word UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word SVC_Handler
- .word DebugMon_Handler
- .word 0
- .word PendSV_Handler
- .word SysTick_Handler
- .word WWDG_IRQHandler
- .word PVD_PVM_IRQHandler
- .word TAMP_STAMP_LSECSS_IRQHandler
- .word RTC_WKUP_IRQHandler
- .word FLASH_IRQHandler
- .word RCC_IRQHandler
- .word EXTI0_IRQHandler
- .word EXTI1_IRQHandler
- .word EXTI2_IRQHandler
- .word EXTI3_IRQHandler
- .word EXTI4_IRQHandler
- .word DMA1_Channel1_IRQHandler
- .word DMA1_Channel2_IRQHandler
- .word DMA1_Channel3_IRQHandler
- .word DMA1_Channel4_IRQHandler
- .word DMA1_Channel5_IRQHandler
- .word DMA1_Channel6_IRQHandler
- .word DMA1_Channel7_IRQHandler
- .word ADC1_IRQHandler
- .word USB_HP_IRQHandler
- .word USB_LP_IRQHandler
- .word C2SEV_PWR_C2H_IRQHandler
- .word COMP_IRQHandler
- .word EXTI9_5_IRQHandler
- .word TIM1_BRK_IRQHandler
- .word TIM1_UP_TIM16_IRQHandler
- .word TIM1_TRG_COM_TIM17_IRQHandler
- .word TIM1_CC_IRQHandler
- .word TIM2_IRQHandler
- .word PKA_IRQHandler
- .word I2C1_EV_IRQHandler
- .word I2C1_ER_IRQHandler
- .word I2C3_EV_IRQHandler
- .word I2C3_ER_IRQHandler
- .word SPI1_IRQHandler
- .word 0
- .word USART1_IRQHandler
- .word LPUART1_IRQHandler
- .word 0
- .word 0
- .word EXTI15_10_IRQHandler
- .word RTC_Alarm_IRQHandler
- .word CRS_IRQHandler
- .word PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
- .word IPCC_C1_RX_IRQHandler
- .word IPCC_C1_TX_IRQHandler
- .word HSEM_IRQHandler
- .word LPTIM1_IRQHandler
- .word LPTIM2_IRQHandler
- .word 0
- .word QUADSPI_IRQHandler
- .word AES1_IRQHandler
- .word AES2_IRQHandler
- .word RNG_IRQHandler
- .word FPU_IRQHandler
- .word DMA2_Channel1_IRQHandler
- .word DMA2_Channel2_IRQHandler
- .word DMA2_Channel3_IRQHandler
- .word DMA2_Channel4_IRQHandler
- .word DMA2_Channel5_IRQHandler
- .word DMA2_Channel6_IRQHandler
- .word DMA2_Channel7_IRQHandler
- .word DMAMUX1_OVR_IRQHandler
-
- /*******************************************************************************
- *
- * Provide weak aliases for each Exception handler to the Default_Handler.
- * As they are weak aliases, any function with the same name will override
- * this definition.
- *
- *******************************************************************************/
- .weak NMI_Handler
- .thumb_set NMI_Handler,Default_Handler
-
- .weak HardFault_Handler
- .thumb_set HardFault_Handler,Default_Handler
-
- .weak MemManage_Handler
- .thumb_set MemManage_Handler,Default_Handler
-
- .weak BusFault_Handler
- .thumb_set BusFault_Handler,Default_Handler
-
- .weak UsageFault_Handler
- .thumb_set UsageFault_Handler,Default_Handler
-
- .weak SVC_Handler
- .thumb_set SVC_Handler,Default_Handler
-
- .weak DebugMon_Handler
- .thumb_set DebugMon_Handler,Default_Handler
-
- .weak PendSV_Handler
- .thumb_set PendSV_Handler,Default_Handler
-
- .weak SysTick_Handler
- .thumb_set SysTick_Handler,Default_Handler
-
- .weak WWDG_IRQHandler
- .thumb_set WWDG_IRQHandler,Default_Handler
-
- .weak PVD_PVM_IRQHandler
- .thumb_set PVD_PVM_IRQHandler,Default_Handler
-
- .weak TAMP_STAMP_LSECSS_IRQHandler
- .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
-
- .weak RTC_WKUP_IRQHandler
- .thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
- .weak FLASH_IRQHandler
- .thumb_set FLASH_IRQHandler,Default_Handler
-
- .weak RCC_IRQHandler
- .thumb_set RCC_IRQHandler,Default_Handler
-
- .weak EXTI0_IRQHandler
- .thumb_set EXTI0_IRQHandler,Default_Handler
-
- .weak EXTI1_IRQHandler
- .thumb_set EXTI1_IRQHandler,Default_Handler
-
- .weak EXTI2_IRQHandler
- .thumb_set EXTI2_IRQHandler,Default_Handler
-
- .weak EXTI3_IRQHandler
- .thumb_set EXTI3_IRQHandler,Default_Handler
-
- .weak EXTI4_IRQHandler
- .thumb_set EXTI4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel1_IRQHandler
- .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
- .weak DMA1_Channel2_IRQHandler
- .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
- .weak DMA1_Channel3_IRQHandler
- .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
- .weak DMA1_Channel4_IRQHandler
- .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel5_IRQHandler
- .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
- .weak DMA1_Channel6_IRQHandler
- .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
- .weak DMA1_Channel7_IRQHandler
- .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
- .weak ADC1_IRQHandler
- .thumb_set ADC1_IRQHandler,Default_Handler
-
- .weak USB_HP_IRQHandler
- .thumb_set USB_HP_IRQHandler,Default_Handler
-
- .weak USB_LP_IRQHandler
- .thumb_set USB_LP_IRQHandler,Default_Handler
-
- .weak C2SEV_PWR_C2H_IRQHandler
- .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
-
- .weak COMP_IRQHandler
- .thumb_set COMP_IRQHandler,Default_Handler
-
- .weak EXTI9_5_IRQHandler
- .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
- .weak TIM1_BRK_IRQHandler
- .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
- .weak TIM1_UP_TIM16_IRQHandler
- .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
- .weak TIM1_TRG_COM_TIM17_IRQHandler
- .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
- .weak TIM1_CC_IRQHandler
- .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
- .weak TIM2_IRQHandler
- .thumb_set TIM2_IRQHandler,Default_Handler
-
- .weak PKA_IRQHandler
- .thumb_set PKA_IRQHandler,Default_Handler
-
- .weak I2C1_EV_IRQHandler
- .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
- .weak I2C1_ER_IRQHandler
- .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
- .weak I2C3_EV_IRQHandler
- .thumb_set I2C3_EV_IRQHandler,Default_Handler
-
- .weak I2C3_ER_IRQHandler
- .thumb_set I2C3_ER_IRQHandler,Default_Handler
-
- .weak SPI1_IRQHandler
- .thumb_set SPI1_IRQHandler,Default_Handler
-
- .weak USART1_IRQHandler
- .thumb_set USART1_IRQHandler,Default_Handler
-
- .weak LPUART1_IRQHandler
- .thumb_set LPUART1_IRQHandler,Default_Handler
-
- .weak EXTI15_10_IRQHandler
- .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
- .weak RTC_Alarm_IRQHandler
- .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
- .weak CRS_IRQHandler
- .thumb_set CRS_IRQHandler,Default_Handler
-
- .weak PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
- .thumb_set PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler,Default_Handler
-
- .weak IPCC_C1_RX_IRQHandler
- .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
-
- .weak IPCC_C1_TX_IRQHandler
- .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
-
- .weak HSEM_IRQHandler
- .thumb_set HSEM_IRQHandler,Default_Handler
-
- .weak LPTIM1_IRQHandler
- .thumb_set LPTIM1_IRQHandler,Default_Handler
-
- .weak LPTIM2_IRQHandler
- .thumb_set LPTIM2_IRQHandler,Default_Handler
-
- .weak QUADSPI_IRQHandler
- .thumb_set QUADSPI_IRQHandler,Default_Handler
-
- .weak AES1_IRQHandler
- .thumb_set AES1_IRQHandler,Default_Handler
-
- .weak AES2_IRQHandler
- .thumb_set AES2_IRQHandler,Default_Handler
-
- .weak RNG_IRQHandler
- .thumb_set RNG_IRQHandler,Default_Handler
-
- .weak FPU_IRQHandler
- .thumb_set FPU_IRQHandler,Default_Handler
-
- .weak DMA2_Channel1_IRQHandler
- .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
- .weak DMA2_Channel2_IRQHandler
- .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
- .weak DMA2_Channel3_IRQHandler
- .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
- .weak DMA2_Channel4_IRQHandler
- .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
- .weak DMA2_Channel5_IRQHandler
- .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
- .weak DMA2_Channel6_IRQHandler
- .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
-
- .weak DMA2_Channel7_IRQHandler
- .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
-
- .weak DMAMUX1_OVR_IRQHandler
- .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
-
- /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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