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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_flash_ex.c
  4. * @author MCD Application Team
  5. * @version V1.7.1
  6. * @date 14-April-2017
  7. * @brief Extended FLASH HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the FLASH extension peripheral:
  10. * + Extended programming operations functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### Flash Extension features #####
  15. ==============================================================================
  16. [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
  17. STM32F429xx/439xx devices contains the following additional features
  18. (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
  19. capability (RWW)
  20. (+) Dual bank memory organization
  21. (+) PCROP protection for all banks
  22. ##### How to use this driver #####
  23. ==============================================================================
  24. [..] This driver provides functions to configure and program the FLASH memory
  25. of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
  26. devices. It includes
  27. (#) FLASH Memory Erase functions:
  28. (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
  29. HAL_FLASH_Lock() functions
  30. (++) Erase function: Erase sector, erase all sectors
  31. (++) There are two modes of erase :
  32. (+++) Polling Mode using HAL_FLASHEx_Erase()
  33. (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
  34. (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
  35. (++) Set/Reset the write protection
  36. (++) Set the Read protection Level
  37. (++) Set the BOR level
  38. (++) Program the user Option Bytes
  39. (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
  40. (++) Extended space (bank 2) erase function
  41. (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
  42. (++) Dual Boot activation
  43. (++) Write protection configuration for bank 2
  44. (++) PCROP protection configuration and control for both banks
  45. @endverbatim
  46. ******************************************************************************
  47. * @attention
  48. *
  49. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  50. *
  51. * Redistribution and use in source and binary forms, with or without modification,
  52. * are permitted provided that the following conditions are met:
  53. * 1. Redistributions of source code must retain the above copyright notice,
  54. * this list of conditions and the following disclaimer.
  55. * 2. Redistributions in binary form must reproduce the above copyright notice,
  56. * this list of conditions and the following disclaimer in the documentation
  57. * and/or other materials provided with the distribution.
  58. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  59. * may be used to endorse or promote products derived from this software
  60. * without specific prior written permission.
  61. *
  62. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  63. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  65. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  66. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  68. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  69. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  70. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  71. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  72. *
  73. ******************************************************************************
  74. */
  75. /* Includes ------------------------------------------------------------------*/
  76. #include "stm32f4xx_hal.h"
  77. /** @addtogroup STM32F4xx_HAL_Driver
  78. * @{
  79. */
  80. /** @defgroup FLASHEx FLASHEx
  81. * @brief FLASH HAL Extension module driver
  82. * @{
  83. */
  84. #ifdef HAL_FLASH_MODULE_ENABLED
  85. /* Private typedef -----------------------------------------------------------*/
  86. /* Private define ------------------------------------------------------------*/
  87. /** @addtogroup FLASHEx_Private_Constants
  88. * @{
  89. */
  90. #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
  91. /**
  92. * @}
  93. */
  94. /* Private macro -------------------------------------------------------------*/
  95. /* Private variables ---------------------------------------------------------*/
  96. /** @addtogroup FLASHEx_Private_Variables
  97. * @{
  98. */
  99. extern FLASH_ProcessTypeDef pFlash;
  100. /**
  101. * @}
  102. */
  103. /* Private function prototypes -----------------------------------------------*/
  104. /** @addtogroup FLASHEx_Private_Functions
  105. * @{
  106. */
  107. /* Option bytes control */
  108. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
  109. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
  110. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
  111. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
  112. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
  113. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
  114. static uint8_t FLASH_OB_GetUser(void);
  115. static uint16_t FLASH_OB_GetWRP(void);
  116. static uint8_t FLASH_OB_GetRDP(void);
  117. static uint8_t FLASH_OB_GetBOR(void);
  118. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
  119. defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  120. defined(STM32F423xx)
  121. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
  122. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
  123. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  124. STM32F413xx || STM32F423xx */
  125. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  126. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  127. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  128. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
  129. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  130. extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
  131. /**
  132. * @}
  133. */
  134. /* Exported functions --------------------------------------------------------*/
  135. /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
  136. * @{
  137. */
  138. /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
  139. * @brief Extended IO operation functions
  140. *
  141. @verbatim
  142. ===============================================================================
  143. ##### Extended programming operation functions #####
  144. ===============================================================================
  145. [..]
  146. This subsection provides a set of functions allowing to manage the Extension FLASH
  147. programming operations.
  148. @endverbatim
  149. * @{
  150. */
  151. /**
  152. * @brief Perform a mass erase or erase the specified FLASH memory sectors
  153. * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  154. * contains the configuration information for the erasing.
  155. *
  156. * @param[out] SectorError: pointer to variable that
  157. * contains the configuration information on faulty sector in case of error
  158. * (0xFFFFFFFFU means that all the sectors have been correctly erased)
  159. *
  160. * @retval HAL Status
  161. */
  162. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
  163. {
  164. HAL_StatusTypeDef status = HAL_ERROR;
  165. uint32_t index = 0U;
  166. /* Process Locked */
  167. __HAL_LOCK(&pFlash);
  168. /* Check the parameters */
  169. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  170. /* Wait for last operation to be completed */
  171. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  172. if(status == HAL_OK)
  173. {
  174. /*Initialization of SectorError variable*/
  175. *SectorError = 0xFFFFFFFFU;
  176. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  177. {
  178. /*Mass erase to be done*/
  179. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  180. /* Wait for last operation to be completed */
  181. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  182. /* if the erase operation is completed, disable the MER Bit */
  183. FLASH->CR &= (~FLASH_MER_BIT);
  184. }
  185. else
  186. {
  187. /* Check the parameters */
  188. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  189. /* Erase by sector by sector to be done*/
  190. for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
  191. {
  192. FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
  193. /* Wait for last operation to be completed */
  194. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  195. /* If the erase operation is completed, disable the SER and SNB Bits */
  196. CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
  197. if(status != HAL_OK)
  198. {
  199. /* In case of error, stop erase procedure and return the faulty sector*/
  200. *SectorError = index;
  201. break;
  202. }
  203. }
  204. }
  205. /* Flush the caches to be sure of the data consistency */
  206. FLASH_FlushCaches();
  207. }
  208. /* Process Unlocked */
  209. __HAL_UNLOCK(&pFlash);
  210. return status;
  211. }
  212. /**
  213. * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
  214. * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  215. * contains the configuration information for the erasing.
  216. *
  217. * @retval HAL Status
  218. */
  219. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
  220. {
  221. HAL_StatusTypeDef status = HAL_OK;
  222. /* Process Locked */
  223. __HAL_LOCK(&pFlash);
  224. /* Check the parameters */
  225. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  226. /* Enable End of FLASH Operation interrupt */
  227. __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
  228. /* Enable Error source interrupt */
  229. __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
  230. /* Clear pending flags (if any) */
  231. __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
  232. FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
  233. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  234. {
  235. /*Mass erase to be done*/
  236. pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
  237. pFlash.Bank = pEraseInit->Banks;
  238. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  239. }
  240. else
  241. {
  242. /* Erase by sector to be done*/
  243. /* Check the parameters */
  244. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  245. pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
  246. pFlash.NbSectorsToErase = pEraseInit->NbSectors;
  247. pFlash.Sector = pEraseInit->Sector;
  248. pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
  249. /*Erase 1st sector and wait for IT*/
  250. FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
  251. }
  252. return status;
  253. }
  254. /**
  255. * @brief Program option bytes
  256. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  257. * contains the configuration information for the programming.
  258. *
  259. * @retval HAL Status
  260. */
  261. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
  262. {
  263. HAL_StatusTypeDef status = HAL_ERROR;
  264. /* Process Locked */
  265. __HAL_LOCK(&pFlash);
  266. /* Check the parameters */
  267. assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
  268. /*Write protection configuration*/
  269. if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
  270. {
  271. assert_param(IS_WRPSTATE(pOBInit->WRPState));
  272. if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
  273. {
  274. /*Enable of Write protection on the selected Sector*/
  275. status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
  276. }
  277. else
  278. {
  279. /*Disable of Write protection on the selected Sector*/
  280. status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
  281. }
  282. }
  283. /*Read protection configuration*/
  284. if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
  285. {
  286. status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
  287. }
  288. /*USER configuration*/
  289. if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
  290. {
  291. status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
  292. pOBInit->USERConfig&OB_STOP_NO_RST,
  293. pOBInit->USERConfig&OB_STDBY_NO_RST);
  294. }
  295. /*BOR Level configuration*/
  296. if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
  297. {
  298. status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
  299. }
  300. /* Process Unlocked */
  301. __HAL_UNLOCK(&pFlash);
  302. return status;
  303. }
  304. /**
  305. * @brief Get the Option byte configuration
  306. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  307. * contains the configuration information for the programming.
  308. *
  309. * @retval None
  310. */
  311. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
  312. {
  313. pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
  314. /*Get WRP*/
  315. pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
  316. /*Get RDP Level*/
  317. pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
  318. /*Get USER*/
  319. pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
  320. /*Get BOR Level*/
  321. pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
  322. }
  323. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  324. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  325. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
  326. defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  327. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  328. /**
  329. * @brief Program option bytes
  330. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  331. * contains the configuration information for the programming.
  332. *
  333. * @retval HAL Status
  334. */
  335. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  336. {
  337. HAL_StatusTypeDef status = HAL_ERROR;
  338. /* Check the parameters */
  339. assert_param(IS_OBEX(pAdvOBInit->OptionType));
  340. /*Program PCROP option byte*/
  341. if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
  342. {
  343. /* Check the parameters */
  344. assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
  345. if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
  346. {
  347. /*Enable of Write protection on the selected Sector*/
  348. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  349. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  350. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  351. status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
  352. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  353. status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  354. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  355. STM32F413xx || STM32F423xx */
  356. }
  357. else
  358. {
  359. /*Disable of Write protection on the selected Sector*/
  360. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  361. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  362. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  363. status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
  364. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  365. status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  366. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  367. STM32F413xx || STM32F423xx */
  368. }
  369. }
  370. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  371. /*Program BOOT config option byte*/
  372. if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
  373. {
  374. status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
  375. }
  376. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  377. return status;
  378. }
  379. /**
  380. * @brief Get the OBEX byte configuration
  381. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  382. * contains the configuration information for the programming.
  383. *
  384. * @retval None
  385. */
  386. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  387. {
  388. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  389. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  390. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  391. /*Get Sector*/
  392. pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  393. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  394. /*Get Sector for Bank1*/
  395. pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  396. /*Get Sector for Bank2*/
  397. pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  398. /*Get Boot config OB*/
  399. pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
  400. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  401. STM32F413xx || STM32F423xx */
  402. }
  403. /**
  404. * @brief Select the Protection Mode
  405. *
  406. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  407. * Global Read Out Protection modification (from level1 to level0)
  408. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  409. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  410. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  411. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  412. *
  413. * @retval HAL Status
  414. */
  415. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
  416. {
  417. uint8_t optiontmp = 0xFF;
  418. /* Mask SPRMOD bit */
  419. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  420. /* Update Option Byte */
  421. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
  422. return HAL_OK;
  423. }
  424. /**
  425. * @brief Deselect the Protection Mode
  426. *
  427. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  428. * Global Read Out Protection modification (from level1 to level0)
  429. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  430. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  431. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  432. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  433. *
  434. * @retval HAL Status
  435. */
  436. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
  437. {
  438. uint8_t optiontmp = 0xFF;
  439. /* Mask SPRMOD bit */
  440. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  441. /* Update Option Byte */
  442. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
  443. return HAL_OK;
  444. }
  445. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
  446. STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  447. STM32F413xx || STM32F423xx */
  448. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  449. /**
  450. * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
  451. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
  452. * @retval The FLASH Write Protection Option Bytes value
  453. */
  454. uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
  455. {
  456. /* Return the FLASH write protection Register value */
  457. return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  458. }
  459. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  460. /**
  461. * @}
  462. */
  463. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  464. /**
  465. * @brief Full erase of FLASH memory sectors
  466. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  467. * This parameter can be one of the following values:
  468. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  469. * the operation will be done by byte (8-bit)
  470. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  471. * the operation will be done by half word (16-bit)
  472. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  473. * the operation will be done by word (32-bit)
  474. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  475. * the operation will be done by double word (64-bit)
  476. *
  477. * @param Banks: Banks to be erased
  478. * This parameter can be one of the following values:
  479. * @arg FLASH_BANK_1: Bank1 to be erased
  480. * @arg FLASH_BANK_2: Bank2 to be erased
  481. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  482. *
  483. * @retval HAL Status
  484. */
  485. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  486. {
  487. /* Check the parameters */
  488. assert_param(IS_VOLTAGERANGE(VoltageRange));
  489. assert_param(IS_FLASH_BANK(Banks));
  490. /* if the previous operation is completed, proceed to erase all sectors */
  491. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  492. if(Banks == FLASH_BANK_BOTH)
  493. {
  494. /* bank1 & bank2 will be erased*/
  495. FLASH->CR |= FLASH_MER_BIT;
  496. }
  497. else if(Banks == FLASH_BANK_1)
  498. {
  499. /*Only bank1 will be erased*/
  500. FLASH->CR |= FLASH_CR_MER1;
  501. }
  502. else
  503. {
  504. /*Only bank2 will be erased*/
  505. FLASH->CR |= FLASH_CR_MER2;
  506. }
  507. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  508. }
  509. /**
  510. * @brief Erase the specified FLASH memory sector
  511. * @param Sector: FLASH sector to erase
  512. * The value of this parameter depend on device used within the same series
  513. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  514. * This parameter can be one of the following values:
  515. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  516. * the operation will be done by byte (8-bit)
  517. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  518. * the operation will be done by half word (16-bit)
  519. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  520. * the operation will be done by word (32-bit)
  521. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  522. * the operation will be done by double word (64-bit)
  523. *
  524. * @retval None
  525. */
  526. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  527. {
  528. uint32_t tmp_psize = 0U;
  529. /* Check the parameters */
  530. assert_param(IS_FLASH_SECTOR(Sector));
  531. assert_param(IS_VOLTAGERANGE(VoltageRange));
  532. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  533. {
  534. tmp_psize = FLASH_PSIZE_BYTE;
  535. }
  536. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  537. {
  538. tmp_psize = FLASH_PSIZE_HALF_WORD;
  539. }
  540. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  541. {
  542. tmp_psize = FLASH_PSIZE_WORD;
  543. }
  544. else
  545. {
  546. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  547. }
  548. /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  549. if(Sector > FLASH_SECTOR_11)
  550. {
  551. Sector += 4U;
  552. }
  553. /* If the previous operation is completed, proceed to erase the sector */
  554. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  555. FLASH->CR |= tmp_psize;
  556. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  557. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  558. FLASH->CR |= FLASH_CR_STRT;
  559. }
  560. /**
  561. * @brief Enable the write protection of the desired bank1 or bank 2 sectors
  562. *
  563. * @note When the memory read protection level is selected (RDP level = 1),
  564. * it is not possible to program or erase the flash sector i if CortexM4
  565. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  566. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  567. *
  568. * @param WRPSector: specifies the sector(s) to be write protected.
  569. * This parameter can be one of the following values:
  570. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  571. * @arg OB_WRP_SECTOR_All
  572. * @note BANK2 starts from OB_WRP_SECTOR_12
  573. *
  574. * @param Banks: Enable write protection on all the sectors for the specific bank
  575. * This parameter can be one of the following values:
  576. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  577. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  578. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  579. *
  580. * @retval HAL FLASH State
  581. */
  582. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  583. {
  584. HAL_StatusTypeDef status = HAL_OK;
  585. /* Check the parameters */
  586. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  587. assert_param(IS_FLASH_BANK(Banks));
  588. /* Wait for last operation to be completed */
  589. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  590. if(status == HAL_OK)
  591. {
  592. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  593. (WRPSector < OB_WRP_SECTOR_12))
  594. {
  595. if(WRPSector == OB_WRP_SECTOR_All)
  596. {
  597. /*Write protection on all sector of BANK1*/
  598. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
  599. }
  600. else
  601. {
  602. /*Write protection done on sectors of BANK1*/
  603. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  604. }
  605. }
  606. else
  607. {
  608. /*Write protection done on sectors of BANK2*/
  609. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  610. }
  611. /*Write protection on all sector of BANK2*/
  612. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  613. {
  614. /* Wait for last operation to be completed */
  615. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  616. if(status == HAL_OK)
  617. {
  618. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  619. }
  620. }
  621. }
  622. return status;
  623. }
  624. /**
  625. * @brief Disable the write protection of the desired bank1 or bank 2 sectors
  626. *
  627. * @note When the memory read protection level is selected (RDP level = 1),
  628. * it is not possible to program or erase the flash sector i if CortexM4
  629. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  630. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  631. *
  632. * @param WRPSector: specifies the sector(s) to be write protected.
  633. * This parameter can be one of the following values:
  634. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  635. * @arg OB_WRP_Sector_All
  636. * @note BANK2 starts from OB_WRP_SECTOR_12
  637. *
  638. * @param Banks: Disable write protection on all the sectors for the specific bank
  639. * This parameter can be one of the following values:
  640. * @arg FLASH_BANK_1: Bank1 to be erased
  641. * @arg FLASH_BANK_2: Bank2 to be erased
  642. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  643. *
  644. * @retval HAL Status
  645. */
  646. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  647. {
  648. HAL_StatusTypeDef status = HAL_OK;
  649. /* Check the parameters */
  650. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  651. assert_param(IS_FLASH_BANK(Banks));
  652. /* Wait for last operation to be completed */
  653. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  654. if(status == HAL_OK)
  655. {
  656. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  657. (WRPSector < OB_WRP_SECTOR_12))
  658. {
  659. if(WRPSector == OB_WRP_SECTOR_All)
  660. {
  661. /*Write protection on all sector of BANK1*/
  662. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  663. }
  664. else
  665. {
  666. /*Write protection done on sectors of BANK1*/
  667. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  668. }
  669. }
  670. else
  671. {
  672. /*Write protection done on sectors of BANK2*/
  673. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  674. }
  675. /*Write protection on all sector of BANK2*/
  676. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  677. {
  678. /* Wait for last operation to be completed */
  679. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  680. if(status == HAL_OK)
  681. {
  682. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  683. }
  684. }
  685. }
  686. return status;
  687. }
  688. /**
  689. * @brief Configure the Dual Bank Boot.
  690. *
  691. * @note This function can be used only for STM32F42xxx/43xxx devices.
  692. *
  693. * @param BootConfig specifies the Dual Bank Boot Option byte.
  694. * This parameter can be one of the following values:
  695. * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
  696. * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
  697. * @retval None
  698. */
  699. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
  700. {
  701. HAL_StatusTypeDef status = HAL_OK;
  702. /* Check the parameters */
  703. assert_param(IS_OB_BOOT(BootConfig));
  704. /* Wait for last operation to be completed */
  705. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  706. if(status == HAL_OK)
  707. {
  708. /* Set Dual Bank Boot */
  709. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
  710. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  711. }
  712. return status;
  713. }
  714. /**
  715. * @brief Enable the read/write protection (PCROP) of the desired
  716. * sectors of Bank 1 and/or Bank 2.
  717. * @note This function can be used only for STM32F42xxx/43xxx devices.
  718. * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
  719. * This parameter can be one of the following values:
  720. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  721. * @arg OB_PCROP_SECTOR__All
  722. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  723. * This parameter can be one of the following values:
  724. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  725. * @arg OB_PCROP_SECTOR__All
  726. * @param Banks Enable PCROP protection on all the sectors for the specific bank
  727. * This parameter can be one of the following values:
  728. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  729. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  730. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  731. *
  732. * @retval HAL Status
  733. */
  734. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  735. {
  736. HAL_StatusTypeDef status = HAL_OK;
  737. assert_param(IS_FLASH_BANK(Banks));
  738. /* Wait for last operation to be completed */
  739. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  740. if(status == HAL_OK)
  741. {
  742. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  743. {
  744. assert_param(IS_OB_PCROP(SectorBank1));
  745. /*Write protection done on sectors of BANK1*/
  746. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
  747. }
  748. else
  749. {
  750. assert_param(IS_OB_PCROP(SectorBank2));
  751. /*Write protection done on sectors of BANK2*/
  752. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  753. }
  754. /*Write protection on all sector of BANK2*/
  755. if(Banks == FLASH_BANK_BOTH)
  756. {
  757. assert_param(IS_OB_PCROP(SectorBank2));
  758. /* Wait for last operation to be completed */
  759. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  760. if(status == HAL_OK)
  761. {
  762. /*Write protection done on sectors of BANK2*/
  763. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  764. }
  765. }
  766. }
  767. return status;
  768. }
  769. /**
  770. * @brief Disable the read/write protection (PCROP) of the desired
  771. * sectors of Bank 1 and/or Bank 2.
  772. * @note This function can be used only for STM32F42xxx/43xxx devices.
  773. * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
  774. * This parameter can be one of the following values:
  775. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  776. * @arg OB_PCROP_SECTOR__All
  777. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  778. * This parameter can be one of the following values:
  779. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  780. * @arg OB_PCROP_SECTOR__All
  781. * @param Banks Disable PCROP protection on all the sectors for the specific bank
  782. * This parameter can be one of the following values:
  783. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  784. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  785. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  786. *
  787. * @retval HAL Status
  788. */
  789. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  790. {
  791. HAL_StatusTypeDef status = HAL_OK;
  792. /* Check the parameters */
  793. assert_param(IS_FLASH_BANK(Banks));
  794. /* Wait for last operation to be completed */
  795. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  796. if(status == HAL_OK)
  797. {
  798. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  799. {
  800. assert_param(IS_OB_PCROP(SectorBank1));
  801. /*Write protection done on sectors of BANK1*/
  802. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
  803. }
  804. else
  805. {
  806. /*Write protection done on sectors of BANK2*/
  807. assert_param(IS_OB_PCROP(SectorBank2));
  808. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  809. }
  810. /*Write protection on all sector of BANK2*/
  811. if(Banks == FLASH_BANK_BOTH)
  812. {
  813. assert_param(IS_OB_PCROP(SectorBank2));
  814. /* Wait for last operation to be completed */
  815. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  816. if(status == HAL_OK)
  817. {
  818. /*Write protection done on sectors of BANK2*/
  819. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  820. }
  821. }
  822. }
  823. return status;
  824. }
  825. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  826. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  827. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  828. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
  829. defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  830. defined(STM32F423xx)
  831. /**
  832. * @brief Mass erase of FLASH memory
  833. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  834. * This parameter can be one of the following values:
  835. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  836. * the operation will be done by byte (8-bit)
  837. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  838. * the operation will be done by half word (16-bit)
  839. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  840. * the operation will be done by word (32-bit)
  841. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  842. * the operation will be done by double word (64-bit)
  843. *
  844. * @param Banks: Banks to be erased
  845. * This parameter can be one of the following values:
  846. * @arg FLASH_BANK_1: Bank1 to be erased
  847. *
  848. * @retval None
  849. */
  850. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  851. {
  852. /* Check the parameters */
  853. assert_param(IS_VOLTAGERANGE(VoltageRange));
  854. assert_param(IS_FLASH_BANK(Banks));
  855. /* If the previous operation is completed, proceed to erase all sectors */
  856. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  857. FLASH->CR |= FLASH_CR_MER;
  858. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  859. }
  860. /**
  861. * @brief Erase the specified FLASH memory sector
  862. * @param Sector: FLASH sector to erase
  863. * The value of this parameter depend on device used within the same series
  864. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  865. * This parameter can be one of the following values:
  866. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  867. * the operation will be done by byte (8-bit)
  868. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  869. * the operation will be done by half word (16-bit)
  870. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  871. * the operation will be done by word (32-bit)
  872. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  873. * the operation will be done by double word (64-bit)
  874. *
  875. * @retval None
  876. */
  877. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  878. {
  879. uint32_t tmp_psize = 0U;
  880. /* Check the parameters */
  881. assert_param(IS_FLASH_SECTOR(Sector));
  882. assert_param(IS_VOLTAGERANGE(VoltageRange));
  883. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  884. {
  885. tmp_psize = FLASH_PSIZE_BYTE;
  886. }
  887. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  888. {
  889. tmp_psize = FLASH_PSIZE_HALF_WORD;
  890. }
  891. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  892. {
  893. tmp_psize = FLASH_PSIZE_WORD;
  894. }
  895. else
  896. {
  897. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  898. }
  899. /* If the previous operation is completed, proceed to erase the sector */
  900. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  901. FLASH->CR |= tmp_psize;
  902. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  903. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  904. FLASH->CR |= FLASH_CR_STRT;
  905. }
  906. /**
  907. * @brief Enable the write protection of the desired bank 1 sectors
  908. *
  909. * @note When the memory read protection level is selected (RDP level = 1),
  910. * it is not possible to program or erase the flash sector i if CortexM4
  911. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  912. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  913. *
  914. * @param WRPSector: specifies the sector(s) to be write protected.
  915. * The value of this parameter depend on device used within the same series
  916. *
  917. * @param Banks: Enable write protection on all the sectors for the specific bank
  918. * This parameter can be one of the following values:
  919. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  920. *
  921. * @retval HAL Status
  922. */
  923. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  924. {
  925. HAL_StatusTypeDef status = HAL_OK;
  926. /* Check the parameters */
  927. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  928. assert_param(IS_FLASH_BANK(Banks));
  929. /* Wait for last operation to be completed */
  930. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  931. if(status == HAL_OK)
  932. {
  933. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  934. }
  935. return status;
  936. }
  937. /**
  938. * @brief Disable the write protection of the desired bank 1 sectors
  939. *
  940. * @note When the memory read protection level is selected (RDP level = 1),
  941. * it is not possible to program or erase the flash sector i if CortexM4
  942. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  943. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  944. *
  945. * @param WRPSector: specifies the sector(s) to be write protected.
  946. * The value of this parameter depend on device used within the same series
  947. *
  948. * @param Banks: Enable write protection on all the sectors for the specific bank
  949. * This parameter can be one of the following values:
  950. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  951. *
  952. * @retval HAL Status
  953. */
  954. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  955. {
  956. HAL_StatusTypeDef status = HAL_OK;
  957. /* Check the parameters */
  958. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  959. assert_param(IS_FLASH_BANK(Banks));
  960. /* Wait for last operation to be completed */
  961. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  962. if(status == HAL_OK)
  963. {
  964. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  965. }
  966. return status;
  967. }
  968. #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  969. STM32F413xx || STM32F423xx */
  970. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  971. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  972. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  973. /**
  974. * @brief Enable the read/write protection (PCROP) of the desired sectors.
  975. * @note This function can be used only for STM32F401xx devices.
  976. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  977. * This parameter can be one of the following values:
  978. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  979. * @arg OB_PCROP_Sector_All
  980. * @retval HAL Status
  981. */
  982. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
  983. {
  984. HAL_StatusTypeDef status = HAL_OK;
  985. /* Check the parameters */
  986. assert_param(IS_OB_PCROP(Sector));
  987. /* Wait for last operation to be completed */
  988. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  989. if(status == HAL_OK)
  990. {
  991. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  992. }
  993. return status;
  994. }
  995. /**
  996. * @brief Disable the read/write protection (PCROP) of the desired sectors.
  997. * @note This function can be used only for STM32F401xx devices.
  998. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  999. * This parameter can be one of the following values:
  1000. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  1001. * @arg OB_PCROP_Sector_All
  1002. * @retval HAL Status
  1003. */
  1004. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
  1005. {
  1006. HAL_StatusTypeDef status = HAL_OK;
  1007. /* Check the parameters */
  1008. assert_param(IS_OB_PCROP(Sector));
  1009. /* Wait for last operation to be completed */
  1010. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1011. if(status == HAL_OK)
  1012. {
  1013. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
  1014. }
  1015. return status;
  1016. }
  1017. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  1018. STM32F413xx || STM32F423xx */
  1019. /**
  1020. * @brief Set the read protection level.
  1021. * @param Level: specifies the read protection level.
  1022. * This parameter can be one of the following values:
  1023. * @arg OB_RDP_LEVEL_0: No protection
  1024. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1025. * @arg OB_RDP_LEVEL_2: Full chip protection
  1026. *
  1027. * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
  1028. *
  1029. * @retval HAL Status
  1030. */
  1031. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
  1032. {
  1033. HAL_StatusTypeDef status = HAL_OK;
  1034. /* Check the parameters */
  1035. assert_param(IS_OB_RDP_LEVEL(Level));
  1036. /* Wait for last operation to be completed */
  1037. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1038. if(status == HAL_OK)
  1039. {
  1040. *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
  1041. }
  1042. return status;
  1043. }
  1044. /**
  1045. * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  1046. * @param Iwdg: Selects the IWDG mode
  1047. * This parameter can be one of the following values:
  1048. * @arg OB_IWDG_SW: Software IWDG selected
  1049. * @arg OB_IWDG_HW: Hardware IWDG selected
  1050. * @param Stop: Reset event when entering STOP mode.
  1051. * This parameter can be one of the following values:
  1052. * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
  1053. * @arg OB_STOP_RST: Reset generated when entering in STOP
  1054. * @param Stdby: Reset event when entering Standby mode.
  1055. * This parameter can be one of the following values:
  1056. * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
  1057. * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
  1058. * @retval HAL Status
  1059. */
  1060. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
  1061. {
  1062. uint8_t optiontmp = 0xFF;
  1063. HAL_StatusTypeDef status = HAL_OK;
  1064. /* Check the parameters */
  1065. assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  1066. assert_param(IS_OB_STOP_SOURCE(Stop));
  1067. assert_param(IS_OB_STDBY_SOURCE(Stdby));
  1068. /* Wait for last operation to be completed */
  1069. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1070. if(status == HAL_OK)
  1071. {
  1072. /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
  1073. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
  1074. /* Update User Option Byte */
  1075. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
  1076. }
  1077. return status;
  1078. }
  1079. /**
  1080. * @brief Set the BOR Level.
  1081. * @param Level: specifies the Option Bytes BOR Reset Level.
  1082. * This parameter can be one of the following values:
  1083. * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1084. * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1085. * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1086. * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
  1087. * @retval HAL Status
  1088. */
  1089. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
  1090. {
  1091. /* Check the parameters */
  1092. assert_param(IS_OB_BOR_LEVEL(Level));
  1093. /* Set the BOR Level */
  1094. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  1095. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  1096. return HAL_OK;
  1097. }
  1098. /**
  1099. * @brief Return the FLASH User Option Byte value.
  1100. * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
  1101. * and RST_STDBY(Bit2).
  1102. */
  1103. static uint8_t FLASH_OB_GetUser(void)
  1104. {
  1105. /* Return the User Option Byte */
  1106. return ((uint8_t)(FLASH->OPTCR & 0xE0));
  1107. }
  1108. /**
  1109. * @brief Return the FLASH Write Protection Option Bytes value.
  1110. * @retval uint16_t FLASH Write Protection Option Bytes value
  1111. */
  1112. static uint16_t FLASH_OB_GetWRP(void)
  1113. {
  1114. /* Return the FLASH write protection Register value */
  1115. return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  1116. }
  1117. /**
  1118. * @brief Returns the FLASH Read Protection level.
  1119. * @retval FLASH ReadOut Protection Status:
  1120. * This parameter can be one of the following values:
  1121. * @arg OB_RDP_LEVEL_0: No protection
  1122. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1123. * @arg OB_RDP_LEVEL_2: Full chip protection
  1124. */
  1125. static uint8_t FLASH_OB_GetRDP(void)
  1126. {
  1127. uint8_t readstatus = OB_RDP_LEVEL_0;
  1128. if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
  1129. {
  1130. readstatus = OB_RDP_LEVEL_2;
  1131. }
  1132. else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
  1133. {
  1134. readstatus = OB_RDP_LEVEL_1;
  1135. }
  1136. else
  1137. {
  1138. readstatus = OB_RDP_LEVEL_0;
  1139. }
  1140. return readstatus;
  1141. }
  1142. /**
  1143. * @brief Returns the FLASH BOR level.
  1144. * @retval uint8_t The FLASH BOR level:
  1145. * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1146. * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1147. * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1148. * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
  1149. */
  1150. static uint8_t FLASH_OB_GetBOR(void)
  1151. {
  1152. /* Return the FLASH BOR level */
  1153. return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
  1154. }
  1155. /**
  1156. * @brief Flush the instruction and data caches
  1157. * @retval None
  1158. */
  1159. void FLASH_FlushCaches(void)
  1160. {
  1161. /* Flush instruction cache */
  1162. if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET)
  1163. {
  1164. /* Disable instruction cache */
  1165. __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
  1166. /* Reset instruction cache */
  1167. __HAL_FLASH_INSTRUCTION_CACHE_RESET();
  1168. /* Enable instruction cache */
  1169. __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
  1170. }
  1171. /* Flush data cache */
  1172. if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
  1173. {
  1174. /* Disable data cache */
  1175. __HAL_FLASH_DATA_CACHE_DISABLE();
  1176. /* Reset data cache */
  1177. __HAL_FLASH_DATA_CACHE_RESET();
  1178. /* Enable data cache */
  1179. __HAL_FLASH_DATA_CACHE_ENABLE();
  1180. }
  1181. }
  1182. /**
  1183. * @}
  1184. */
  1185. #endif /* HAL_FLASH_MODULE_ENABLED */
  1186. /**
  1187. * @}
  1188. */
  1189. /**
  1190. * @}
  1191. */
  1192. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/