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  1. /**
  2. ******************************************************************************
  3. * @file stm32wbxx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32WBxx_HAL_PCD_H
  21. #define STM32WBxx_HAL_PCD_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32wbxx_ll_usb.h"
  27. #if defined (USB)
  28. /** @addtogroup STM32WBxx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PCD
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup PCD_Exported_Types PCD Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief PCD State structure definition
  40. */
  41. typedef enum
  42. {
  43. HAL_PCD_STATE_RESET = 0x00,
  44. HAL_PCD_STATE_READY = 0x01,
  45. HAL_PCD_STATE_ERROR = 0x02,
  46. HAL_PCD_STATE_BUSY = 0x03,
  47. HAL_PCD_STATE_TIMEOUT = 0x04
  48. } PCD_StateTypeDef;
  49. /* Device LPM suspend state */
  50. typedef enum
  51. {
  52. LPM_L0 = 0x00, /* on */
  53. LPM_L1 = 0x01, /* LPM L1 sleep */
  54. LPM_L2 = 0x02, /* suspend */
  55. LPM_L3 = 0x03, /* off */
  56. } PCD_LPM_StateTypeDef;
  57. typedef enum
  58. {
  59. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  60. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  61. } PCD_LPM_MsgTypeDef;
  62. typedef enum
  63. {
  64. PCD_BCD_ERROR = 0xFF,
  65. PCD_BCD_CONTACT_DETECTION = 0xFE,
  66. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  67. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  68. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  69. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  70. } PCD_BCD_MsgTypeDef;
  71. typedef USB_TypeDef PCD_TypeDef;
  72. typedef USB_CfgTypeDef PCD_InitTypeDef;
  73. typedef USB_EPTypeDef PCD_EPTypeDef;
  74. /**
  75. * @brief PCD Handle Structure definition
  76. */
  77. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  78. typedef struct __PCD_HandleTypeDef
  79. #else
  80. typedef struct
  81. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  82. {
  83. PCD_TypeDef *Instance; /*!< Register base address */
  84. PCD_InitTypeDef Init; /*!< PCD required parameters */
  85. __IO uint8_t USB_Address; /*!< USB Address */
  86. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  87. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  88. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  89. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  90. __IO uint32_t ErrorCode; /*!< PCD Error code */
  91. uint32_t Setup[12]; /*!< Setup packet buffer */
  92. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  93. uint32_t BESL;
  94. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  95. This parameter can be set to ENABLE or DISABLE */
  96. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  97. This parameter can be set to ENABLE or DISABLE */
  98. void *pData; /*!< Pointer to upper stack Handler */
  99. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  100. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  101. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  102. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  103. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  104. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  105. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  106. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  107. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  108. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  109. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  110. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  111. void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
  112. void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
  113. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  114. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  115. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  116. } PCD_HandleTypeDef;
  117. /**
  118. * @}
  119. */
  120. /* Include PCD HAL Extended module */
  121. #include "stm32wbxx_hal_pcd_ex.h"
  122. /* Exported constants --------------------------------------------------------*/
  123. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  124. * @{
  125. */
  126. /** @defgroup PCD_Speed PCD Speed
  127. * @{
  128. */
  129. #define PCD_SPEED_FULL USBD_FS_SPEED
  130. /**
  131. * @}
  132. */
  133. /** @defgroup PCD_PHY_Module PCD PHY Module
  134. * @{
  135. */
  136. #define PCD_PHY_ULPI 1U
  137. #define PCD_PHY_EMBEDDED 2U
  138. #define PCD_PHY_UTMI 3U
  139. /**
  140. * @}
  141. */
  142. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  143. * @brief PCD Error Code definition
  144. * @{
  145. */
  146. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  147. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  148. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  149. /**
  150. * @}
  151. */
  152. /**
  153. * @}
  154. */
  155. /* Exported macros -----------------------------------------------------------*/
  156. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  157. * @brief macros to handle interrupts and specific clock configurations
  158. * @{
  159. */
  160. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  161. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  162. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  163. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
  164. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE
  165. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)
  166. /**
  167. * @}
  168. */
  169. /* Exported functions --------------------------------------------------------*/
  170. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  171. * @{
  172. */
  173. /* Initialization/de-initialization functions ********************************/
  174. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  175. * @{
  176. */
  177. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  178. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  179. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  180. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  181. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  182. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  183. * @brief HAL USB OTG PCD Callback ID enumeration definition
  184. * @{
  185. */
  186. typedef enum
  187. {
  188. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  189. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  190. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  191. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  192. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  193. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  194. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  195. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  196. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  197. } HAL_PCD_CallbackIDTypeDef;
  198. /**
  199. * @}
  200. */
  201. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  202. * @brief HAL USB OTG PCD Callback pointer definition
  203. * @{
  204. */
  205. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  206. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  207. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  208. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  209. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  210. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
  211. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
  212. /**
  213. * @}
  214. */
  215. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  216. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  217. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  218. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  219. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  220. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  221. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  222. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  223. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  224. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  225. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
  226. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  227. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
  228. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  229. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  230. /**
  231. * @}
  232. */
  233. /* I/O operation functions ***************************************************/
  234. /* Non-Blocking mode: Interrupt */
  235. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  236. * @{
  237. */
  238. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  239. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  240. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  241. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  242. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  243. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  244. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  245. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  249. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  250. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  251. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  252. /**
  253. * @}
  254. */
  255. /* Peripheral Control functions **********************************************/
  256. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  257. * @{
  258. */
  259. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  260. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  261. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  262. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  263. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  264. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  265. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  266. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  267. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  268. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  269. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  271. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  272. /**
  273. * @}
  274. */
  275. /* Peripheral State functions ************************************************/
  276. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  277. * @{
  278. */
  279. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  280. /**
  281. * @}
  282. */
  283. /**
  284. * @}
  285. */
  286. /* Private constants ---------------------------------------------------------*/
  287. /** @defgroup PCD_Private_Constants PCD Private Constants
  288. * @{
  289. */
  290. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  291. * @{
  292. */
  293. #define USB_WAKEUP_EXTI_LINE (0x1U << 28) /*!< USB FS EXTI Line WakeUp Interrupt */
  294. /**
  295. * @}
  296. */
  297. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  298. * @{
  299. */
  300. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  301. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  302. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  303. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  304. /**
  305. * @}
  306. */
  307. /** @defgroup PCD_ENDP PCD ENDP
  308. * @{
  309. */
  310. #define PCD_ENDP0 0U
  311. #define PCD_ENDP1 1U
  312. #define PCD_ENDP2 2U
  313. #define PCD_ENDP3 3U
  314. #define PCD_ENDP4 4U
  315. #define PCD_ENDP5 5U
  316. #define PCD_ENDP6 6U
  317. #define PCD_ENDP7 7U
  318. /**
  319. * @}
  320. */
  321. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  322. * @{
  323. */
  324. #define PCD_SNG_BUF 0U
  325. #define PCD_DBL_BUF 1U
  326. /**
  327. * @}
  328. */
  329. /**
  330. * @}
  331. */
  332. /* Private macros ------------------------------------------------------------*/
  333. /** @defgroup PCD_Private_Macros PCD Private Macros
  334. * @{
  335. */
  336. /******************** Bit definition for USB_COUNTn_RX register *************/
  337. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  338. #define USB_CNTRX_BLSIZE (0x1U << 15)
  339. /* SetENDPOINT */
  340. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  341. /* GetENDPOINT */
  342. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  343. /* ENDPOINT transfer */
  344. #define USB_EP0StartXfer USB_EPStartXfer
  345. /**
  346. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  347. * @param USBx USB peripheral instance register address.
  348. * @param bEpNum Endpoint Number.
  349. * @param wType Endpoint Type.
  350. * @retval None
  351. */
  352. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  353. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  354. /**
  355. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  356. * @param USBx USB peripheral instance register address.
  357. * @param bEpNum Endpoint Number.
  358. * @retval Endpoint Type
  359. */
  360. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  361. /**
  362. * @brief free buffer used from the application realizing it to the line
  363. * toggles bit SW_BUF in the double buffered endpoint register
  364. * @param USBx USB device.
  365. * @param bEpNum, bDir
  366. * @retval None
  367. */
  368. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  369. if ((bDir) == 0U) \
  370. { \
  371. /* OUT double buffered endpoint */ \
  372. PCD_TX_DTOG((USBx), (bEpNum)); \
  373. } \
  374. else if ((bDir) == 1U) \
  375. { \
  376. /* IN double buffered endpoint */ \
  377. PCD_RX_DTOG((USBx), (bEpNum)); \
  378. } \
  379. } while(0)
  380. /**
  381. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  382. * @param USBx USB peripheral instance register address.
  383. * @param bEpNum Endpoint Number.
  384. * @param wState new state
  385. * @retval None
  386. */
  387. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  388. uint16_t _wRegVal; \
  389. \
  390. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  391. /* toggle first bit ? */ \
  392. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  393. { \
  394. _wRegVal ^= USB_EPTX_DTOG1; \
  395. } \
  396. /* toggle second bit ? */ \
  397. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  398. { \
  399. _wRegVal ^= USB_EPTX_DTOG2; \
  400. } \
  401. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  402. } while(0) /* PCD_SET_EP_TX_STATUS */
  403. /**
  404. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  405. * @param USBx USB peripheral instance register address.
  406. * @param bEpNum Endpoint Number.
  407. * @param wState new state
  408. * @retval None
  409. */
  410. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  411. uint16_t _wRegVal; \
  412. \
  413. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  414. /* toggle first bit ? */ \
  415. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  416. { \
  417. _wRegVal ^= USB_EPRX_DTOG1; \
  418. } \
  419. /* toggle second bit ? */ \
  420. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  421. { \
  422. _wRegVal ^= USB_EPRX_DTOG2; \
  423. } \
  424. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  425. } while(0) /* PCD_SET_EP_RX_STATUS */
  426. /**
  427. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  428. * @param USBx USB peripheral instance register address.
  429. * @param bEpNum Endpoint Number.
  430. * @param wStaterx new state.
  431. * @param wStatetx new state.
  432. * @retval None
  433. */
  434. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  435. uint16_t _wRegVal; \
  436. \
  437. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  438. /* toggle first bit ? */ \
  439. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  440. { \
  441. _wRegVal ^= USB_EPRX_DTOG1; \
  442. } \
  443. /* toggle second bit ? */ \
  444. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  445. { \
  446. _wRegVal ^= USB_EPRX_DTOG2; \
  447. } \
  448. /* toggle first bit ? */ \
  449. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  450. { \
  451. _wRegVal ^= USB_EPTX_DTOG1; \
  452. } \
  453. /* toggle second bit ? */ \
  454. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  455. { \
  456. _wRegVal ^= USB_EPTX_DTOG2; \
  457. } \
  458. \
  459. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  460. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  461. /**
  462. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  463. * /STAT_RX[1:0])
  464. * @param USBx USB peripheral instance register address.
  465. * @param bEpNum Endpoint Number.
  466. * @retval status
  467. */
  468. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  469. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  470. /**
  471. * @brief sets directly the VALID tx/rx-status into the endpoint register
  472. * @param USBx USB peripheral instance register address.
  473. * @param bEpNum Endpoint Number.
  474. * @retval None
  475. */
  476. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  477. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  478. /**
  479. * @brief checks stall condition in an endpoint.
  480. * @param USBx USB peripheral instance register address.
  481. * @param bEpNum Endpoint Number.
  482. * @retval TRUE = endpoint in stall condition.
  483. */
  484. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  485. == USB_EP_TX_STALL)
  486. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  487. == USB_EP_RX_STALL)
  488. /**
  489. * @brief set & clear EP_KIND bit.
  490. * @param USBx USB peripheral instance register address.
  491. * @param bEpNum Endpoint Number.
  492. * @retval None
  493. */
  494. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  495. uint16_t _wRegVal; \
  496. \
  497. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  498. \
  499. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  500. } while(0) /* PCD_SET_EP_KIND */
  501. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  502. uint16_t _wRegVal; \
  503. \
  504. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  505. \
  506. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  507. } while(0) /* PCD_CLEAR_EP_KIND */
  508. /**
  509. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  510. * @param USBx USB peripheral instance register address.
  511. * @param bEpNum Endpoint Number.
  512. * @retval None
  513. */
  514. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  515. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  516. /**
  517. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  518. * @param USBx USB peripheral instance register address.
  519. * @param bEpNum Endpoint Number.
  520. * @retval None
  521. */
  522. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  523. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  524. /**
  525. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  526. * @param USBx USB peripheral instance register address.
  527. * @param bEpNum Endpoint Number.
  528. * @retval None
  529. */
  530. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  531. uint16_t _wRegVal; \
  532. \
  533. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  534. \
  535. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  536. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  537. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  538. uint16_t _wRegVal; \
  539. \
  540. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  541. \
  542. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  543. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  544. /**
  545. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  546. * @param USBx USB peripheral instance register address.
  547. * @param bEpNum Endpoint Number.
  548. * @retval None
  549. */
  550. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  551. uint16_t _wEPVal; \
  552. \
  553. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  554. \
  555. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  556. } while(0) /* PCD_RX_DTOG */
  557. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  558. uint16_t _wEPVal; \
  559. \
  560. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  561. \
  562. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  563. } while(0) /* PCD_TX_DTOG */
  564. /**
  565. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  566. * @param USBx USB peripheral instance register address.
  567. * @param bEpNum Endpoint Number.
  568. * @retval None
  569. */
  570. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  571. uint16_t _wRegVal; \
  572. \
  573. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  574. \
  575. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  576. { \
  577. PCD_RX_DTOG((USBx), (bEpNum)); \
  578. } \
  579. } while(0) /* PCD_CLEAR_RX_DTOG */
  580. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  581. uint16_t _wRegVal; \
  582. \
  583. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  584. \
  585. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  586. { \
  587. PCD_TX_DTOG((USBx), (bEpNum)); \
  588. } \
  589. } while(0) /* PCD_CLEAR_TX_DTOG */
  590. /**
  591. * @brief Sets address in an endpoint register.
  592. * @param USBx USB peripheral instance register address.
  593. * @param bEpNum Endpoint Number.
  594. * @param bAddr Address.
  595. * @retval None
  596. */
  597. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  598. uint16_t _wRegVal; \
  599. \
  600. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  601. \
  602. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  603. } while(0) /* PCD_SET_EP_ADDRESS */
  604. /**
  605. * @brief Gets address in an endpoint register.
  606. * @param USBx USB peripheral instance register address.
  607. * @param bEpNum Endpoint Number.
  608. * @retval None
  609. */
  610. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  611. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  612. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  613. /**
  614. * @brief sets address of the tx/rx buffer.
  615. * @param USBx USB peripheral instance register address.
  616. * @param bEpNum Endpoint Number.
  617. * @param wAddr address to be set (must be word aligned).
  618. * @retval None
  619. */
  620. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  621. __IO uint16_t *_wRegVal; \
  622. uint32_t _wRegBase = (uint32_t)USBx; \
  623. \
  624. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  625. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  626. *_wRegVal = ((wAddr) >> 1) << 1; \
  627. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  628. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  629. __IO uint16_t *_wRegVal; \
  630. uint32_t _wRegBase = (uint32_t)USBx; \
  631. \
  632. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  633. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  634. *_wRegVal = ((wAddr) >> 1) << 1; \
  635. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  636. /**
  637. * @brief Gets address of the tx/rx buffer.
  638. * @param USBx USB peripheral instance register address.
  639. * @param bEpNum Endpoint Number.
  640. * @retval address of the buffer.
  641. */
  642. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  643. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  644. /**
  645. * @brief Sets counter of rx buffer with no. of blocks.
  646. * @param pdwReg Register pointer
  647. * @param wCount Counter.
  648. * @param wNBlocks no. of Blocks.
  649. * @retval None
  650. */
  651. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  652. (wNBlocks) = (wCount) >> 5; \
  653. if (((wCount) & 0x1fU) == 0U) \
  654. { \
  655. (wNBlocks)--; \
  656. } \
  657. *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  658. } while(0) /* PCD_CALC_BLK32 */
  659. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  660. (wNBlocks) = (wCount) >> 1; \
  661. if (((wCount) & 0x1U) != 0U) \
  662. { \
  663. (wNBlocks)++; \
  664. } \
  665. *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  666. } while(0) /* PCD_CALC_BLK2 */
  667. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
  668. uint32_t wNBlocks; \
  669. if ((wCount) == 0U) \
  670. { \
  671. *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  672. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  673. } \
  674. else if((wCount) <= 62U) \
  675. { \
  676. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  677. } \
  678. else \
  679. { \
  680. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  681. } \
  682. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  683. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  684. uint32_t _wRegBase = (uint32_t)(USBx); \
  685. __IO uint16_t *pdwReg; \
  686. \
  687. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  688. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  689. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  690. } while(0)
  691. /**
  692. * @brief sets counter for the tx/rx buffer.
  693. * @param USBx USB peripheral instance register address.
  694. * @param bEpNum Endpoint Number.
  695. * @param wCount Counter value.
  696. * @retval None
  697. */
  698. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  699. uint32_t _wRegBase = (uint32_t)(USBx); \
  700. __IO uint16_t *_wRegVal; \
  701. \
  702. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  703. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  704. *_wRegVal = (uint16_t)(wCount); \
  705. } while(0)
  706. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  707. uint32_t _wRegBase = (uint32_t)(USBx); \
  708. __IO uint16_t *_wRegVal; \
  709. \
  710. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  711. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  712. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  713. } while(0)
  714. /**
  715. * @brief gets counter of the tx buffer.
  716. * @param USBx USB peripheral instance register address.
  717. * @param bEpNum Endpoint Number.
  718. * @retval Counter value
  719. */
  720. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  721. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  722. /**
  723. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  724. * @param USBx USB peripheral instance register address.
  725. * @param bEpNum Endpoint Number.
  726. * @param wBuf0Addr buffer 0 address.
  727. * @retval Counter value
  728. */
  729. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  730. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  731. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  732. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  733. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  734. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  735. /**
  736. * @brief Sets addresses in a double buffer endpoint.
  737. * @param USBx USB peripheral instance register address.
  738. * @param bEpNum Endpoint Number.
  739. * @param wBuf0Addr: buffer 0 address.
  740. * @param wBuf1Addr = buffer 1 address.
  741. * @retval None
  742. */
  743. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  744. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  745. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  746. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  747. /**
  748. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  749. * @param USBx USB peripheral instance register address.
  750. * @param bEpNum Endpoint Number.
  751. * @retval None
  752. */
  753. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  754. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  755. /**
  756. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  757. * @param USBx USB peripheral instance register address.
  758. * @param bEpNum Endpoint Number.
  759. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  760. * EP_DBUF_IN = IN
  761. * @param wCount: Counter value
  762. * @retval None
  763. */
  764. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  765. if ((bDir) == 0U) \
  766. /* OUT endpoint */ \
  767. { \
  768. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  769. } \
  770. else \
  771. { \
  772. if ((bDir) == 1U) \
  773. { \
  774. /* IN endpoint */ \
  775. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  776. } \
  777. } \
  778. } while(0) /* SetEPDblBuf0Count*/
  779. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  780. uint32_t _wBase = (uint32_t)(USBx); \
  781. __IO uint16_t *_wEPRegVal; \
  782. \
  783. if ((bDir) == 0U) \
  784. { \
  785. /* OUT endpoint */ \
  786. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  787. } \
  788. else \
  789. { \
  790. if ((bDir) == 1U) \
  791. { \
  792. /* IN endpoint */ \
  793. _wBase += (uint32_t)(USBx)->BTABLE; \
  794. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  795. *_wEPRegVal = (uint16_t)(wCount); \
  796. } \
  797. } \
  798. } while(0) /* SetEPDblBuf1Count */
  799. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  800. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  801. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  802. } while(0) /* PCD_SET_EP_DBUF_CNT */
  803. /**
  804. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  805. * @param USBx USB peripheral instance register address.
  806. * @param bEpNum Endpoint Number.
  807. * @retval None
  808. */
  809. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  810. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  811. /**
  812. * @}
  813. */
  814. /**
  815. * @}
  816. */
  817. /**
  818. * @}
  819. */
  820. #endif /* defined (USB) */
  821. #ifdef __cplusplus
  822. }
  823. #endif
  824. #endif /* STM32WBxx_HAL_PCD_H */
  825. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/