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  1. /**
  2. ******************************************************************************
  3. * @file stm32wbxx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32WBxx_HAL_PWR_H
  21. #define STM32WBxx_HAL_PWR_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32wbxx_hal_def.h"
  27. /* Include low level driver */
  28. #include "stm32wbxx_ll_pwr.h"
  29. #include "stm32wbxx_ll_exti.h"
  30. /** @addtogroup STM32WBxx_HAL_Driver
  31. * @{
  32. */
  33. /** @defgroup PWR PWR
  34. * @brief PWR HAL module driver
  35. * @{
  36. */
  37. /* Exported types ------------------------------------------------------------*/
  38. /** @defgroup PWR_Exported_Types PWR Exported Types
  39. * @{
  40. */
  41. /**
  42. * @brief PWR PVD configuration structure definition
  43. */
  44. typedef struct
  45. {
  46. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  47. This parameter can be a value of @ref PWR_PVD_detection_level. */
  48. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  49. This parameter can be a value of @ref PWR_PVD_Mode. */
  50. }PWR_PVDTypeDef;
  51. /**
  52. * @}
  53. */
  54. /* Exported constants --------------------------------------------------------*/
  55. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  56. * @{
  57. */
  58. /** @defgroup PWR_PVD_detection_level Power Voltage Detector Level selection
  59. * @note Refer datasheet for selection voltage value
  60. * @{
  61. */
  62. #define PWR_PVDLEVEL_0 (0x00000000U) /*!< PVD threshold around 2.0 V */
  63. #define PWR_PVDLEVEL_1 ( PWR_CR2_PLS_0) /*!< PVD threshold around 2.2 V */
  64. #define PWR_PVDLEVEL_2 ( PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.4 V */
  65. #define PWR_PVDLEVEL_3 ( PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.5 V */
  66. #define PWR_PVDLEVEL_4 (PWR_CR2_PLS_2 ) /*!< PVD threshold around 2.6 V */
  67. #define PWR_PVDLEVEL_5 (PWR_CR2_PLS_2 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.8 V */
  68. #define PWR_PVDLEVEL_6 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.9 V */
  69. #define PWR_PVDLEVEL_7 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< External input analog voltage (compared internally to VREFINT) */
  70. /**
  71. * @}
  72. */
  73. /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
  74. * @{
  75. */
  76. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  77. /* (only interruption is available through AIEC line 16). */
  78. #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */
  79. #define PWR_PVD_MODE_IT_RISING (PVD_MODE_IT | PVD_RISING_EDGE) /*!< External Interrupt Mode with Rising edge trigger detection */
  80. #define PWR_PVD_MODE_IT_FALLING (PVD_MODE_IT | PVD_FALLING_EDGE) /*!< External Interrupt Mode with Falling edge trigger detection */
  81. #define PWR_PVD_MODE_IT_RISING_FALLING (PVD_MODE_IT | PVD_RISING_FALLING_EDGE) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  82. /**
  83. * @}
  84. */
  85. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  86. /* (only interruption is available through AIEC line 16). */
  87. /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection
  88. * @{
  89. */
  90. #define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */
  91. #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */
  92. #if defined(PWR_SUPPORT_STOP2)
  93. #define PWR_LOWPOWERMODE_STOP2 (PWR_CR1_LPMS_1) /*!< Stop 2: stop mode with low power regulator and VDD12I interruptible digital core domain supply OFF (less peripherals activated than low power mode stop 1 to reduce power consumption)*/
  94. #endif
  95. #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1) /*!< Standby mode */
  96. #define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS_2) /*!< Shutdown mode */
  97. /**
  98. * @}
  99. */
  100. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
  101. * @{
  102. */
  103. #define PWR_MAINREGULATOR_ON (0x00000000U) /*!< Regulator in main mode */
  104. #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPR) /*!< Regulator in low-power mode */
  105. /**
  106. * @}
  107. */
  108. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  109. * @{
  110. */
  111. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */
  112. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */
  113. /**
  114. * @}
  115. */
  116. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  117. * @{
  118. */
  119. #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */
  120. #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */
  121. /**
  122. * @}
  123. */
  124. /**
  125. * @}
  126. */
  127. /* Private define ------------------------------------------------------------*/
  128. /** @defgroup PWR_Private_Defines PWR Private Defines
  129. * @{
  130. */
  131. /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
  132. * @{
  133. */
  134. #define PWR_EXTI_LINE_PVD (LL_EXTI_LINE_16) /*!< External interrupt line 16 Connected to the PWR PVD */
  135. /**
  136. * @}
  137. */
  138. /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
  139. * @{
  140. */
  141. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  142. /* (only interruption is available through AIEC line 16). */
  143. #define PVD_MODE_IT (0x00010000U) /*!< Mask for interruption yielded by PVD threshold crossing */
  144. #define PVD_RISING_EDGE (0x00000001U) /*!< Mask for rising edge set as PVD trigger */
  145. #define PVD_FALLING_EDGE (0x00000002U) /*!< Mask for falling edge set as PVD trigger */
  146. #define PVD_RISING_FALLING_EDGE (0x00000003U) /*!< Mask for rising and falling edges set as PVD trigger */
  147. /**
  148. * @}
  149. */
  150. /**
  151. * @}
  152. */
  153. /* Exported macros -----------------------------------------------------------*/
  154. /** @defgroup PWR_Exported_Macros PWR Exported Macros
  155. * @{
  156. */
  157. /** @brief Check whether or not a specific PWR flag is set.
  158. * @param __FLAG__ specifies the flag to check.
  159. * This parameter can be one of the following values:
  160. *
  161. * /--------------------------------SR1-------------------------------/
  162. * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
  163. * was received from the WKUP pin 1.
  164. * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
  165. * was received from the WKUP pin 2.
  166. * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
  167. * was received from the WKUP pin 3.
  168. * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
  169. * was received from the WKUP pin 4.
  170. * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
  171. * was received from the WKUP pin 5.
  172. *
  173. * @arg @ref PWR_FLAG_BHWF BLE_Host WakeUp Flag
  174. * @arg @ref PWR_FLAG_FRCBYPI SMPS Forced in Bypass Interrupt Flag
  175. * @arg @ref PWR_FLAG_RFPHASEI Radio Phase Interrupt Flag
  176. * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Flag
  177. * @arg @ref PWR_FLAG_802ACTI 802.15.4 Activity Interrupt Flag
  178. * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Flag
  179. * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on
  180. * the internal wakeup line.
  181. *
  182. * @arg @ref PWR_FLAG_SMPSRDYF SMPS Ready Flag
  183. * @arg @ref PWR_FLAG_SMPSBYPF SMPS Bypass Flag
  184. *
  185. * /--------------------------------SR2-------------------------------/
  186. * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the
  187. * low-power regulator is ready.
  188. * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the
  189. * regulator is ready in main mode or is in low-power mode.
  190. *
  191. * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready
  192. * in the selected voltage range or is still changing to the required voltage level.
  193. * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is
  194. * below or above the selected PVD threshold.
  195. *
  196. * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is
  197. * is below or above PVM1 threshold (applicable when USB feature is supported).
  198. * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is
  199. * is below or above PVM3 threshold.
  200. *
  201. * /----------------------------EXTSCR--------------------------/
  202. * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1.
  203. * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1.
  204. *
  205. * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2.
  206. * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2.
  207. *
  208. * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE Critical radio system phase flag.
  209. *
  210. * @arg @ref PWR_FLAG_C1DEEPSLEEP CPU1 DeepSleep Flag.
  211. * @arg @ref PWR_FLAG_C2DEEPSLEEP CPU2 DeepSleep Flag.
  212. *
  213. * @retval The new state of __FLAG__ (TRUE or FALSE).
  214. */
  215. #define __HAL_PWR_GET_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR1) ? \
  216. ( \
  217. PWR->SR1 & (1UL << ((__FLAG__) & 31UL)) \
  218. ) \
  219. : \
  220. ( \
  221. (((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR2) ? \
  222. ( \
  223. PWR->SR2 & (1UL << ((__FLAG__) & 31UL)) \
  224. ) \
  225. : \
  226. ( \
  227. PWR->EXTSCR & (1UL << ((__FLAG__) & 31UL)) \
  228. ) \
  229. ) \
  230. )
  231. /** @brief Clear a specific PWR flag.
  232. * @note Clearing of flags {PWR_FLAG_STOP, PWR_FLAG_SB}
  233. * and flags {PWR_FLAG_C2STOP, PWR_FLAG_C2SB} are grouped:
  234. * clearing of one flag also clears the other one.
  235. * @param __FLAG__ specifies the flag to clear.
  236. * This parameter can be one of the following values:
  237. *
  238. * /--------------------------------SCR (SRR)------------------------------/
  239. * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
  240. * was received from the WKUP pin 1.
  241. * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
  242. * was received from the WKUP pin 2.
  243. * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
  244. * was received from the WKUP pin 3.
  245. * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
  246. * was received from the WKUP pin 4.
  247. * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
  248. * was received from the WKUP pin 5.
  249. * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags.
  250. *
  251. * @arg @ref PWR_FLAG_BHWF Clear BLE_Host Wakeup Flag.
  252. * @arg @ref PWR_FLAG_FRCBYPI Clear SMPS Forced in Bypass Interrupt Flag.
  253. * @arg @ref PWR_FLAG_RFPHASEI RF Phase Interrupt Clear.
  254. * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Clear.
  255. * @arg @ref PWR_FLAG_802ACTI 802.15.4. Activity Interrupt Clear.
  256. * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Clear.
  257. *
  258. * /----------------------------EXTSCR--------------------------/
  259. * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1.
  260. * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1.
  261. *
  262. * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2.
  263. * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2.
  264. *
  265. * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE RF phase Flag.
  266. *
  267. * @retval None
  268. */
  269. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_EXTSCR) ? \
  270. ( \
  271. PWR->EXTSCR = (1UL << (((__FLAG__) & PWR_FLAG_EXTSCR_CLR_MASK) >> PWR_FLAG_EXTSCR_CLR_POS)) \
  272. ) \
  273. : \
  274. ( \
  275. (((__FLAG__)) == PWR_FLAG_WU) ? \
  276. (PWR->SCR = PWR_SCR_CWUF) : \
  277. (PWR->SCR = (1UL << ((__FLAG__) & 31UL))) \
  278. ) \
  279. )
  280. /**
  281. * @brief Enable the PVD Extended Interrupt C1 Line.
  282. * @retval None
  283. */
  284. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD)
  285. /**
  286. * @brief Enable the PVD Extended Interrupt C2 Line.
  287. * @retval None
  288. */
  289. #define __HAL_PWR_PVD_EXTIC2_ENABLE_IT() LL_C2_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD)
  290. /**
  291. * @brief Disable the PVD Extended Interrupt C1 Line.
  292. * @retval None
  293. */
  294. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD)
  295. /**
  296. * @brief Disable the PVD Extended Interrupt C2 Line.
  297. * @retval None
  298. */
  299. #define __HAL_PWR_PVD_EXTIC2_DISABLE_IT() LL_C2_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD)
  300. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  301. /* (only interruption is available through AIEC line 16). */
  302. /**
  303. * @brief Enable the PVD Extended Interrupt Rising Trigger.
  304. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  305. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  306. * @retval None
  307. */
  308. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() LL_EXTI_EnableRisingTrig_0_31(PWR_EXTI_LINE_PVD)
  309. /**
  310. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  311. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  312. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  313. * @retval None
  314. */
  315. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() LL_EXTI_DisableFallingTrig_0_31(PWR_EXTI_LINE_PVD)
  316. /**
  317. * @brief Enable the PVD Extended Interrupt Falling Trigger.
  318. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  319. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  320. * @retval None
  321. */
  322. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() LL_EXTI_EnableFallingTrig_0_31(PWR_EXTI_LINE_PVD)
  323. /**
  324. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  325. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  326. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  327. * @retval None
  328. */
  329. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() LL_EXTI_DisableRisingTrig_0_31(PWR_EXTI_LINE_PVD)
  330. /**
  331. * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
  332. * @retval None
  333. */
  334. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  335. do { \
  336. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
  337. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
  338. } while(0)
  339. /**
  340. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  341. * @retval None
  342. */
  343. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  344. do { \
  345. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
  346. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
  347. } while(0)
  348. /**
  349. * @brief Generate a Software interrupt on selected EXTI line.
  350. * @retval None
  351. */
  352. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() LL_EXTI_GenerateSWI_0_31(PWR_EXTI_LINE_PVD)
  353. /**
  354. * @brief Check whether or not the PVD EXTI interrupt flag is set.
  355. * @retval EXTI PVD Line Status.
  356. */
  357. #define __HAL_PWR_PVD_EXTI_GET_FLAG() LL_EXTI_ReadFlag_0_31(PWR_EXTI_LINE_PVD)
  358. /**
  359. * @brief Clear the PVD EXTI interrupt flag.
  360. * @retval None
  361. */
  362. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(PWR_EXTI_LINE_PVD)
  363. /**
  364. * @}
  365. */
  366. /* Private macros --------------------------------------------------------*/
  367. /** @defgroup PWR_Private_Macros PWR Private Macros
  368. * @{
  369. */
  370. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  371. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  372. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  373. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  374. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\
  375. ((MODE) == PWR_PVD_MODE_IT_RISING) ||\
  376. ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\
  377. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING))
  378. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  379. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  380. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \
  381. ((ENTRY) == PWR_SLEEPENTRY_WFE))
  382. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \
  383. ((ENTRY) == PWR_STOPENTRY_WFE))
  384. /**
  385. * @}
  386. */
  387. /* Include PWR HAL Extended module */
  388. #include "stm32wbxx_hal_pwr_ex.h"
  389. /* Exported functions --------------------------------------------------------*/
  390. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  391. * @{
  392. */
  393. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  394. * @{
  395. */
  396. /* Initialization and de-initialization functions *******************************/
  397. void HAL_PWR_DeInit(void);
  398. void HAL_PWR_EnableBkUpAccess(void);
  399. void HAL_PWR_DisableBkUpAccess(void);
  400. /**
  401. * @}
  402. */
  403. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  404. * @{
  405. */
  406. /* Peripheral Control functions ************************************************/
  407. HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  408. void HAL_PWR_EnablePVD(void);
  409. void HAL_PWR_DisablePVD(void);
  410. /* WakeUp pins configuration functions ****************************************/
  411. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
  412. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  413. /* Low Power modes configuration functions ************************************/
  414. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  415. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  416. void HAL_PWR_EnterSTANDBYMode(void);
  417. void HAL_PWR_PVDCallback(void);
  418. void HAL_PWR_EnableSleepOnExit(void);
  419. void HAL_PWR_DisableSleepOnExit(void);
  420. void HAL_PWR_EnableSEVOnPend(void);
  421. void HAL_PWR_DisableSEVOnPend(void);
  422. /**
  423. * @}
  424. */
  425. /**
  426. * @}
  427. */
  428. /**
  429. * @}
  430. */
  431. /**
  432. * @}
  433. */
  434. /**
  435. * @}
  436. */
  437. #ifdef __cplusplus
  438. }
  439. #endif
  440. #endif /* STM32WBxx_HAL_PWR_H */
  441. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/