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stm32lib/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_hsem.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32wbxx_ll_hsem.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of HSEM LL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.

  10.   * All rights reserved.</center></h2>

  11.   *

  12.   * This software component is licensed by ST under BSD 3-Clause license,

  13.   * the "License"; You may not use this file except in compliance with the

  14.   * License. You may obtain a copy of the License at:

  15.   *                        opensource.org/licenses/BSD-3-Clause

  16.   *

  17.   ******************************************************************************

  18.   */

  19. 

  20. /* Define to prevent recursive inclusion -------------------------------------*/

  21. #ifndef STM32WBxx_LL_HSEM_H

  22. #define STM32WBxx_LL_HSEM_H

  23. 

  24. #ifdef __cplusplus

  25. extern "C" {

  26. #endif

  27. 

  28. /* Includes ------------------------------------------------------------------*/

  29. #include "stm32wbxx.h"

  30. 

  31. /** @addtogroup STM32WBxx_LL_Driver

  32.   * @{

  33.   */

  34. 

  35. #if defined(HSEM)

  36. 

  37. /** @defgroup HSEM_LL HSEM

  38.   * @{

  39.   */

  40. 

  41. /* Private types -------------------------------------------------------------*/

  42. /* Private variables ---------------------------------------------------------*/

  43. /* Private constants ---------------------------------------------------------*/

  44. /* Private macros ------------------------------------------------------------*/

  45. 

  46. /* Exported types ------------------------------------------------------------*/

  47. /* Exported constants --------------------------------------------------------*/

  48. 

  49. /** @defgroup HSEM_LL_Exported_Constants HSEM Exported Constants

  50.   * @{

  51.   */

  52. 

  53. /** @defgroup HSEM_LL_EC_COREID COREID Defines

  54.   * @{

  55.   */

  56. #define LL_HSEM_COREID_NONE             0U

  57. #define LL_HSEM_COREID_CPU1             HSEM_CR_COREID_CPU1

  58. #define LL_HSEM_COREID_CPU2             HSEM_CR_COREID_CPU2

  59. #define LL_HSEM_COREID                  HSEM_CR_COREID_CURRENT

  60. /**

  61.   * @}

  62.   */

  63. 

  64. /** @defgroup HSEM_LL_EC_GET_FLAG Get Flags Defines

  65.   * @brief    Flags defines which can be used with LL_HSEM_ReadReg function

  66.   * @{

  67.   */

  68. 

  69. #define LL_HSEM_SEMAPHORE_0                HSEM_C1IER_ISE0

  70. #define LL_HSEM_SEMAPHORE_1                HSEM_C1IER_ISE1

  71. #define LL_HSEM_SEMAPHORE_2                HSEM_C1IER_ISE2

  72. #define LL_HSEM_SEMAPHORE_3                HSEM_C1IER_ISE3

  73. #define LL_HSEM_SEMAPHORE_4                HSEM_C1IER_ISE4

  74. #define LL_HSEM_SEMAPHORE_5                HSEM_C1IER_ISE5

  75. #define LL_HSEM_SEMAPHORE_6                HSEM_C1IER_ISE6

  76. #define LL_HSEM_SEMAPHORE_7                HSEM_C1IER_ISE7

  77. #define LL_HSEM_SEMAPHORE_8                HSEM_C1IER_ISE8

  78. #define LL_HSEM_SEMAPHORE_9                HSEM_C1IER_ISE9

  79. #define LL_HSEM_SEMAPHORE_10               HSEM_C1IER_ISE10

  80. #define LL_HSEM_SEMAPHORE_11               HSEM_C1IER_ISE11

  81. #define LL_HSEM_SEMAPHORE_12               HSEM_C1IER_ISE12

  82. #define LL_HSEM_SEMAPHORE_13               HSEM_C1IER_ISE13

  83. #define LL_HSEM_SEMAPHORE_14               HSEM_C1IER_ISE14

  84. #define LL_HSEM_SEMAPHORE_15               HSEM_C1IER_ISE15

  85. #define LL_HSEM_SEMAPHORE_16               HSEM_C1IER_ISE16

  86. #define LL_HSEM_SEMAPHORE_17               HSEM_C1IER_ISE17

  87. #define LL_HSEM_SEMAPHORE_18               HSEM_C1IER_ISE18

  88. #define LL_HSEM_SEMAPHORE_19               HSEM_C1IER_ISE19

  89. #define LL_HSEM_SEMAPHORE_20               HSEM_C1IER_ISE20

  90. #define LL_HSEM_SEMAPHORE_21               HSEM_C1IER_ISE21

  91. #define LL_HSEM_SEMAPHORE_22               HSEM_C1IER_ISE22

  92. #define LL_HSEM_SEMAPHORE_23               HSEM_C1IER_ISE23

  93. #define LL_HSEM_SEMAPHORE_24               HSEM_C1IER_ISE24

  94. #define LL_HSEM_SEMAPHORE_25               HSEM_C1IER_ISE25

  95. #define LL_HSEM_SEMAPHORE_26               HSEM_C1IER_ISE26

  96. #define LL_HSEM_SEMAPHORE_27               HSEM_C1IER_ISE27

  97. #define LL_HSEM_SEMAPHORE_28               HSEM_C1IER_ISE28

  98. #define LL_HSEM_SEMAPHORE_29               HSEM_C1IER_ISE29

  99. #define LL_HSEM_SEMAPHORE_30               HSEM_C1IER_ISE30

  100. #define LL_HSEM_SEMAPHORE_31               HSEM_C1IER_ISE31

  101. #define LL_HSEM_SEMAPHORE_ALL              0xFFFFFFFFU

  102. /**

  103.   * @}

  104.   */

  105. 

  106. /**

  107.   * @}

  108.   */

  109. 

  110. /* Exported macro ------------------------------------------------------------*/

  111. /** @defgroup HSEM_LL_Exported_Macros HSEM Exported Macros

  112.   * @{

  113.   */

  114. 

  115. /** @defgroup HSEM_LL_EM_WRITE_READ Common Write and read registers Macros

  116.   * @{

  117.   */

  118. 

  119. /**

  120.   * @brief  Write a value in HSEM register

  121.   * @param  __INSTANCE__ HSEM Instance

  122.   * @param  __REG__ Register to be written

  123.   * @param  __VALUE__ Value to be written in the register

  124.   * @retval None

  125.   */

  126. #define LL_HSEM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))

  127. 

  128. /**

  129.   * @brief  Read a value in HSEM register

  130.   * @param  __INSTANCE__ HSEM Instance

  131.   * @param  __REG__ Register to be read

  132.   * @retval Register value

  133.   */

  134. #define LL_HSEM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)

  135. /**

  136.   * @}

  137.   */

  138. 

  139. /**

  140.   * @}

  141.   */

  142. 

  143. /* Exported functions --------------------------------------------------------*/

  144. /** @defgroup HSEM_LL_Exported_Functions HSEM Exported Functions

  145.   * @{

  146.   */

  147. 

  148. /** @defgroup HSEM_LL_EF_Data_Management Data_Management

  149.   * @{

  150.   */

  151. 

  152. 

  153. /**

  154.   * @brief  Return 1 if the semaphore is locked, else return 0.

  155.   * @rmtoll R            LOCK          LL_HSEM_IsSemaphoreLocked

  156.   * @param  HSEMx HSEM Instance.

  157.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  158.   * @retval State of bit (1 or 0).

  159.   */

  160. __STATIC_INLINE uint32_t LL_HSEM_IsSemaphoreLocked(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  161. {

  162.   return ((READ_BIT(HSEMx->R[Semaphore], HSEM_R_LOCK) == (HSEM_R_LOCK_Msk)) ? 1UL : 0UL);

  163. }

  164. 

  165. /**

  166.   * @brief  Get core id.

  167.   * @rmtoll R            COREID        LL_HSEM_GetCoreId

  168.   * @param  HSEMx HSEM Instance.

  169.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  170.   * @retval Returned value can be one of the following values:

  171.   *         @arg @ref LL_HSEM_COREID_NONE

  172.   *         @arg @ref LL_HSEM_COREID_CPU1

  173.   *         @arg @ref LL_HSEM_COREID_CPU2

  174.   */

  175. __STATIC_INLINE uint32_t LL_HSEM_GetCoreId(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  176. {

  177.   return (uint32_t)(READ_BIT(HSEMx->R[Semaphore], HSEM_R_COREID_Msk));

  178. }

  179. 

  180. /**

  181.   * @brief  Get process id.

  182.   * @rmtoll R            PROCID        LL_HSEM_GetProcessId

  183.   * @param  HSEMx HSEM Instance.

  184.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  185.   * @retval Process number. Value between Min_Data=0 and Max_Data=255

  186.   */

  187. __STATIC_INLINE uint32_t LL_HSEM_GetProcessId(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  188. {

  189.   return (uint32_t)(READ_BIT(HSEMx->R[Semaphore], HSEM_R_PROCID_Msk));

  190. }

  191. 

  192. /**

  193.   * @brief  Get the lock by writing in R register.

  194.   * @note The R register has to be read to determined if the lock is taken.

  195.   * @rmtoll R            LOCK          LL_HSEM_SetLock

  196.   * @rmtoll R            COREID        LL_HSEM_SetLock

  197.   * @rmtoll R            PROCID        LL_HSEM_SetLock

  198.   * @param  HSEMx HSEM Instance.

  199.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  200.   * @param  process Process id. Value between Min_Data=0 and Max_Data=255

  201.   * @retval None

  202.   */

  203. __STATIC_INLINE void LL_HSEM_SetLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  204. {

  205.   WRITE_REG(HSEMx->R[Semaphore], (HSEM_R_LOCK | LL_HSEM_COREID | process));

  206. }

  207. 

  208. /**

  209.   * @brief  Get the lock with 2-step lock.

  210.   * @rmtoll R            LOCK          LL_HSEM_2StepLock

  211.   * @rmtoll R            COREID        LL_HSEM_2StepLock

  212.   * @rmtoll R            PROCID        LL_HSEM_2StepLock

  213.   * @param  HSEMx HSEM Instance.

  214.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  215.   * @param  process Process id. Value between Min_Data=0 and Max_Data=255

  216.   * @retval 1 lock fail, 0 lock successful or already locked by same process and core

  217.   */

  218. __STATIC_INLINE uint32_t LL_HSEM_2StepLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  219. {

  220.   WRITE_REG(HSEMx->R[Semaphore], (HSEM_R_LOCK | LL_HSEM_COREID | process));

  221.   return ((HSEMx->R[Semaphore] != (HSEM_R_LOCK | LL_HSEM_COREID | process)) ? 1UL : 0UL);

  222. }

  223. 

  224. /**

  225.   * @brief  Get the lock with 1-step lock.

  226.   * @rmtoll RLR          LOCK          LL_HSEM_1StepLock

  227.   * @rmtoll RLR          COREID        LL_HSEM_1StepLock

  228.   * @rmtoll RLR          PROCID        LL_HSEM_1StepLock

  229.   * @param  HSEMx HSEM Instance.

  230.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  231.   * @retval 1 lock fail, 0 lock successful or already locked by same core

  232.   */

  233. __STATIC_INLINE uint32_t LL_HSEM_1StepLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  234. {

  235.   return ((HSEMx->RLR[Semaphore] != (HSEM_R_LOCK | LL_HSEM_COREID)) ? 1UL : 0UL);

  236. }

  237. 

  238. /**

  239.   * @brief  Release the lock of the semaphore.

  240.   * @note In case of LL_HSEM_1StepLock usage to lock a semaphore, the process is 0.

  241.   * @rmtoll R            LOCK          LL_HSEM_ReleaseLock

  242.   * @param  HSEMx HSEM Instance.

  243.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  244.   * @param  process Process number. Value between Min_Data=0 and Max_Data=255

  245.   * @retval None

  246.   */

  247. __STATIC_INLINE void LL_HSEM_ReleaseLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  248. {

  249.   WRITE_REG(HSEMx->R[Semaphore], (LL_HSEM_COREID | process));

  250. }

  251. 

  252. /**

  253.   * @brief  Get the lock status of the semaphore.

  254.   * @rmtoll R            LOCK          LL_HSEM_GetStatus

  255.   * @param  HSEMx HSEM Instance.

  256.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  257.   * @retval 0 semaphore is free, 1 semaphore is locked  */

  258. __STATIC_INLINE uint32_t LL_HSEM_GetStatus(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  259. {

  260.   return ((HSEMx->R[Semaphore] != 0U) ? 1UL : 0UL);

  261. }

  262. 

  263. /**

  264.   * @brief  Set the key.

  265.   * @rmtoll KEYR         KEY           LL_HSEM_SetKey

  266.   * @param  HSEMx HSEM Instance.

  267.   * @param  key Key value.

  268.   * @retval None

  269.   */

  270. __STATIC_INLINE void LL_HSEM_SetKey(HSEM_TypeDef *HSEMx, uint32_t key)

  271. {

  272.   WRITE_REG(HSEMx->KEYR, key << HSEM_KEYR_KEY_Pos);

  273. }

  274. 

  275. /**

  276.   * @brief  Get the key.

  277.   * @rmtoll KEYR         KEY           LL_HSEM_GetKey

  278.   * @param  HSEMx HSEM Instance.

  279.   * @retval key to unlock all semaphore from the same core

  280.   */

  281. __STATIC_INLINE uint32_t LL_HSEM_GetKey(HSEM_TypeDef *HSEMx)

  282. {

  283.   return (uint32_t)(READ_BIT(HSEMx->KEYR, HSEM_KEYR_KEY) >> HSEM_KEYR_KEY_Pos);

  284. }

  285. 

  286. /**

  287.   * @brief  Release all semaphore with the same core id.

  288.   * @rmtoll CR           KEY           LL_HSEM_ResetAllLock

  289.   * @param  HSEMx HSEM Instance.

  290.   * @param  key Key value.

  291.   * @param  core This parameter can be one of the following values:

  292.   *         @arg @ref LL_HSEM_COREID_CPU1

  293.   *         @arg @ref LL_HSEM_COREID_CPU2

  294.   * @retval None

  295.   */

  296. __STATIC_INLINE void LL_HSEM_ResetAllLock(HSEM_TypeDef *HSEMx, uint32_t key, uint32_t core)

  297. {

  298.   WRITE_REG(HSEMx->CR, (key << HSEM_CR_KEY_Pos) | core);

  299. }

  300. 

  301. /**

  302.   * @}

  303.   */

  304. 

  305. /** @defgroup HSEM_LL_EF_IT_Management IT_Management

  306.   * @{

  307.   */

  308. 

  309. /**

  310.   * @brief  Enable interrupt.

  311.   * @rmtoll C1IER         ISEM          LL_HSEM_EnableIT_C1IER

  312.   * @param  HSEMx HSEM Instance.

  313.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  314.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  315.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  316.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  317.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  318.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  319.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  320.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  321.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  322.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  323.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  324.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  325.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  326.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  327.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  328.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  329.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  330.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  331.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  332.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  333.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  334.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  335.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  336.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  337.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  338.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  339.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  340.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  341.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  342.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  343.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  344.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  345.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  346.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  347.   * @retval None

  348.   */

  349. __STATIC_INLINE void LL_HSEM_EnableIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  350. {

  351.   SET_BIT(HSEMx->C1IER, SemaphoreMask);

  352. }

  353. 

  354. /**

  355.   * @brief  Disable interrupt.

  356.   * @rmtoll C1IER          ISEM          LL_HSEM_DisableIT_C1IER

  357.   * @param  HSEMx HSEM Instance.

  358.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  359.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  360.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  361.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  362.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  363.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  364.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  365.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  366.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  367.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  368.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  369.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  370.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  371.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  372.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  373.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  374.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  375.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  376.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  377.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  378.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  379.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  380.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  381.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  382.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  383.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  384.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  385.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  386.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  387.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  388.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  389.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  390.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  391.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  392.   * @retval None

  393.   */

  394. __STATIC_INLINE void LL_HSEM_DisableIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  395. {

  396.   CLEAR_BIT(HSEMx->C1IER, SemaphoreMask);

  397. }

  398. 

  399. /**

  400.   * @brief  Check if interrupt is enabled.

  401.   * @rmtoll C1IER          ISEM          LL_HSEM_IsEnabledIT_C1IER

  402.   * @param  HSEMx HSEM Instance.

  403.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  404.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  405.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  406.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  407.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  408.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  409.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  410.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  411.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  412.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  413.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  414.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  415.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  416.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  417.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  418.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  419.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  420.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  421.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  422.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  423.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  424.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  425.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  426.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  427.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  428.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  429.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  430.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  431.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  432.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  433.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  434.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  435.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  436.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  437.   * @retval State of bit (1 or 0).

  438.   */

  439. __STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  440. {

  441.   return ((READ_BIT(HSEMx->C1IER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  442. }

  443. 

  444. /**

  445.   * @brief  Enable interrupt.

  446.   * @rmtoll C2IER         ISEM          LL_HSEM_EnableIT_C2IER

  447.   * @param  HSEMx HSEM Instance.

  448.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  449.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  450.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  451.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  452.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  453.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  454.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  455.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  456.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  457.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  458.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  459.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  460.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  461.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  462.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  463.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  464.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  465.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  466.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  467.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  468.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  469.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  470.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  471.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  472.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  473.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  474.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  475.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  476.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  477.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  478.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  479.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  480.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  481.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  482.   * @retval None

  483.   */

  484. __STATIC_INLINE void LL_HSEM_EnableIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  485. {

  486.   SET_BIT(HSEMx->C2IER, SemaphoreMask);

  487. }

  488. 

  489. /**

  490.   * @brief  Disable interrupt.

  491.   * @rmtoll C2IER          ISEM          LL_HSEM_DisableIT_C2IER

  492.   * @param  HSEMx HSEM Instance.

  493.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  494.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  495.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  496.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  497.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  498.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  499.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  500.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  501.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  502.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  503.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  504.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  505.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  506.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  507.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  508.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  509.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  510.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  511.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  512.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  513.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  514.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  515.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  516.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  517.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  518.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  519.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  520.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  521.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  522.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  523.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  524.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  525.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  526.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  527.   * @retval None

  528.   */

  529. __STATIC_INLINE void LL_HSEM_DisableIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  530. {

  531.   CLEAR_BIT(HSEMx->C2IER, SemaphoreMask);

  532. }

  533. 

  534. /**

  535.   * @brief  Check if interrupt is enabled.

  536.   * @rmtoll C2IER          ISEM          LL_HSEM_IsEnabledIT_C2IER

  537.   * @param  HSEMx HSEM Instance.

  538.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  539.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  540.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  541.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  542.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  543.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  544.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  545.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  546.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  547.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  548.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  549.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  550.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  551.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  552.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  553.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  554.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  555.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  556.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  557.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  558.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  559.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  560.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  561.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  562.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  563.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  564.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  565.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  566.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  567.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  568.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  569.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  570.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  571.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  572.   * @retval State of bit (1 or 0).

  573.   */

  574. __STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  575. {

  576.   return ((READ_BIT(HSEMx->C2IER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  577. }

  578. 

  579. /**

  580.   * @}

  581.   */

  582. 

  583. /** @defgroup HSEM_LL_EF_FLAG_Management FLAG_Management

  584.   * @{

  585.   */

  586. 

  587. /**

  588.   * @brief  Clear interrupt status.

  589.   * @rmtoll C1ICR         ISEM          LL_HSEM_ClearFlag_C1ICR

  590.   * @param  HSEMx HSEM Instance.

  591.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  592.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  593.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  594.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  595.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  596.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  597.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  598.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  599.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  600.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  601.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  602.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  603.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  604.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  605.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  606.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  607.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  608.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  609.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  610.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  611.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  612.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  613.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  614.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  615.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  616.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  617.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  618.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  619.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  620.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  621.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  622.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  623.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  624.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  625.   * @retval None

  626.   */

  627. __STATIC_INLINE void LL_HSEM_ClearFlag_C1ICR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  628. {

  629.   WRITE_REG(HSEMx->C1ICR, SemaphoreMask);

  630. }

  631. 

  632. /**

  633.   * @brief  Get interrupt status from ISR register.

  634.   * @rmtoll C1ISR         ISEM          LL_HSEM_IsActiveFlag_C1ISR

  635.   * @param  HSEMx HSEM Instance.

  636.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  637.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  638.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  639.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  640.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  641.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  642.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  643.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  644.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  645.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  646.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  647.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  648.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  649.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  650.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  651.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  652.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  653.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  654.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  655.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  656.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  657.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  658.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  659.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  660.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  661.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  662.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  663.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  664.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  665.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  666.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  667.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  668.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  669.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  670.   * @retval State of bit (1 or 0).

  671.   */

  672. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C1ISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  673. {

  674.   return ((READ_BIT(HSEMx->C1ISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  675. }

  676. 

  677. /**

  678.   * @brief  Get interrupt status from MISR register.

  679.   * @rmtoll C1MISR        ISEM          LL_HSEM_IsActiveFlag_C1MISR

  680.   * @param  HSEMx HSEM Instance.

  681.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  682.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  683.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  684.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  685.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  686.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  687.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  688.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  689.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  690.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  691.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  692.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  693.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  694.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  695.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  696.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  697.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  698.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  699.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  700.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  701.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  702.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  703.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  704.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  705.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  706.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  707.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  708.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  709.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  710.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  711.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  712.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  713.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  714.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  715.   * @retval State of bit (1 or 0).

  716.   */

  717. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C1MISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  718. {

  719.   return ((READ_BIT(HSEMx->C1MISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  720. }

  721. 

  722. /**

  723.   * @brief  Clear interrupt status.

  724.   * @rmtoll C2ICR         ISEM          LL_HSEM_ClearFlag_C2ICR

  725.   * @param  HSEMx HSEM Instance.

  726.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  727.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  728.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  729.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  730.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  731.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  732.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  733.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  734.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  735.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  736.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  737.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  738.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  739.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  740.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  741.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  742.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  743.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  744.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  745.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  746.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  747.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  748.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  749.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  750.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  751.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  752.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  753.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  754.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  755.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  756.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  757.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  758.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  759.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  760.   * @retval None

  761.   */

  762. __STATIC_INLINE void LL_HSEM_ClearFlag_C2ICR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  763. {

  764.   WRITE_REG(HSEMx->C2ICR, SemaphoreMask);

  765. }

  766. 

  767. /**

  768.   * @brief  Get interrupt status from ISR register.

  769.   * @rmtoll C2ISR         ISEM          LL_HSEM_IsActiveFlag_C2ISR

  770.   * @param  HSEMx HSEM Instance.

  771.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  772.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  773.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  774.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  775.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  776.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  777.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  778.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  779.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  780.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  781.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  782.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  783.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  784.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  785.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  786.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  787.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  788.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  789.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  790.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  791.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  792.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  793.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  794.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  795.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  796.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  797.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  798.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  799.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  800.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  801.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  802.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  803.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  804.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  805.   * @retval State of bit (1 or 0).

  806.   */

  807. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C2ISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  808. {

  809.   return ((READ_BIT(HSEMx->C2ISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  810. }

  811. 

  812. /**

  813.   * @brief  Get interrupt status from MISR register.

  814.   * @rmtoll C2MISR        ISEM          LL_HSEM_IsActiveFlag_C2MISR

  815.   * @param  HSEMx HSEM Instance.

  816.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  817.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  818.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  819.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  820.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  821.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  822.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  823.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  824.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  825.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  826.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  827.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  828.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  829.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  830.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  831.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  832.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  833.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  834.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  835.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  836.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  837.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  838.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  839.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  840.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  841.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  842.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  843.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  844.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  845.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  846.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  847.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  848.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  849.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  850.   * @retval State of bit (1 or 0).

  851.   */

  852. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C2MISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  853. {

  854.   return ((READ_BIT(HSEMx->C2MISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  855. }

  856. /**

  857.   * @}

  858.   */

  859. 

  860. /**

  861.   * @}

  862.   */

  863. 

  864. /**

  865.   * @}

  866.   */

  867. 

  868. #endif /* defined(HSEM) */

  869. 

  870. /**

  871.   * @}

  872.   */

  873. 

  874. #ifdef __cplusplus

  875. }

  876. #endif

  877. 

  878. #endif /* __STM32WBxx_LL_HSEM_H */

  879. 

  880. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/