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  1. /**
  2. ******************************************************************************
  3. * @file stm32wbxx_ll_pwr.c
  4. * @author MCD Application Team
  5. * @brief PWR LL module driver.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. #if defined(USE_FULL_LL_DRIVER)
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "stm32wbxx_ll_pwr.h"
  22. #include "stm32wbxx_ll_bus.h"
  23. /** @addtogroup STM32WBxx_LL_Driver
  24. * @{
  25. */
  26. #if defined(PWR)
  27. /** @defgroup PWR_LL PWR
  28. * @{
  29. */
  30. /* Private types -------------------------------------------------------------*/
  31. /* Private variables ---------------------------------------------------------*/
  32. /* Private constants ---------------------------------------------------------*/
  33. /** @defgroup PWR_LL_Private_Constants PWR Private Constants
  34. * @{
  35. */
  36. /* Definitions of PWR registers reset value */
  37. #define PWR_CR1_RESET_VALUE (0x00000200)
  38. #define PWR_CR2_RESET_VALUE (0x00000000)
  39. #define PWR_CR3_RESET_VALUE (0x00008000)
  40. #define PWR_CR4_RESET_VALUE (0x00000000)
  41. #define PWR_CR5_RESET_VALUE (0x00004272)
  42. #define PWR_PUCRA_RESET_VALUE (0x00000000)
  43. #define PWR_PDCRA_RESET_VALUE (0x00000000)
  44. #define PWR_PUCRB_RESET_VALUE (0x00000000)
  45. #define PWR_PDCRB_RESET_VALUE (0x00000000)
  46. #define PWR_PUCRC_RESET_VALUE (0x00000000)
  47. #define PWR_PDCRC_RESET_VALUE (0x00000000)
  48. #define PWR_PUCRD_RESET_VALUE (0x00000000)
  49. #define PWR_PDCRD_RESET_VALUE (0x00000000)
  50. #define PWR_PUCRE_RESET_VALUE (0x00000000)
  51. #define PWR_PDCRE_RESET_VALUE (0x00000000)
  52. #define PWR_PUCRH_RESET_VALUE (0x00000000)
  53. #define PWR_PDCRH_RESET_VALUE (0x00000000)
  54. #define PWR_C2CR1_RESET_VALUE (0x00000000)
  55. #define PWR_C2CR3_RESET_VALUE (0x00008000)
  56. /**
  57. * @}
  58. */
  59. /* Private macros ------------------------------------------------------------*/
  60. /* Private function prototypes -----------------------------------------------*/
  61. /* Exported functions --------------------------------------------------------*/
  62. /** @addtogroup PWR_LL_Exported_Functions
  63. * @{
  64. */
  65. /** @addtogroup PWR_LL_EF_Init
  66. * @{
  67. */
  68. /**
  69. * @brief De-initialize the PWR registers to their default reset values.
  70. * @retval An ErrorStatus enumeration value:
  71. * - SUCCESS: PWR registers are de-initialized
  72. * - ERROR: not applicable
  73. */
  74. ErrorStatus LL_PWR_DeInit(void)
  75. {
  76. /* Apply reset values to all PWR registers */
  77. LL_PWR_WriteReg(CR1, PWR_CR1_RESET_VALUE);
  78. LL_PWR_WriteReg(CR2, PWR_CR2_RESET_VALUE);
  79. LL_PWR_WriteReg(CR3, PWR_CR3_RESET_VALUE);
  80. LL_PWR_WriteReg(CR4, PWR_CR4_RESET_VALUE);
  81. LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE);
  82. LL_PWR_WriteReg(PUCRA, PWR_PUCRA_RESET_VALUE);
  83. LL_PWR_WriteReg(PDCRA, PWR_PDCRA_RESET_VALUE);
  84. LL_PWR_WriteReg(PUCRB, PWR_PUCRB_RESET_VALUE);
  85. LL_PWR_WriteReg(PDCRB, PWR_PDCRB_RESET_VALUE);
  86. LL_PWR_WriteReg(PUCRC, PWR_PUCRC_RESET_VALUE);
  87. LL_PWR_WriteReg(PDCRC, PWR_PDCRC_RESET_VALUE);
  88. #if defined(GPIOD)
  89. LL_PWR_WriteReg(PUCRD, PWR_PUCRD_RESET_VALUE);
  90. LL_PWR_WriteReg(PDCRD, PWR_PDCRD_RESET_VALUE);
  91. #endif
  92. LL_PWR_WriteReg(PUCRE, PWR_PUCRE_RESET_VALUE);
  93. LL_PWR_WriteReg(PDCRE, PWR_PDCRE_RESET_VALUE);
  94. LL_PWR_WriteReg(PUCRH, PWR_PUCRH_RESET_VALUE);
  95. LL_PWR_WriteReg(PDCRH, PWR_PDCRH_RESET_VALUE);
  96. LL_PWR_WriteReg(C2CR1, PWR_C2CR1_RESET_VALUE);
  97. LL_PWR_WriteReg(C2CR3, PWR_C2CR3_RESET_VALUE);
  98. /* Clear all flags */
  99. LL_PWR_WriteReg(SCR,
  100. LL_PWR_SCR_CC2HF
  101. | LL_PWR_SCR_CBLEAF
  102. | LL_PWR_SCR_CCRPEF
  103. #if defined(PWR_CR3_E802A)
  104. | LL_PWR_SCR_C802AF
  105. | LL_PWR_SCR_C802WUF
  106. #endif
  107. | LL_PWR_SCR_CBLEWUF
  108. #if defined(PWR_CR5_SMPSEN)
  109. | LL_PWR_SCR_CBORHF
  110. | LL_PWR_SCR_CSMPSFBF
  111. #endif
  112. | LL_PWR_SCR_CWUF
  113. );
  114. LL_PWR_WriteReg(EXTSCR,
  115. LL_PWR_EXTSCR_CCRPF
  116. | LL_PWR_EXTSCR_C2CSSF
  117. | LL_PWR_EXTSCR_C1CSSF
  118. );
  119. return SUCCESS;
  120. }
  121. /**
  122. * @}
  123. */
  124. /**
  125. * @}
  126. */
  127. /**
  128. * @}
  129. */
  130. #endif /* defined(PWR) */
  131. /**
  132. * @}
  133. */
  134. #endif /* USE_FULL_LL_DRIVER */
  135. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/