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  1. ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f427xx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V2.6.1
  5. ;* Date : 14-February-2017
  6. ;* Description : STM32F427x devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* After Reset the CortexM4 processor is in Thread mode,
  12. ;* priority is Privileged, and the Stack is set to Main.
  13. ;* <<< Use Configuration Wizard in Context Menu >>>
  14. ;*******************************************************************************
  15. ;
  16. ;* Redistribution and use in source and binary forms, with or without modification,
  17. ;* are permitted provided that the following conditions are met:
  18. ;* 1. Redistributions of source code must retain the above copyright notice,
  19. ;* this list of conditions and the following disclaimer.
  20. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  21. ;* this list of conditions and the following disclaimer in the documentation
  22. ;* and/or other materials provided with the distribution.
  23. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  24. ;* may be used to endorse or promote products derived from this software
  25. ;* without specific prior written permission.
  26. ;*
  27. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  28. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  29. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  31. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  33. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  34. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. ;
  38. ;*******************************************************************************
  39. ; Amount of memory (in bytes) allocated for Stack
  40. ; Tailor this value to your application needs
  41. ; <h> Stack Configuration
  42. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  43. ; </h>
  44. Stack_Size EQU 0x00000400
  45. AREA STACK, NOINIT, READWRITE, ALIGN=3
  46. Stack_Mem SPACE Stack_Size
  47. __initial_sp
  48. ; <h> Heap Configuration
  49. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  50. ; </h>
  51. Heap_Size EQU 0x00000200
  52. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  53. __heap_base
  54. Heap_Mem SPACE Heap_Size
  55. __heap_limit
  56. PRESERVE8
  57. THUMB
  58. ; Vector Table Mapped to Address 0 at Reset
  59. AREA RESET, DATA, READONLY
  60. EXPORT __Vectors
  61. EXPORT __Vectors_End
  62. EXPORT __Vectors_Size
  63. __Vectors DCD __initial_sp ; Top of Stack
  64. DCD Reset_Handler ; Reset Handler
  65. DCD NMI_Handler ; NMI Handler
  66. DCD HardFault_Handler ; Hard Fault Handler
  67. DCD MemManage_Handler ; MPU Fault Handler
  68. DCD BusFault_Handler ; Bus Fault Handler
  69. DCD UsageFault_Handler ; Usage Fault Handler
  70. DCD 0 ; Reserved
  71. DCD 0 ; Reserved
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD SVC_Handler ; SVCall Handler
  75. DCD DebugMon_Handler ; Debug Monitor Handler
  76. DCD 0 ; Reserved
  77. DCD PendSV_Handler ; PendSV Handler
  78. DCD SysTick_Handler ; SysTick Handler
  79. ; External Interrupts
  80. DCD WWDG_IRQHandler ; Window WatchDog
  81. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  82. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  83. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  84. DCD FLASH_IRQHandler ; FLASH
  85. DCD RCC_IRQHandler ; RCC
  86. DCD EXTI0_IRQHandler ; EXTI Line0
  87. DCD EXTI1_IRQHandler ; EXTI Line1
  88. DCD EXTI2_IRQHandler ; EXTI Line2
  89. DCD EXTI3_IRQHandler ; EXTI Line3
  90. DCD EXTI4_IRQHandler ; EXTI Line4
  91. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  92. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  93. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  94. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  95. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  96. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  97. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  98. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  99. DCD CAN1_TX_IRQHandler ; CAN1 TX
  100. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  101. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  102. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  103. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  104. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  105. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  106. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  107. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  108. DCD TIM2_IRQHandler ; TIM2
  109. DCD TIM3_IRQHandler ; TIM3
  110. DCD TIM4_IRQHandler ; TIM4
  111. DCD I2C1_EV_IRQHandler ; I2C1 Event
  112. DCD I2C1_ER_IRQHandler ; I2C1 Error
  113. DCD I2C2_EV_IRQHandler ; I2C2 Event
  114. DCD I2C2_ER_IRQHandler ; I2C2 Error
  115. DCD SPI1_IRQHandler ; SPI1
  116. DCD SPI2_IRQHandler ; SPI2
  117. DCD USART1_IRQHandler ; USART1
  118. DCD USART2_IRQHandler ; USART2
  119. DCD USART3_IRQHandler ; USART3
  120. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  121. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  122. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  123. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  124. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  125. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  126. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  127. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  128. DCD FMC_IRQHandler ; FMC
  129. DCD SDIO_IRQHandler ; SDIO
  130. DCD TIM5_IRQHandler ; TIM5
  131. DCD SPI3_IRQHandler ; SPI3
  132. DCD UART4_IRQHandler ; UART4
  133. DCD UART5_IRQHandler ; UART5
  134. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  135. DCD TIM7_IRQHandler ; TIM7
  136. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  137. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  138. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  139. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  140. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  141. DCD ETH_IRQHandler ; Ethernet
  142. DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
  143. DCD CAN2_TX_IRQHandler ; CAN2 TX
  144. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  145. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  146. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  147. DCD OTG_FS_IRQHandler ; USB OTG FS
  148. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  149. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  150. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  151. DCD USART6_IRQHandler ; USART6
  152. DCD I2C3_EV_IRQHandler ; I2C3 event
  153. DCD I2C3_ER_IRQHandler ; I2C3 error
  154. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  155. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  156. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  157. DCD OTG_HS_IRQHandler ; USB OTG HS
  158. DCD DCMI_IRQHandler ; DCMI
  159. DCD 0 ; Reserved
  160. DCD HASH_RNG_IRQHandler ; Hash and Rng
  161. DCD FPU_IRQHandler ; FPU
  162. DCD UART7_IRQHandler ; UART7
  163. DCD UART8_IRQHandler ; UART8
  164. DCD SPI4_IRQHandler ; SPI4
  165. DCD SPI5_IRQHandler ; SPI5
  166. DCD SPI6_IRQHandler ; SPI6
  167. DCD SAI1_IRQHandler ; SAI1
  168. DCD 0 ; Reserved
  169. DCD 0 ; Reserved
  170. DCD DMA2D_IRQHandler ; DMA2D
  171. __Vectors_End
  172. __Vectors_Size EQU __Vectors_End - __Vectors
  173. AREA |.text|, CODE, READONLY
  174. ; Reset handler
  175. Reset_Handler PROC
  176. EXPORT Reset_Handler [WEAK]
  177. IMPORT SystemInit
  178. IMPORT __main
  179. LDR R0, =SystemInit
  180. BLX R0
  181. LDR R0, =__main
  182. BX R0
  183. ENDP
  184. ; Dummy Exception Handlers (infinite loops which can be modified)
  185. NMI_Handler PROC
  186. EXPORT NMI_Handler [WEAK]
  187. B .
  188. ENDP
  189. HardFault_Handler\
  190. PROC
  191. EXPORT HardFault_Handler [WEAK]
  192. B .
  193. ENDP
  194. MemManage_Handler\
  195. PROC
  196. EXPORT MemManage_Handler [WEAK]
  197. B .
  198. ENDP
  199. BusFault_Handler\
  200. PROC
  201. EXPORT BusFault_Handler [WEAK]
  202. B .
  203. ENDP
  204. UsageFault_Handler\
  205. PROC
  206. EXPORT UsageFault_Handler [WEAK]
  207. B .
  208. ENDP
  209. SVC_Handler PROC
  210. EXPORT SVC_Handler [WEAK]
  211. B .
  212. ENDP
  213. DebugMon_Handler\
  214. PROC
  215. EXPORT DebugMon_Handler [WEAK]
  216. B .
  217. ENDP
  218. PendSV_Handler PROC
  219. EXPORT PendSV_Handler [WEAK]
  220. B .
  221. ENDP
  222. SysTick_Handler PROC
  223. EXPORT SysTick_Handler [WEAK]
  224. B .
  225. ENDP
  226. Default_Handler PROC
  227. EXPORT WWDG_IRQHandler [WEAK]
  228. EXPORT PVD_IRQHandler [WEAK]
  229. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  230. EXPORT RTC_WKUP_IRQHandler [WEAK]
  231. EXPORT FLASH_IRQHandler [WEAK]
  232. EXPORT RCC_IRQHandler [WEAK]
  233. EXPORT EXTI0_IRQHandler [WEAK]
  234. EXPORT EXTI1_IRQHandler [WEAK]
  235. EXPORT EXTI2_IRQHandler [WEAK]
  236. EXPORT EXTI3_IRQHandler [WEAK]
  237. EXPORT EXTI4_IRQHandler [WEAK]
  238. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  239. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  240. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  241. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  242. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  243. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  244. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  245. EXPORT ADC_IRQHandler [WEAK]
  246. EXPORT CAN1_TX_IRQHandler [WEAK]
  247. EXPORT CAN1_RX0_IRQHandler [WEAK]
  248. EXPORT CAN1_RX1_IRQHandler [WEAK]
  249. EXPORT CAN1_SCE_IRQHandler [WEAK]
  250. EXPORT EXTI9_5_IRQHandler [WEAK]
  251. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  252. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  253. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  254. EXPORT TIM1_CC_IRQHandler [WEAK]
  255. EXPORT TIM2_IRQHandler [WEAK]
  256. EXPORT TIM3_IRQHandler [WEAK]
  257. EXPORT TIM4_IRQHandler [WEAK]
  258. EXPORT I2C1_EV_IRQHandler [WEAK]
  259. EXPORT I2C1_ER_IRQHandler [WEAK]
  260. EXPORT I2C2_EV_IRQHandler [WEAK]
  261. EXPORT I2C2_ER_IRQHandler [WEAK]
  262. EXPORT SPI1_IRQHandler [WEAK]
  263. EXPORT SPI2_IRQHandler [WEAK]
  264. EXPORT USART1_IRQHandler [WEAK]
  265. EXPORT USART2_IRQHandler [WEAK]
  266. EXPORT USART3_IRQHandler [WEAK]
  267. EXPORT EXTI15_10_IRQHandler [WEAK]
  268. EXPORT RTC_Alarm_IRQHandler [WEAK]
  269. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  270. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  271. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  272. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  273. EXPORT TIM8_CC_IRQHandler [WEAK]
  274. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  275. EXPORT FMC_IRQHandler [WEAK]
  276. EXPORT SDIO_IRQHandler [WEAK]
  277. EXPORT TIM5_IRQHandler [WEAK]
  278. EXPORT SPI3_IRQHandler [WEAK]
  279. EXPORT UART4_IRQHandler [WEAK]
  280. EXPORT UART5_IRQHandler [WEAK]
  281. EXPORT TIM6_DAC_IRQHandler [WEAK]
  282. EXPORT TIM7_IRQHandler [WEAK]
  283. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  284. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  285. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  286. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  287. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  288. EXPORT ETH_IRQHandler [WEAK]
  289. EXPORT ETH_WKUP_IRQHandler [WEAK]
  290. EXPORT CAN2_TX_IRQHandler [WEAK]
  291. EXPORT CAN2_RX0_IRQHandler [WEAK]
  292. EXPORT CAN2_RX1_IRQHandler [WEAK]
  293. EXPORT CAN2_SCE_IRQHandler [WEAK]
  294. EXPORT OTG_FS_IRQHandler [WEAK]
  295. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  296. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  297. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  298. EXPORT USART6_IRQHandler [WEAK]
  299. EXPORT I2C3_EV_IRQHandler [WEAK]
  300. EXPORT I2C3_ER_IRQHandler [WEAK]
  301. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  302. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  303. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  304. EXPORT OTG_HS_IRQHandler [WEAK]
  305. EXPORT DCMI_IRQHandler [WEAK]
  306. EXPORT HASH_RNG_IRQHandler [WEAK]
  307. EXPORT FPU_IRQHandler [WEAK]
  308. EXPORT UART7_IRQHandler [WEAK]
  309. EXPORT UART8_IRQHandler [WEAK]
  310. EXPORT SPI4_IRQHandler [WEAK]
  311. EXPORT SPI5_IRQHandler [WEAK]
  312. EXPORT SPI6_IRQHandler [WEAK]
  313. EXPORT SAI1_IRQHandler [WEAK]
  314. EXPORT DMA2D_IRQHandler [WEAK]
  315. WWDG_IRQHandler
  316. PVD_IRQHandler
  317. TAMP_STAMP_IRQHandler
  318. RTC_WKUP_IRQHandler
  319. FLASH_IRQHandler
  320. RCC_IRQHandler
  321. EXTI0_IRQHandler
  322. EXTI1_IRQHandler
  323. EXTI2_IRQHandler
  324. EXTI3_IRQHandler
  325. EXTI4_IRQHandler
  326. DMA1_Stream0_IRQHandler
  327. DMA1_Stream1_IRQHandler
  328. DMA1_Stream2_IRQHandler
  329. DMA1_Stream3_IRQHandler
  330. DMA1_Stream4_IRQHandler
  331. DMA1_Stream5_IRQHandler
  332. DMA1_Stream6_IRQHandler
  333. ADC_IRQHandler
  334. CAN1_TX_IRQHandler
  335. CAN1_RX0_IRQHandler
  336. CAN1_RX1_IRQHandler
  337. CAN1_SCE_IRQHandler
  338. EXTI9_5_IRQHandler
  339. TIM1_BRK_TIM9_IRQHandler
  340. TIM1_UP_TIM10_IRQHandler
  341. TIM1_TRG_COM_TIM11_IRQHandler
  342. TIM1_CC_IRQHandler
  343. TIM2_IRQHandler
  344. TIM3_IRQHandler
  345. TIM4_IRQHandler
  346. I2C1_EV_IRQHandler
  347. I2C1_ER_IRQHandler
  348. I2C2_EV_IRQHandler
  349. I2C2_ER_IRQHandler
  350. SPI1_IRQHandler
  351. SPI2_IRQHandler
  352. USART1_IRQHandler
  353. USART2_IRQHandler
  354. USART3_IRQHandler
  355. EXTI15_10_IRQHandler
  356. RTC_Alarm_IRQHandler
  357. OTG_FS_WKUP_IRQHandler
  358. TIM8_BRK_TIM12_IRQHandler
  359. TIM8_UP_TIM13_IRQHandler
  360. TIM8_TRG_COM_TIM14_IRQHandler
  361. TIM8_CC_IRQHandler
  362. DMA1_Stream7_IRQHandler
  363. FMC_IRQHandler
  364. SDIO_IRQHandler
  365. TIM5_IRQHandler
  366. SPI3_IRQHandler
  367. UART4_IRQHandler
  368. UART5_IRQHandler
  369. TIM6_DAC_IRQHandler
  370. TIM7_IRQHandler
  371. DMA2_Stream0_IRQHandler
  372. DMA2_Stream1_IRQHandler
  373. DMA2_Stream2_IRQHandler
  374. DMA2_Stream3_IRQHandler
  375. DMA2_Stream4_IRQHandler
  376. ETH_IRQHandler
  377. ETH_WKUP_IRQHandler
  378. CAN2_TX_IRQHandler
  379. CAN2_RX0_IRQHandler
  380. CAN2_RX1_IRQHandler
  381. CAN2_SCE_IRQHandler
  382. OTG_FS_IRQHandler
  383. DMA2_Stream5_IRQHandler
  384. DMA2_Stream6_IRQHandler
  385. DMA2_Stream7_IRQHandler
  386. USART6_IRQHandler
  387. I2C3_EV_IRQHandler
  388. I2C3_ER_IRQHandler
  389. OTG_HS_EP1_OUT_IRQHandler
  390. OTG_HS_EP1_IN_IRQHandler
  391. OTG_HS_WKUP_IRQHandler
  392. OTG_HS_IRQHandler
  393. DCMI_IRQHandler
  394. HASH_RNG_IRQHandler
  395. FPU_IRQHandler
  396. UART7_IRQHandler
  397. UART8_IRQHandler
  398. SPI4_IRQHandler
  399. SPI5_IRQHandler
  400. SPI6_IRQHandler
  401. SAI1_IRQHandler
  402. DMA2D_IRQHandler
  403. B .
  404. ENDP
  405. ALIGN
  406. ;*******************************************************************************
  407. ; User Stack and Heap initialization
  408. ;*******************************************************************************
  409. IF :DEF:__MICROLIB
  410. EXPORT __initial_sp
  411. EXPORT __heap_base
  412. EXPORT __heap_limit
  413. ELSE
  414. IMPORT __use_two_region_memory
  415. EXPORT __user_initial_stackheap
  416. __user_initial_stackheap
  417. LDR R0, = Heap_Mem
  418. LDR R1, =(Stack_Mem + Stack_Size)
  419. LDR R2, = (Heap_Mem + Heap_Size)
  420. LDR R3, = Stack_Mem
  421. BX LR
  422. ALIGN
  423. ENDIF
  424. END
  425. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****