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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_i2s.h
  4. * @author MCD Application Team
  5. * @version V1.1.0
  6. * @date 19-June-2014
  7. * @brief Header file of I2S HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_I2S_H
  39. #define __STM32F4xx_HAL_I2S_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx_hal_def.h"
  45. /** @addtogroup STM32F4xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup I2S
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /**
  53. * @brief I2S Init structure definition
  54. */
  55. typedef struct
  56. {
  57. uint32_t Mode; /*!< Specifies the I2S operating mode.
  58. This parameter can be a value of @ref I2S_Mode */
  59. uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
  60. This parameter can be a value of @ref I2S_Standard */
  61. uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
  62. This parameter can be a value of @ref I2S_Data_Format */
  63. uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
  64. This parameter can be a value of @ref I2S_MCLK_Output */
  65. uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
  66. This parameter can be a value of @ref I2S_Audio_Frequency */
  67. uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
  68. This parameter can be a value of @ref I2S_Clock_Polarity */
  69. uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
  70. This parameter can be a value of @ref I2S_Clock_Source */
  71. uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
  72. This parameter can be a value of @ref I2S_FullDuplex_Mode */
  73. }I2S_InitTypeDef;
  74. /**
  75. * @brief HAL State structures definition
  76. */
  77. typedef enum
  78. {
  79. HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
  80. HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
  81. HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
  82. HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
  83. HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
  84. HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
  85. HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
  86. HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
  87. }HAL_I2S_StateTypeDef;
  88. /**
  89. * @brief HAL I2S Error Code structure definition
  90. */
  91. typedef enum
  92. {
  93. HAL_I2S_ERROR_NONE = 0x00, /*!< No error */
  94. HAL_I2S_ERROR_UDR = 0x01, /*!< I2S Underrun error */
  95. HAL_I2S_ERROR_OVR = 0x02, /*!< I2S Overrun error */
  96. HAL_I2SEX_ERROR_UDR = 0x04, /*!< I2S extended Underrun error */
  97. HAL_I2SEX_ERROR_OVR = 0x08, /*!< I2S extended Overrun error */
  98. HAL_I2S_ERROR_FRE = 0x10, /*!< I2S Frame format error */
  99. HAL_I2S_ERROR_DMA = 0x20 /*!< DMA transfer error */
  100. }HAL_I2S_ErrorTypeDef;
  101. /**
  102. * @brief I2S handle Structure definition
  103. */
  104. typedef struct
  105. {
  106. SPI_TypeDef *Instance; /* I2S registers base address */
  107. I2S_InitTypeDef Init; /* I2S communication parameters */
  108. uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
  109. __IO uint16_t TxXferSize; /* I2S Tx transfer size */
  110. __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
  111. uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
  112. __IO uint16_t RxXferSize; /* I2S Rx transfer size */
  113. __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
  114. DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
  115. DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
  116. __IO HAL_LockTypeDef Lock; /* I2S locking object */
  117. __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
  118. __IO HAL_I2S_ErrorTypeDef ErrorCode; /* I2S Error code */
  119. }I2S_HandleTypeDef;
  120. /* Exported constants --------------------------------------------------------*/
  121. /** @defgroup I2S_Exported_Constants
  122. * @{
  123. */
  124. #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
  125. /** @defgroup I2S_Clock_Source
  126. * @{
  127. */
  128. #define I2S_CLOCK_PLL ((uint32_t)0x00000000)
  129. #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
  130. #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
  131. ((CLOCK) == I2S_CLOCK_PLL))
  132. /**
  133. * @}
  134. */
  135. /** @defgroup I2S_Mode
  136. * @{
  137. */
  138. #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
  139. #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
  140. #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
  141. #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
  142. #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
  143. ((MODE) == I2S_MODE_SLAVE_RX) || \
  144. ((MODE) == I2S_MODE_MASTER_TX) || \
  145. ((MODE) == I2S_MODE_MASTER_RX))
  146. /**
  147. * @}
  148. */
  149. /** @defgroup I2S_Standard
  150. * @{
  151. */
  152. #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
  153. #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
  154. #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
  155. #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
  156. #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
  157. #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
  158. ((STANDARD) == I2S_STANDARD_MSB) || \
  159. ((STANDARD) == I2S_STANDARD_LSB) || \
  160. ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
  161. ((STANDARD) == I2S_STANDARD_PCM_LONG))
  162. /** @defgroup I2S_Legacy
  163. * @{
  164. */
  165. #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
  166. /**
  167. * @}
  168. */
  169. /**
  170. * @}
  171. */
  172. /** @defgroup I2S_Data_Format
  173. * @{
  174. */
  175. #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
  176. #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
  177. #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
  178. #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
  179. #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
  180. ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
  181. ((FORMAT) == I2S_DATAFORMAT_24B) || \
  182. ((FORMAT) == I2S_DATAFORMAT_32B))
  183. /**
  184. * @}
  185. */
  186. /** @defgroup I2S_MCLK_Output
  187. * @{
  188. */
  189. #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
  190. #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
  191. #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
  192. ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
  193. /**
  194. * @}
  195. */
  196. /** @defgroup I2S_Audio_Frequency
  197. * @{
  198. */
  199. #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
  200. #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
  201. #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
  202. #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
  203. #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
  204. #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
  205. #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
  206. #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
  207. #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
  208. #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
  209. #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
  210. ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
  211. ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
  212. /**
  213. * @}
  214. */
  215. /** @defgroup I2S_FullDuplex_Mode
  216. * @{
  217. */
  218. #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
  219. #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
  220. #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
  221. ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
  222. /**
  223. * @}
  224. */
  225. /** @defgroup I2S_Clock_Polarity
  226. * @{
  227. */
  228. #define I2S_CPOL_LOW ((uint32_t)0x00000000)
  229. #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
  230. #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
  231. ((CPOL) == I2S_CPOL_HIGH))
  232. /**
  233. * @}
  234. */
  235. /** @defgroup I2S_Interrupt_configuration_definition
  236. * @{
  237. */
  238. #define I2S_IT_TXE SPI_CR2_TXEIE
  239. #define I2S_IT_RXNE SPI_CR2_RXNEIE
  240. #define I2S_IT_ERR SPI_CR2_ERRIE
  241. /**
  242. * @}
  243. */
  244. /** @defgroup I2S_Flag_definition
  245. * @{
  246. */
  247. #define I2S_FLAG_TXE SPI_SR_TXE
  248. #define I2S_FLAG_RXNE SPI_SR_RXNE
  249. #define I2S_FLAG_UDR SPI_SR_UDR
  250. #define I2S_FLAG_OVR SPI_SR_OVR
  251. #define I2S_FLAG_FRE SPI_SR_FRE
  252. #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
  253. #define I2S_FLAG_BSY SPI_SR_BSY
  254. /**
  255. * @}
  256. */
  257. /**
  258. * @}
  259. */
  260. /* Exported macro ------------------------------------------------------------*/
  261. /** @brief Reset I2S handle state
  262. * @param __HANDLE__: specifies the I2S Handle.
  263. * @retval None
  264. */
  265. #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
  266. /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
  267. * @param __HANDLE__: specifies the I2S Handle.
  268. * @retval None
  269. */
  270. #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
  271. #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
  272. /** @brief Enable or disable the specified I2S interrupts.
  273. * @param __HANDLE__: specifies the I2S Handle.
  274. * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
  275. * This parameter can be one of the following values:
  276. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  277. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  278. * @arg I2S_IT_ERR: Error interrupt enable
  279. * @retval None
  280. */
  281. #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
  282. #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
  283. /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
  284. * @param __HANDLE__: specifies the I2S Handle.
  285. * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
  286. * @param __INTERRUPT__: specifies the I2S interrupt source to check.
  287. * This parameter can be one of the following values:
  288. * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  289. * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  290. * @arg I2S_IT_ERR: Error interrupt enable
  291. * @retval The new state of __IT__ (TRUE or FALSE).
  292. */
  293. #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  294. /** @brief Checks whether the specified I2S flag is set or not.
  295. * @param __HANDLE__: specifies the I2S Handle.
  296. * @param __FLAG__: specifies the flag to check.
  297. * This parameter can be one of the following values:
  298. * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
  299. * @arg I2S_FLAG_TXE: Transmit buffer empty flag
  300. * @arg I2S_FLAG_UDR: Underrun flag
  301. * @arg I2S_FLAG_OVR: Overrun flag
  302. * @arg I2S_FLAG_FRE: Frame error flag
  303. * @arg I2S_FLAG_CHSIDE: Channel Side flag
  304. * @arg I2S_FLAG_BSY: Busy flag
  305. * @retval The new state of __FLAG__ (TRUE or FALSE).
  306. */
  307. #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
  308. /** @brief Clears the I2S OVR pending flag.
  309. * @param __HANDLE__: specifies the I2S Handle.
  310. * @retval None
  311. */
  312. #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
  313. (__HANDLE__)->Instance->SR;}while(0)
  314. /** @brief Clears the I2S UDR pending flag.
  315. * @param __HANDLE__: specifies the I2S Handle.
  316. * @retval None
  317. */
  318. #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
  319. /* Include I2S Extension module */
  320. #include "stm32f4xx_hal_i2s_ex.h"
  321. /* Exported functions --------------------------------------------------------*/
  322. /* Initialization/de-initialization functions **********************************/
  323. HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
  324. HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
  325. void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
  326. void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
  327. /* I/O operation functions *****************************************************/
  328. /* Blocking mode: Polling */
  329. HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
  330. HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
  331. /* Non-Blocking mode: Interrupt */
  332. HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  333. HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  334. void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
  335. /* Non-Blocking mode: DMA */
  336. HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  337. HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
  338. HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
  339. HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
  340. HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
  341. /* Peripheral Control and State functions **************************************/
  342. HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
  343. HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
  344. /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
  345. void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
  346. void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
  347. void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
  348. void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
  349. void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
  350. void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
  351. void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
  352. void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
  353. void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  354. void I2S_DMAError(DMA_HandleTypeDef *hdma);
  355. HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
  356. /**
  357. * @}
  358. */
  359. /**
  360. * @}
  361. */
  362. #ifdef __cplusplus
  363. }
  364. #endif
  365. #endif /* __STM32F4xx_HAL_I2S_H */
  366. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/