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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @version V1.1.0
  6. * @date 19-June-2014
  7. * @brief Header file of PWR HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_PWR_H
  39. #define __STM32F4xx_HAL_PWR_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx_hal_def.h"
  45. /** @addtogroup STM32F4xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup PWR
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /**
  53. * @brief PWR PVD configuration structure definition
  54. */
  55. typedef struct
  56. {
  57. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  58. This parameter can be a value of @ref PWR_PVD_detection_level */
  59. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  60. This parameter can be a value of @ref PWR_PVD_Mode */
  61. }PWR_PVDTypeDef;
  62. /* Exported constants --------------------------------------------------------*/
  63. /* ------------- PWR registers bit address in the alias region ---------------*/
  64. #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
  65. /* --- CR Register ---*/
  66. /* Alias word address of DBP bit */
  67. #define CR_OFFSET (PWR_OFFSET + 0x00)
  68. #define DBP_BitNumber 0x08
  69. #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
  70. /* Alias word address of PVDE bit */
  71. #define PVDE_BitNumber 0x04
  72. #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
  73. /* Alias word address of PMODE bit */
  74. #define PMODE_BitNumber 0x0E
  75. #define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
  76. /* --- CSR Register ---*/
  77. /* Alias word address of EWUP bit */
  78. #define CSR_OFFSET (PWR_OFFSET + 0x04)
  79. #define EWUP_BitNumber 0x08
  80. #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
  81. /** @defgroup PWR_Exported_Constants
  82. * @{
  83. */
  84. /** @defgroup PWR_WakeUp_Pins
  85. * @{
  86. */
  87. #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
  88. #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
  89. /**
  90. * @}
  91. */
  92. /** @defgroup PWR_PVD_detection_level
  93. * @{
  94. */
  95. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  96. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  97. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  98. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  99. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  100. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  101. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  102. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
  103. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  104. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  105. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  106. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  107. /**
  108. * @}
  109. */
  110. /** @defgroup PWR_PVD_Mode
  111. * @{
  112. */
  113. #define PWR_MODE_EVT ((uint32_t)0x00000000) /*!< No Interrupt */
  114. #define PWR_MODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */
  115. #define PWR_MODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */
  116. #define PWR_MODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  117. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \
  118. ((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING))
  119. /**
  120. * @}
  121. */
  122. /** @defgroup PWR_Regulator_state_in_STOP_mode
  123. * @{
  124. */
  125. #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
  126. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
  127. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  128. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  129. /**
  130. * @}
  131. */
  132. /** @defgroup PWR_SLEEP_mode_entry
  133. * @{
  134. */
  135. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
  136. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
  137. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  138. /**
  139. * @}
  140. */
  141. /** @defgroup PWR_STOP_mode_entry
  142. * @{
  143. */
  144. #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
  145. #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
  146. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
  147. /**
  148. * @}
  149. */
  150. /** @defgroup PWR_Regulator_Voltage_Scale
  151. * @{
  152. */
  153. #define PWR_REGULATOR_VOLTAGE_SCALE1 ((uint32_t)0x0000C000)
  154. #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00008000)
  155. #define PWR_REGULATOR_VOLTAGE_SCALE3 ((uint32_t)0x00004000)
  156. #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
  157. ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
  158. ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
  159. /**
  160. * @}
  161. */
  162. /** @defgroup PWR_Flag
  163. * @{
  164. */
  165. #define PWR_FLAG_WU PWR_CSR_WUF
  166. #define PWR_FLAG_SB PWR_CSR_SBF
  167. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  168. #define PWR_FLAG_BRR PWR_CSR_BRR
  169. #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
  170. /**
  171. * @}
  172. */
  173. /**
  174. * @}
  175. */
  176. /* Exported macro ------------------------------------------------------------*/
  177. /** @brief macros configure the main internal regulator output voltage.
  178. * @param __REGULATOR__: specifies the regulator output voltage to achieve
  179. * a tradeoff between performance and power consumption when the device does
  180. * not operate at the maximum frequency (refer to the datasheets for more details).
  181. * This parameter can be one of the following values:
  182. * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
  183. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
  184. * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
  185. * @retval None
  186. */
  187. #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
  188. /** @brief Check PWR flag is set or not.
  189. * @param __FLAG__: specifies the flag to check.
  190. * This parameter can be one of the following values:
  191. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  192. * was received from the WKUP pin or from the RTC alarm (Alarm A
  193. * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  194. * An additional wakeup event is detected if the WKUP pin is enabled
  195. * (by setting the EWUP bit) when the WKUP pin level is already high.
  196. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  197. * resumed from StandBy mode.
  198. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  199. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
  200. * For this reason, this bit is equal to 0 after Standby or reset
  201. * until the PVDE bit is set.
  202. * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
  203. * when the device wakes up from Standby mode or by a system reset
  204. * or power reset.
  205. * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
  206. * scaling output selection is ready.
  207. * @retval The new state of __FLAG__ (TRUE or FALSE).
  208. */
  209. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  210. /** @brief Clear the PWR's pending flags.
  211. * @param __FLAG__: specifies the flag to clear.
  212. * This parameter can be one of the following values:
  213. * @arg PWR_FLAG_WU: Wake Up flag
  214. * @arg PWR_FLAG_SB: StandBy flag
  215. */
  216. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
  217. #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  218. /**
  219. * @brief Enable the PVD Exti Line.
  220. * @param __EXTILINE__: specifies the PVD Exti sources to be enabled.
  221. * This parameter can be:
  222. * @arg PWR_EXTI_LINE_PVD
  223. * @retval None.
  224. */
  225. #define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__))
  226. /**
  227. * @brief Disable the PVD EXTI Line.
  228. * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
  229. * This parameter can be:
  230. * @arg PWR_EXTI_LINE_PVD
  231. * @retval None.
  232. */
  233. #define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__))
  234. /**
  235. * @brief checks whether the specified PVD Exti interrupt flag is set or not.
  236. * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
  237. * This parameter can be:
  238. * @arg PWR_EXTI_LINE_PVD
  239. * @retval EXTI PVD Line Status.
  240. */
  241. #define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__) (EXTI->PR & (__EXTILINE__))
  242. /**
  243. * @brief Clear the PVD Exti flag.
  244. * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
  245. * This parameter can be:
  246. * @arg PWR_EXTI_LINE_PVD
  247. * @retval None.
  248. */
  249. #define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__) (EXTI->PR = (__EXTILINE__))
  250. /**
  251. * @brief Generates a Software interrupt on selected EXTI line.
  252. * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
  253. * This parameter can be:
  254. * @arg PWR_EXTI_LINE_PVD
  255. * @retval None
  256. */
  257. #define __HAL_PVD_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
  258. /* Include PWR HAL Extension module */
  259. #include "stm32f4xx_hal_pwr_ex.h"
  260. /* Exported functions --------------------------------------------------------*/
  261. /* Initialization and de-initialization functions *****************************/
  262. void HAL_PWR_DeInit(void);
  263. void HAL_PWR_EnableBkUpAccess(void);
  264. void HAL_PWR_DisableBkUpAccess(void);
  265. /* Peripheral Control functions **********************************************/
  266. /* PVD configuration */
  267. void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
  268. void HAL_PWR_EnablePVD(void);
  269. void HAL_PWR_DisablePVD(void);
  270. /* WakeUp pins configuration */
  271. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  272. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  273. /* Low Power modes entry */
  274. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  275. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  276. void HAL_PWR_EnterSTANDBYMode(void);
  277. void HAL_PWR_PVD_IRQHandler(void);
  278. void HAL_PWR_PVDCallback(void);
  279. /**
  280. * @}
  281. */
  282. /**
  283. * @}
  284. */
  285. #ifdef __cplusplus
  286. }
  287. #endif
  288. #endif /* __STM32F4xx_HAL_PWR_H */
  289. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/