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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief Header file of PCD HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L4xx_HAL_PCD_H
  39. #define __STM32L4xx_HAL_PCD_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  44. defined(STM32L452xx) || defined(STM32L462xx) || \
  45. defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  46. defined(STM32L496xx) || defined(STM32L4A6xx)
  47. /* Includes ------------------------------------------------------------------*/
  48. #include "stm32l4xx_ll_usb.h"
  49. /** @addtogroup STM32L4xx_HAL_Driver
  50. * @{
  51. */
  52. /** @addtogroup PCD
  53. * @{
  54. */
  55. /* Exported types ------------------------------------------------------------*/
  56. /** @defgroup PCD_Exported_Types PCD Exported Types
  57. * @{
  58. */
  59. /**
  60. * @brief PCD State structure definition
  61. */
  62. typedef enum
  63. {
  64. HAL_PCD_STATE_RESET = 0x00,
  65. HAL_PCD_STATE_READY = 0x01,
  66. HAL_PCD_STATE_ERROR = 0x02,
  67. HAL_PCD_STATE_BUSY = 0x03,
  68. HAL_PCD_STATE_TIMEOUT = 0x04
  69. } PCD_StateTypeDef;
  70. /* Device LPM suspend state */
  71. typedef enum
  72. {
  73. LPM_L0 = 0x00, /* on */
  74. LPM_L1 = 0x01, /* LPM L1 sleep */
  75. LPM_L2 = 0x02, /* suspend */
  76. LPM_L3 = 0x03, /* off */
  77. }PCD_LPM_StateTypeDef;
  78. #if defined (USB)
  79. /**
  80. * @brief PCD double buffered endpoint direction
  81. */
  82. typedef enum
  83. {
  84. PCD_EP_DBUF_OUT,
  85. PCD_EP_DBUF_IN,
  86. PCD_EP_DBUF_ERR,
  87. }PCD_EP_DBUF_DIR;
  88. /**
  89. * @brief PCD endpoint buffer number
  90. */
  91. typedef enum
  92. {
  93. PCD_EP_NOBUF,
  94. PCD_EP_BUF0,
  95. PCD_EP_BUF1
  96. }PCD_EP_BUF_NUM;
  97. #endif /* USB */
  98. #if defined (USB_OTG_FS)
  99. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  100. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  101. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  102. #endif /* USB_OTG_FS */
  103. #if defined (USB)
  104. typedef USB_TypeDef PCD_TypeDef;
  105. typedef USB_CfgTypeDef PCD_InitTypeDef;
  106. typedef USB_EPTypeDef PCD_EPTypeDef;
  107. #endif /* USB */
  108. /**
  109. * @brief PCD Handle Structure definition
  110. */
  111. typedef struct
  112. {
  113. PCD_TypeDef *Instance; /*!< Register base address */
  114. PCD_InitTypeDef Init; /*!< PCD required parameters */
  115. __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */
  116. PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
  117. PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
  118. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  119. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  120. uint32_t Setup[12]; /*!< Setup packet buffer */
  121. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  122. uint32_t BESL;
  123. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  124. This parameter can be set to ENABLE or DISABLE */
  125. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  126. This parameter can be set to ENABLE or DISABLE */
  127. void *pData; /*!< Pointer to upper stack Handler */
  128. } PCD_HandleTypeDef;
  129. /**
  130. * @}
  131. */
  132. /* Include PCD HAL Extended module */
  133. #include "stm32l4xx_hal_pcd_ex.h"
  134. /* Exported constants --------------------------------------------------------*/
  135. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  136. * @{
  137. */
  138. /** @defgroup PCD_Speed PCD Speed
  139. * @{
  140. */
  141. #define PCD_SPEED_FULL 1
  142. /**
  143. * @}
  144. */
  145. /** @defgroup PCD_PHY_Module PCD PHY Module
  146. * @{
  147. */
  148. #define PCD_PHY_EMBEDDED 1
  149. /**
  150. * @}
  151. */
  152. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  153. * @{
  154. */
  155. #ifndef USBD_FS_TRDT_VALUE
  156. #define USBD_FS_TRDT_VALUE 5
  157. #endif /* USBD_FS_TRDT_VALUE */
  158. /**
  159. * @}
  160. */
  161. /**
  162. * @}
  163. */
  164. /* Exported macros -----------------------------------------------------------*/
  165. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  166. * @brief macros to handle interrupts and specific clock configurations
  167. * @{
  168. */
  169. #if defined (USB_OTG_FS)
  170. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  172. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  173. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  174. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
  175. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  176. ~(USB_OTG_PCGCCTL_STOPCLK)
  177. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  178. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
  179. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE
  180. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  181. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  182. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE
  183. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  184. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  185. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  186. } while(0)
  187. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  188. EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
  189. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  190. } while(0)
  191. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  192. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  193. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  194. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  195. EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  196. } while(0)
  197. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE)
  198. #endif /* USB_OTG_FS */
  199. #if defined (USB)
  200. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  201. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  202. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  203. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  204. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE
  205. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)
  206. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE)
  207. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE
  208. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  209. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  210. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  211. } while(0)
  212. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  213. EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\
  214. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  215. } while(0)
  216. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  217. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  218. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  219. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  220. EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\
  221. } while(0)
  222. #define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE)
  223. #endif /* USB */
  224. /**
  225. * @}
  226. */
  227. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  228. * @{
  229. */
  230. /* Initialization/de-initialization functions ********************************/
  231. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  232. * @{
  233. */
  234. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  235. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  236. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  237. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  238. /**
  239. * @}
  240. */
  241. /* I/O operation functions ***************************************************/
  242. /* Non-Blocking mode: Interrupt */
  243. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  244. * @{
  245. */
  246. /* Non-Blocking mode: Interrupt */
  247. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  248. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  250. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  251. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  252. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  253. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  254. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  255. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  256. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  257. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  258. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  259. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  260. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  261. /**
  262. * @}
  263. */
  264. /* Peripheral Control functions **********************************************/
  265. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  266. * @{
  267. */
  268. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  269. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  270. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  271. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  272. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  273. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  274. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  275. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  276. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  277. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  278. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  279. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  280. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  281. /**
  282. * @}
  283. */
  284. /* Peripheral State functions ************************************************/
  285. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  286. * @{
  287. */
  288. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  289. /**
  290. * @}
  291. */
  292. /**
  293. * @}
  294. */
  295. /* Private constants ---------------------------------------------------------*/
  296. /** @defgroup PCD_Private_Constants PCD Private Constants
  297. * @{
  298. */
  299. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  300. * @{
  301. */
  302. #if defined (USB_OTG_FS)
  303. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08)
  304. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C)
  305. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10)
  306. #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */
  307. #endif /* USB_OTG_FS */
  308. #if defined (USB)
  309. #define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */
  310. #endif /* USB */
  311. /**
  312. * @}
  313. */
  314. #if defined (USB)
  315. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  316. * @{
  317. */
  318. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  319. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  320. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  321. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  322. /**
  323. * @}
  324. */
  325. /** @defgroup PCD_ENDP PCD ENDP
  326. * @{
  327. */
  328. #define PCD_ENDP0 ((uint8_t)0)
  329. #define PCD_ENDP1 ((uint8_t)1)
  330. #define PCD_ENDP2 ((uint8_t)2)
  331. #define PCD_ENDP3 ((uint8_t)3)
  332. #define PCD_ENDP4 ((uint8_t)4)
  333. #define PCD_ENDP5 ((uint8_t)5)
  334. #define PCD_ENDP6 ((uint8_t)6)
  335. #define PCD_ENDP7 ((uint8_t)7)
  336. /**
  337. * @}
  338. */
  339. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  340. * @{
  341. */
  342. #define PCD_SNG_BUF 0
  343. #define PCD_DBL_BUF 1
  344. /**
  345. * @}
  346. */
  347. #endif /* USB */
  348. /**
  349. * @}
  350. */
  351. /* Private macros ------------------------------------------------------------*/
  352. /** @addtogroup PCD_Private_Macros PCD Private Macros
  353. * @{
  354. */
  355. #if defined (USB)
  356. /* SetENDPOINT */
  357. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
  358. /* GetENDPOINT */
  359. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2))
  360. /* ENDPOINT transfer */
  361. #define USB_EP0StartXfer USB_EPStartXfer
  362. /**
  363. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  364. * @param USBx: USB peripheral instance register address.
  365. * @param bEpNum: Endpoint Number.
  366. * @param wType: Endpoint Type.
  367. * @retval None
  368. */
  369. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  370. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  371. /**
  372. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  373. * @param USBx: USB peripheral instance register address.
  374. * @param bEpNum: Endpoint Number.
  375. * @retval Endpoint Type
  376. */
  377. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  378. /**
  379. * @brief free buffer used from the application realizing it to the line
  380. toggles bit SW_BUF in the double buffered endpoint register
  381. * @param USBx: USB peripheral instance register address.
  382. * @param bEpNum: Endpoint Number.
  383. * @param bDir: Direction
  384. * @retval None
  385. */
  386. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  387. {\
  388. if ((bDir) == PCD_EP_DBUF_OUT)\
  389. { /* OUT double buffered endpoint */\
  390. PCD_TX_DTOG((USBx), (bEpNum));\
  391. }\
  392. else if ((bDir) == PCD_EP_DBUF_IN)\
  393. { /* IN double buffered endpoint */\
  394. PCD_RX_DTOG((USBx), (bEpNum));\
  395. }\
  396. }
  397. /**
  398. * @brief gets direction of the double buffered endpoint
  399. * @param USBx: USB peripheral instance register address.
  400. * @param bEpNum: Endpoint Number.
  401. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  402. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  403. */
  404. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  405. {\
  406. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  407. return(PCD_EP_DBUF_OUT);\
  408. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  409. return(PCD_EP_DBUF_IN);\
  410. else\
  411. return(PCD_EP_DBUF_ERR);\
  412. }
  413. /**
  414. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  415. * @param USBx: USB peripheral instance register address.
  416. * @param bEpNum: Endpoint Number.
  417. * @param wState: new state
  418. * @retval None
  419. */
  420. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  421. \
  422. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  423. /* toggle first bit ? */ \
  424. if((USB_EPTX_DTOG1 & (wState))!= 0)\
  425. { \
  426. _wRegVal ^= USB_EPTX_DTOG1; \
  427. } \
  428. /* toggle second bit ? */ \
  429. if((USB_EPTX_DTOG2 & (wState))!= 0) \
  430. { \
  431. _wRegVal ^= USB_EPTX_DTOG2; \
  432. } \
  433. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  434. } /* PCD_SET_EP_TX_STATUS */
  435. /**
  436. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  437. * @param USBx: USB peripheral instance register address.
  438. * @param bEpNum: Endpoint Number.
  439. * @param wState: new state
  440. * @retval None
  441. */
  442. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  443. register uint16_t _wRegVal; \
  444. \
  445. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  446. /* toggle first bit ? */ \
  447. if((USB_EPRX_DTOG1 & (wState))!= 0) \
  448. { \
  449. _wRegVal ^= USB_EPRX_DTOG1; \
  450. } \
  451. /* toggle second bit ? */ \
  452. if((USB_EPRX_DTOG2 & (wState))!= 0) \
  453. { \
  454. _wRegVal ^= USB_EPRX_DTOG2; \
  455. } \
  456. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  457. } /* PCD_SET_EP_RX_STATUS */
  458. /**
  459. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  460. * @param USBx: USB peripheral instance register address.
  461. * @param bEpNum: Endpoint Number.
  462. * @param wStaterx: new state.
  463. * @param wStatetx: new state.
  464. * @retval None
  465. */
  466. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  467. register uint32_t _wRegVal; \
  468. \
  469. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  470. /* toggle first bit ? */ \
  471. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
  472. { \
  473. _wRegVal ^= USB_EPRX_DTOG1; \
  474. } \
  475. /* toggle second bit ? */ \
  476. if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
  477. { \
  478. _wRegVal ^= USB_EPRX_DTOG2; \
  479. } \
  480. /* toggle first bit ? */ \
  481. if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
  482. { \
  483. _wRegVal ^= USB_EPTX_DTOG1; \
  484. } \
  485. /* toggle second bit ? */ \
  486. if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
  487. { \
  488. _wRegVal ^= USB_EPTX_DTOG2; \
  489. } \
  490. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  491. } /* PCD_SET_EP_TXRX_STATUS */
  492. /**
  493. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  494. * /STAT_RX[1:0])
  495. * @param USBx: USB peripheral instance register address.
  496. * @param bEpNum: Endpoint Number.
  497. * @retval status
  498. */
  499. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  500. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  501. /**
  502. * @brief sets directly the VALID tx/rx-status into the endpoint register
  503. * @param USBx: USB peripheral instance register address.
  504. * @param bEpNum: Endpoint Number.
  505. * @retval None
  506. */
  507. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  508. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  509. /**
  510. * @brief checks stall condition in an endpoint.
  511. * @param USBx: USB peripheral instance register address.
  512. * @param bEpNum: Endpoint Number.
  513. * @retval TRUE = endpoint in stall condition.
  514. */
  515. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  516. == USB_EP_TX_STALL)
  517. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  518. == USB_EP_RX_STALL)
  519. /**
  520. * @brief set & clear EP_KIND bit.
  521. * @param USBx: USB peripheral instance register address.
  522. * @param bEpNum: Endpoint Number.
  523. * @retval None
  524. */
  525. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  526. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  527. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  528. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  529. /**
  530. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  531. * @param USBx: USB peripheral instance register address.
  532. * @param bEpNum: Endpoint Number.
  533. * @retval None
  534. */
  535. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  536. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  537. /**
  538. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  539. * @param USBx: USB peripheral instance register address.
  540. * @param bEpNum: Endpoint Number.
  541. * @retval None
  542. */
  543. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  544. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  545. /**
  546. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  547. * @param USBx: USB peripheral instance register address.
  548. * @param bEpNum: Endpoint Number.
  549. * @retval None
  550. */
  551. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  552. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
  553. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  554. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
  555. /**
  556. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  557. * @param USBx: USB peripheral instance register address.
  558. * @param bEpNum: Endpoint Number.
  559. * @retval None
  560. */
  561. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  562. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  563. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  564. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  565. /**
  566. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  567. * @param USBx: USB peripheral instance register address.
  568. * @param bEpNum: Endpoint Number.
  569. * @retval None
  570. */
  571. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
  572. { \
  573. PCD_RX_DTOG((USBx), (bEpNum)); \
  574. }
  575. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
  576. { \
  577. PCD_TX_DTOG((USBx), (bEpNum)); \
  578. }
  579. /**
  580. * @brief Sets address in an endpoint register.
  581. * @param USBx: USB peripheral instance register address.
  582. * @param bEpNum: Endpoint Number.
  583. * @param bAddr: Address.
  584. * @retval None
  585. */
  586. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  587. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  588. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  589. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400)))
  590. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400)))
  591. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400)))
  592. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400)))
  593. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  594. uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  595. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  596. }
  597. /**
  598. * @brief sets address of the tx/rx buffer.
  599. * @param USBx: USB peripheral instance register address.
  600. * @param bEpNum: Endpoint Number.
  601. * @param wAddr: address to be set (must be word aligned).
  602. * @retval None
  603. */
  604. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  605. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  606. /**
  607. * @brief Gets address of the tx/rx buffer.
  608. * @param USBx: USB peripheral instance register address.
  609. * @param bEpNum: Endpoint Number.
  610. * @retval address of the buffer.
  611. */
  612. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  613. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  614. /**
  615. * @brief Sets counter of rx buffer with no. of blocks.
  616. * @param dwReg: Register
  617. * @param wCount: Counter.
  618. * @param wNBlocks: no. of Blocks.
  619. * @retval None
  620. */
  621. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  622. (wNBlocks) = (wCount) >> 5;\
  623. if(((wCount) & 0x1f) == 0)\
  624. { \
  625. (wNBlocks)--;\
  626. } \
  627. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
  628. }/* PCD_CALC_BLK32 */
  629. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  630. (wNBlocks) = (wCount) >> 1;\
  631. if(((wCount) & 0x1) != 0)\
  632. { \
  633. (wNBlocks)++;\
  634. } \
  635. *pdwReg = (uint16_t)((wNBlocks) << 10);\
  636. }/* PCD_CALC_BLK2 */
  637. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  638. uint16_t wNBlocks;\
  639. if((wCount) > 62) \
  640. { \
  641. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  642. } \
  643. else \
  644. { \
  645. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  646. } \
  647. }/* PCD_SET_EP_CNT_RX_REG */
  648. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  649. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  650. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  651. }
  652. /**
  653. * @brief sets counter for the tx/rx buffer.
  654. * @param USBx: USB peripheral instance register address.
  655. * @param bEpNum: Endpoint Number.
  656. * @param wCount: Counter value.
  657. * @retval None
  658. */
  659. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  660. /**
  661. * @brief gets counter of the tx buffer.
  662. * @param USBx: USB peripheral instance register address.
  663. * @param bEpNum: Endpoint Number.
  664. * @retval Counter value
  665. */
  666. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
  667. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
  668. /**
  669. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  670. * @param USBx: USB peripheral instance register address.
  671. * @param bEpNum: Endpoint Number.
  672. * @param wBuf0Addr: buffer 0 address.
  673. * @retval Counter value
  674. */
  675. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  676. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  677. /**
  678. * @brief Sets addresses in a double buffer endpoint.
  679. * @param USBx: USB peripheral instance register address.
  680. * @param bEpNum: Endpoint Number.
  681. * @param wBuf0Addr: buffer 0 address.
  682. * @param wBuf1Addr = buffer 1 address.
  683. * @retval None
  684. */
  685. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  686. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  687. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  688. } /* PCD_SET_EP_DBUF_ADDR */
  689. /**
  690. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  691. * @param USBx: USB peripheral instance register address.
  692. * @param bEpNum: Endpoint Number.
  693. * @retval None
  694. */
  695. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  696. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  697. /**
  698. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  699. * @param USBx: USB peripheral instance register address.
  700. * @param bEpNum: Endpoint Number.
  701. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  702. * EP_DBUF_IN = IN
  703. * @param wCount: Counter value
  704. * @retval None
  705. */
  706. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  707. if((bDir) == PCD_EP_DBUF_OUT)\
  708. /* OUT endpoint */ \
  709. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  710. else if((bDir) == PCD_EP_DBUF_IN)\
  711. /* IN endpoint */ \
  712. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  713. } /* SetEPDblBuf0Count*/
  714. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  715. if((bDir) == PCD_EP_DBUF_OUT)\
  716. {/* OUT endpoint */ \
  717. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  718. } \
  719. else if((bDir) == PCD_EP_DBUF_IN)\
  720. {/* IN endpoint */ \
  721. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  722. } \
  723. } /* SetEPDblBuf1Count */
  724. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  725. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  726. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  727. } /* PCD_SET_EP_DBUF_CNT */
  728. /**
  729. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  730. * @param USBx: USB peripheral instance register address.
  731. * @param bEpNum: Endpoint Number.
  732. * @retval None
  733. */
  734. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  735. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  736. #endif /* USB */
  737. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  738. defined(STM32L452xx) || defined(STM32L462xx)
  739. /** @defgroup PCD_Instance_definition PCD Instance definition
  740. * @{
  741. */
  742. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  743. /**
  744. * @}
  745. */
  746. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  747. /* STM32L452xx || STM32L462xx */
  748. /**
  749. * @}
  750. */
  751. /**
  752. * @}
  753. */
  754. /**
  755. * @}
  756. */
  757. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  758. /* STM32L452xx || STM32L462xx || */
  759. /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
  760. /* STM32L496xx || STM32L4A6xx */
  761. #ifdef __cplusplus
  762. }
  763. #endif
  764. #endif /* __STM32L4xx_HAL_PCD_H */
  765. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/