jmg
/
stm32lib
1
0
Fork 0
Code Issues 0 Pull Requests 0 Releases 0 Wiki Activity
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
18 Commits
1 Branch
14 MiB
 
 
 
Tree: 8e37b3563a
Branches Tags
${ item.name }
Create branch ${ searchTerm }
from '8e37b3563a'
${ noResults }
stm32lib/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h

675 lines
29 KiB
Raw Blame History 

  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32h7xx_hal_dma2d.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of DMA2D HAL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.

  10.   * All rights reserved.</center></h2>

  11.   *

  12.   * This software component is licensed by ST under BSD 3-Clause license,

  13.   * the "License"; You may not use this file except in compliance with the

  14.   * License. You may obtain a copy of the License at:

  15.   *                        opensource.org/licenses/BSD-3-Clause

  16.   *

  17.   ******************************************************************************

  18.   */

  19. 

  20. /* Define to prevent recursive inclusion -------------------------------------*/

  21. #ifndef STM32H7xx_HAL_DMA2D_H

  22. #define STM32H7xx_HAL_DMA2D_H

  23. 

  24. #ifdef __cplusplus

  25.  extern "C" {

  26. #endif

  27. 

  28. /* Includes ------------------------------------------------------------------*/

  29. #include "stm32h7xx_hal_def.h"

  30. 

  31. /** @addtogroup STM32H7xx_HAL_Driver

  32.   * @{

  33.   */

  34. 

  35. /** @addtogroup DMA2D DMA2D

  36.   * @brief DMA2D HAL module driver

  37.   * @{

  38.   */

  39. 

  40. /* Exported types ------------------------------------------------------------*/

  41. /** @defgroup DMA2D_Exported_Types DMA2D Exported Types

  42.   * @{

  43.   */

  44. #define MAX_DMA2D_LAYER  2U  /*!< DMA2D maximum number of layers */

  45. 

  46. /**

  47.   * @brief DMA2D CLUT Structure definition

  48.   */

  49. typedef struct

  50. {

  51.   uint32_t *pCLUT;                  /*!< Configures the DMA2D CLUT memory address.*/

  52. 

  53.   uint32_t CLUTColorMode;           /*!< Configures the DMA2D CLUT color mode.

  54.                                          This parameter can be one value of @ref DMA2D_CLUT_CM. */

  55. 

  56.   uint32_t Size;                    /*!< Configures the DMA2D CLUT size.

  57.                                          This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/

  58. } DMA2D_CLUTCfgTypeDef;

  59. 

  60. /**

  61.   * @brief DMA2D Init structure definition

  62.   */

  63. typedef struct

  64. {

  65.   uint32_t             Mode;               /*!< Configures the DMA2D transfer mode.

  66.                                                 This parameter can be one value of @ref DMA2D_Mode. */

  67. 

  68.   uint32_t             ColorMode;          /*!< Configures the color format of the output image.

  69.                                                 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */

  70. 

  71.   uint32_t             OutputOffset;       /*!< Specifies the Offset value.

  72.                                                 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */

  73.   uint32_t             AlphaInverted;     /*!< Select regular or inverted alpha value for the output pixel format converter.

  74.                                                This parameter can be one value of @ref DMA2D_Alpha_Inverted. */

  75. 

  76.   uint32_t             RedBlueSwap;       /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR)

  77.                                                for the output pixel format converter.

  78.                                                This parameter can be one value of @ref DMA2D_RB_Swap. */

  79. 

  80. 

  81. 

  82. 

  83. } DMA2D_InitTypeDef;

  84. 

  85. 

  86. /**

  87.   * @brief DMA2D Layer structure definition

  88.   */

  89. typedef struct

  90. {

  91.   uint32_t             InputOffset;       /*!< Configures the DMA2D foreground or background offset.

  92.                                                This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */

  93. 

  94.   uint32_t             InputColorMode;    /*!< Configures the DMA2D foreground or background color mode.

  95.                                                This parameter can be one value of @ref DMA2D_Input_Color_Mode. */

  96. 

  97.   uint32_t             AlphaMode;         /*!< Configures the DMA2D foreground or background alpha mode.

  98.                                                This parameter can be one value of @ref DMA2D_Alpha_Mode. */

  99. 

  100.   uint32_t             InputAlpha;        /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.

  101.                                                This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.

  102.                                                @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between

  103.                                                Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where

  104.                                                - InputAlpha[24:31] is the alpha value ALPHA[0:7]

  105.                                                - InputAlpha[16:23] is the red value RED[0:7]

  106.                                                - InputAlpha[8:15] is the green value GREEN[0:7]

  107.                                                - InputAlpha[0:7] is the blue value BLUE[0:7]. */

  108.   uint32_t             AlphaInverted;     /*!< Select regular or inverted alpha value.

  109.                                                This parameter can be one value of @ref DMA2D_Alpha_Inverted. */

  110. 

  111.   uint32_t             RedBlueSwap;       /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR).

  112.                                                This parameter can be one value of @ref DMA2D_RB_Swap. */

  113. 

  114.   uint32_t             ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode

  115.                                                This parameter can be one value of @ref DMA2D_Chroma_Sub_Sampling */

  116. 

  117. } DMA2D_LayerCfgTypeDef;

  118. 

  119. /**

  120.   * @brief  HAL DMA2D State structures definition

  121.   */

  122. typedef enum

  123. {

  124.   HAL_DMA2D_STATE_RESET             = 0x00U,    /*!< DMA2D not yet initialized or disabled       */

  125.   HAL_DMA2D_STATE_READY             = 0x01U,    /*!< Peripheral Initialized and ready for use    */

  126.   HAL_DMA2D_STATE_BUSY              = 0x02U,    /*!< An internal process is ongoing              */

  127.   HAL_DMA2D_STATE_TIMEOUT           = 0x03U,    /*!< Timeout state                               */

  128.   HAL_DMA2D_STATE_ERROR             = 0x04U,    /*!< DMA2D state error                           */

  129.   HAL_DMA2D_STATE_SUSPEND           = 0x05U     /*!< DMA2D process is suspended                  */

  130. }HAL_DMA2D_StateTypeDef;

  131. 

  132. /**

  133.   * @brief  DMA2D handle Structure definition

  134.   */

  135. typedef struct __DMA2D_HandleTypeDef

  136. {

  137.   DMA2D_TypeDef               *Instance;                                                    /*!< DMA2D register base address.               */

  138. 

  139.   DMA2D_InitTypeDef           Init;                                                         /*!< DMA2D communication parameters.            */

  140. 

  141.   void                        (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d);  /*!< DMA2D transfer complete callback.          */

  142. 

  143.   void                        (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback.             */

  144. 

  145. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  146.   void                        (* LineEventCallback)( struct __DMA2D_HandleTypeDef * hdma2d);   /*!< DMA2D line event callback.      */

  147. 

  148.   void                        (* CLUTLoadingCpltCallback)( struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D CLUT loading completion callback. */

  149. 

  150.   void                        (* MspInitCallback)( struct __DMA2D_HandleTypeDef * hdma2d);   /*!< DMA2D Msp Init callback.          */

  151. 

  152.   void                        (* MspDeInitCallback)( struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D Msp DeInit callback.        */

  153. 

  154. #endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */

  155. 

  156.   DMA2D_LayerCfgTypeDef       LayerCfg[MAX_DMA2D_LAYER];                                    /*!< DMA2D Layers parameters           */

  157. 

  158.   HAL_LockTypeDef             Lock;                                                         /*!< DMA2D lock.                                */

  159. 

  160.   __IO HAL_DMA2D_StateTypeDef State;                                                        /*!< DMA2D transfer state.                      */

  161. 

  162.   __IO uint32_t               ErrorCode;                                                    /*!< DMA2D error code.                          */

  163. } DMA2D_HandleTypeDef;

  164. 

  165. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  166. /**

  167.   * @brief  HAL DMA2D Callback pointer definition

  168.   */

  169. typedef  void (*pDMA2D_CallbackTypeDef)(DMA2D_HandleTypeDef * hdma2d); /*!< Pointer to a DMA2D common callback function */

  170. #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */

  171. /**

  172.   * @}

  173.   */

  174. 

  175. /* Exported constants --------------------------------------------------------*/

  176. /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants

  177.   * @{

  178.   */

  179. 

  180. /** @defgroup DMA2D_Error_Code DMA2D Error Code

  181.   * @{

  182.   */

  183. #define HAL_DMA2D_ERROR_NONE        0x00000000U  /*!< No error             */

  184. #define HAL_DMA2D_ERROR_TE          0x00000001U  /*!< Transfer error       */

  185. #define HAL_DMA2D_ERROR_CE          0x00000002U  /*!< Configuration error  */

  186. #define HAL_DMA2D_ERROR_CAE         0x00000004U  /*!< CLUT access error    */

  187. #define HAL_DMA2D_ERROR_TIMEOUT     0x00000020U  /*!< Timeout error        */

  188. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  189. #define HAL_DMA2D_ERROR_INVALID_CALLBACK 0x00000040U  /*!< Invalid callback error  */

  190. #endif /* USE_HAL_UART_REGISTER_CALLBACKS */

  191. 

  192. /**

  193.   * @}

  194.   */

  195. 

  196. /** @defgroup DMA2D_Mode DMA2D Mode

  197.   * @{

  198.   */

  199. #define DMA2D_M2M                   0x00000000U                         /*!< DMA2D memory to memory transfer mode */

  200. #define DMA2D_M2M_PFC               DMA2D_CR_MODE_0                     /*!< DMA2D memory to memory with pixel format conversion transfer mode */

  201. #define DMA2D_M2M_BLEND             DMA2D_CR_MODE_1                     /*!< DMA2D memory to memory with blending transfer mode */

  202. #define DMA2D_R2M                   DMA2D_CR_MODE            /*!< DMA2D register to memory transfer mode */

  203. /**

  204.   * @}

  205.   */

  206. 

  207. /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode

  208.   * @{

  209.   */

  210. #define DMA2D_OUTPUT_ARGB8888       0x00000000U                           /*!< ARGB8888 DMA2D color mode */

  211. #define DMA2D_OUTPUT_RGB888         DMA2D_OPFCCR_CM_0                     /*!< RGB888 DMA2D color mode   */

  212. #define DMA2D_OUTPUT_RGB565         DMA2D_OPFCCR_CM_1                     /*!< RGB565 DMA2D color mode   */

  213. #define DMA2D_OUTPUT_ARGB1555       (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */

  214. #define DMA2D_OUTPUT_ARGB4444       DMA2D_OPFCCR_CM_2                     /*!< ARGB4444 DMA2D color mode */

  215. /**

  216.   * @}

  217.   */

  218. 

  219. /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode

  220.   * @{

  221.   */

  222. #define DMA2D_INPUT_ARGB8888        0x00000000U  /*!< ARGB8888 color mode */

  223. #define DMA2D_INPUT_RGB888          0x00000001U  /*!< RGB888 color mode   */

  224. #define DMA2D_INPUT_RGB565          0x00000002U  /*!< RGB565 color mode   */

  225. #define DMA2D_INPUT_ARGB1555        0x00000003U  /*!< ARGB1555 color mode */

  226. #define DMA2D_INPUT_ARGB4444        0x00000004U  /*!< ARGB4444 color mode */

  227. #define DMA2D_INPUT_L8              0x00000005U  /*!< L8 color mode       */

  228. #define DMA2D_INPUT_AL44            0x00000006U  /*!< AL44 color mode     */

  229. #define DMA2D_INPUT_AL88            0x00000007U  /*!< AL88 color mode     */

  230. #define DMA2D_INPUT_L4              0x00000008U  /*!< L4 color mode       */

  231. #define DMA2D_INPUT_A8              0x00000009U  /*!< A8 color mode       */

  232. #define DMA2D_INPUT_A4              0x0000000AU  /*!< A4 color mode       */

  233. #define DMA2D_INPUT_YCBCR           0x0000000BU  /*!< YCbCr color mode */

  234. /**

  235.   * @}

  236.   */

  237. 

  238. /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode

  239.   * @{

  240.   */

  241. #define DMA2D_NO_MODIF_ALPHA        0x00000000U  /*!< No modification of the alpha channel value */

  242. #define DMA2D_REPLACE_ALPHA         0x00000001U  /*!< Replace original alpha channel value by programmed alpha value */

  243. #define DMA2D_COMBINE_ALPHA         0x00000002U  /*!< Replace original alpha channel value by programmed alpha value

  244.                                                                 with original alpha channel value                              */

  245. /**

  246.   * @}

  247.   */

  248. 

  249. /** @defgroup DMA2D_Alpha_Inverted DMA2D Alpha Inversion

  250.   * @{

  251.   */

  252. #define DMA2D_REGULAR_ALPHA         0x00000000U  /*!< No modification of the alpha channel value */

  253. #define DMA2D_INVERTED_ALPHA        0x00000001U  /*!< Invert the alpha channel value */

  254. /**

  255.   * @}

  256.   */

  257. 

  258. /** @defgroup DMA2D_RB_Swap DMA2D Red and Blue Swap

  259.   * @{

  260.   */

  261. #define DMA2D_RB_REGULAR            0x00000000U  /*!< Select regular mode (RGB or ARGB) */

  262. #define DMA2D_RB_SWAP               0x00000001U  /*!< Select swap mode (BGR or ABGR) */

  263. /**

  264.   * @}

  265.   */

  266. 

  267. 

  268. 

  269. 

  270. 

  271. /** @defgroup DMA2D_Chroma_Sub_Sampling DMA2D Chroma Sub Sampling

  272.   * @{

  273.   */

  274. #define DMA2D_NO_CSS               0x00000000U  /*!< No chroma sub-sampling 4:4:4 */

  275. #define DMA2D_CSS_422              0x00000001U  /*!< chroma sub-sampling 4:2:2 */

  276. #define DMA2D_CSS_420              0x00000002U  /*!< chroma sub-sampling 4:2:0 */

  277. /**

  278.   * @}

  279.   */

  280. 

  281. /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode

  282.   * @{

  283.   */

  284. #define DMA2D_CCM_ARGB8888          0x00000000U  /*!< ARGB8888 DMA2D CLUT color mode */

  285. #define DMA2D_CCM_RGB888            0x00000001U  /*!< RGB888 DMA2D CLUT color mode   */

  286. /**

  287.   * @}

  288.   */

  289. 

  290. /** @defgroup DMA2D_Interrupts DMA2D Interrupts

  291.   * @{

  292.   */

  293. #define DMA2D_IT_CE                 DMA2D_CR_CEIE            /*!< Configuration Error Interrupt */

  294. #define DMA2D_IT_CTC                DMA2D_CR_CTCIE           /*!< CLUT Transfer Complete Interrupt */

  295. #define DMA2D_IT_CAE                DMA2D_CR_CAEIE           /*!< CLUT Access Error Interrupt */

  296. #define DMA2D_IT_TW                 DMA2D_CR_TWIE            /*!< Transfer Watermark Interrupt */

  297. #define DMA2D_IT_TC                 DMA2D_CR_TCIE            /*!< Transfer Complete Interrupt */

  298. #define DMA2D_IT_TE                 DMA2D_CR_TEIE            /*!< Transfer Error Interrupt */

  299. /**

  300.   * @}

  301.   */

  302. 

  303. /** @defgroup DMA2D_Flags DMA2D Flags

  304.   * @{

  305.   */

  306. #define DMA2D_FLAG_CE               DMA2D_ISR_CEIF           /*!< Configuration Error Interrupt Flag */

  307. #define DMA2D_FLAG_CTC              DMA2D_ISR_CTCIF          /*!< CLUT Transfer Complete Interrupt Flag */

  308. #define DMA2D_FLAG_CAE              DMA2D_ISR_CAEIF          /*!< CLUT Access Error Interrupt Flag */

  309. #define DMA2D_FLAG_TW               DMA2D_ISR_TWIF           /*!< Transfer Watermark Interrupt Flag */

  310. #define DMA2D_FLAG_TC               DMA2D_ISR_TCIF           /*!< Transfer Complete Interrupt Flag */

  311. #define DMA2D_FLAG_TE               DMA2D_ISR_TEIF           /*!< Transfer Error Interrupt Flag */

  312. /**

  313.   * @}

  314.   */

  315. 

  316. /** @defgroup DMA2D_Aliases DMA2D API Aliases

  317.   * @{

  318.   */

  319. #define HAL_DMA2D_DisableCLUT       HAL_DMA2D_CLUTLoading_Abort    /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */

  320. /**

  321.   * @}

  322.   */

  323. 

  324. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  325. /**

  326.   * @brief  HAL DMA2D common Callback ID enumeration definition

  327.   */

  328. typedef enum

  329. {

  330.   HAL_DMA2D_MSPINIT_CB_ID           = 0x00U,    /*!< DMA2D MspInit callback ID                 */

  331.   HAL_DMA2D_MSPDEINIT_CB_ID         = 0x01U,    /*!< DMA2D MspDeInit callback ID               */

  332.   HAL_DMA2D_TRANSFERCOMPLETE_CB_ID  = 0x02U,    /*!< DMA2D transfer complete callback ID       */

  333.   HAL_DMA2D_TRANSFERERROR_CB_ID     = 0x03U,    /*!< DMA2D transfer error callback ID          */

  334.   HAL_DMA2D_LINEEVENT_CB_ID         = 0x04U,    /*!< DMA2D line event callback ID              */

  335.   HAL_DMA2D_CLUTLOADINGCPLT_CB_ID   = 0x05U,    /*!< DMA2D CLUT loading completion callback ID */

  336. }HAL_DMA2D_CallbackIDTypeDef;

  337. #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */

  338. 

  339. 

  340. /**

  341.   * @}

  342.   */

  343. /* Exported macros ------------------------------------------------------------*/

  344. /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros

  345.   * @{

  346.   */

  347. 

  348. /** @brief Reset DMA2D handle state

  349.   * @param  __HANDLE__ specifies the DMA2D handle.

  350.   * @retval None

  351.   */

  352. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  353. #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) do{                                            \

  354.                                                       (__HANDLE__)->State = HAL_DMA2D_STATE_RESET;\

  355.                                                       (__HANDLE__)->MspInitCallback = NULL;       \

  356.                                                       (__HANDLE__)->MspDeInitCallback = NULL;     \

  357.                                                      }while(0)

  358. #else

  359. #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)

  360. #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */

  361. 

  362. 

  363. /**

  364.   * @brief  Enable the DMA2D.

  365.   * @param  __HANDLE__ DMA2D handle

  366.   * @retval None.

  367.   */

  368. #define __HAL_DMA2D_ENABLE(__HANDLE__)        ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)

  369. 

  370. 

  371. /* Interrupt & Flag management */

  372. /**

  373.   * @brief  Get the DMA2D pending flags.

  374.   * @param  __HANDLE__ DMA2D handle

  375.   * @param  __FLAG__ flag to check.

  376.   *          This parameter can be any combination of the following values:

  377.   *            @arg DMA2D_FLAG_CE:  Configuration error flag

  378.   *            @arg DMA2D_FLAG_CTC: CLUT transfer complete flag

  379.   *            @arg DMA2D_FLAG_CAE: CLUT access error flag

  380.   *            @arg DMA2D_FLAG_TW:  Transfer Watermark flag

  381.   *            @arg DMA2D_FLAG_TC:  Transfer complete flag

  382.   *            @arg DMA2D_FLAG_TE:  Transfer error flag

  383.   * @retval The state of FLAG.

  384.   */

  385. #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))

  386. 

  387. /**

  388.   * @brief  Clear the DMA2D pending flags.

  389.   * @param  __HANDLE__ DMA2D handle

  390.   * @param  __FLAG__ specifies the flag to clear.

  391.   *          This parameter can be any combination of the following values:

  392.   *            @arg DMA2D_FLAG_CE:  Configuration error flag

  393.   *            @arg DMA2D_FLAG_CTC: CLUT transfer complete flag

  394.   *            @arg DMA2D_FLAG_CAE: CLUT access error flag

  395.   *            @arg DMA2D_FLAG_TW:  Transfer Watermark flag

  396.   *            @arg DMA2D_FLAG_TC:  Transfer complete flag

  397.   *            @arg DMA2D_FLAG_TE:  Transfer error flag

  398.   * @retval None

  399.   */

  400. #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))

  401. 

  402. /**

  403.   * @brief  Enable the specified DMA2D interrupts.

  404.   * @param  __HANDLE__ DMA2D handle

  405.   * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be enabled.

  406.   *          This parameter can be any combination of the following values:

  407.   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask

  408.   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask

  409.   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask

  410.   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask

  411.   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask

  412.   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask

  413.   * @retval None

  414.   */

  415. #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))

  416. 

  417. /**

  418.   * @brief  Disable the specified DMA2D interrupts.

  419.   * @param  __HANDLE__ DMA2D handle

  420.   * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be disabled.

  421.   *          This parameter can be any combination of the following values:

  422.   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask

  423.   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask

  424.   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask

  425.   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask

  426.   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask

  427.   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask

  428.   * @retval None

  429.   */

  430. #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))

  431. 

  432. /**

  433.   * @brief  Check whether the specified DMA2D interrupt source is enabled or not.

  434.   * @param  __HANDLE__ DMA2D handle

  435.   * @param  __INTERRUPT__ specifies the DMA2D interrupt source to check.

  436.   *          This parameter can be one of the following values:

  437.   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask

  438.   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask

  439.   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask

  440.   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask

  441.   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask

  442.   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask

  443.   * @retval The state of INTERRUPT source.

  444.   */

  445. #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))

  446. 

  447. /**

  448.   * @}

  449.   */

  450. 

  451. /* Exported functions --------------------------------------------------------*/

  452. /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions

  453.   * @{

  454.   */

  455. 

  456. /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions

  457.   * @{

  458.   */

  459. 

  460. /* Initialization and de-initialization functions *******************************/

  461. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);

  462. HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);

  463. void              HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);

  464. void              HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);

  465. /* Callbacks Register/UnRegister functions  ***********************************/

  466. #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)

  467. HAL_StatusTypeDef HAL_DMA2D_RegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID, pDMA2D_CallbackTypeDef pCallback);

  468. HAL_StatusTypeDef HAL_DMA2D_UnRegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID);

  469. #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */

  470. 

  471. /**

  472.   * @}

  473.   */

  474. 

  475. 

  476. /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions

  477.   * @{

  478.   */

  479. 

  480. /* IO operation functions *******************************************************/

  481. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);

  482. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width,  uint32_t Height);

  483. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);

  484. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);

  485. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);

  486. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);

  487. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);

  488. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);

  489. HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);

  490. HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);

  491. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);

  492. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);

  493. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);

  494. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);

  495. void              HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);

  496. void              HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);

  497. void              HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);

  498. 

  499. /**

  500.   * @}

  501.   */

  502. 

  503. /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions

  504.   * @{

  505.   */

  506. 

  507. /* Peripheral Control functions *************************************************/

  508. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);

  509. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);

  510. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);

  511. HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);

  512. HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);

  513. HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);

  514. 

  515. /**

  516.   * @}

  517.   */

  518. 

  519. /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions

  520.   * @{

  521.   */

  522. 

  523. /* Peripheral State functions ***************************************************/

  524. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);

  525. uint32_t               HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);

  526. 

  527. /**

  528.   * @}

  529.   */

  530. 

  531. /**

  532.   * @}

  533.   */

  534. 

  535. /* Private constants ---------------------------------------------------------*/

  536. 

  537. /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants

  538.   * @{

  539.   */

  540. 

  541. /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark

  542.   * @{

  543.   */

  544. #define DMA2D_LINE_WATERMARK_MAX            DMA2D_LWR_LW       /*!< DMA2D maximum line watermark */

  545. /**

  546.   * @}

  547.   */

  548. 

  549. /** @defgroup DMA2D_Color_Value DMA2D Color Value

  550.   * @{

  551.   */

  552. #define DMA2D_COLOR_VALUE                 0x000000FFU  /*!< Color value mask */

  553. /**

  554.   * @}

  555.   */

  556. 

  557. /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers

  558.   * @{

  559.   */

  560. #define DMA2D_MAX_LAYER         2U         /*!< DMA2D maximum number of layers */

  561. /**

  562.   * @}

  563.   */

  564. 

  565. /** @defgroup DMA2D_Layers DMA2D Layers

  566.   * @{

  567.   */

  568. #define DMA2D_BACKGROUND_LAYER             0x00000000U   /*!< DMA2D Background Layer (layer 0) */

  569. #define DMA2D_FOREGROUND_LAYER             0x00000001U   /*!< DMA2D Foreground Layer (layer 1) */

  570. /**

  571.   * @}

  572.   */

  573. 

  574. /** @defgroup DMA2D_Offset DMA2D Offset

  575.   * @{

  576.   */

  577. #define DMA2D_OFFSET                DMA2D_FGOR_LO            /*!< maximum Line Offset */

  578. /**

  579.   * @}

  580.   */

  581. 

  582. /** @defgroup DMA2D_Size DMA2D Size

  583.   * @{

  584.   */

  585. #define DMA2D_PIXEL                 (DMA2D_NLR_PL >> 16U)    /*!< DMA2D maximum number of pixels per line */

  586. #define DMA2D_LINE                  DMA2D_NLR_NL             /*!< DMA2D maximum number of lines           */

  587. /**

  588.   * @}

  589.   */

  590. 

  591. /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size

  592.   * @{

  593.   */

  594. #define DMA2D_CLUT_SIZE             (DMA2D_FGPFCCR_CS >> 8U)  /*!< DMA2D maximum CLUT size */

  595. /**

  596.   * @}

  597.   */

  598. 

  599. /**

  600.   * @}

  601.   */

  602. 

  603. 

  604. /* Private macros ------------------------------------------------------------*/

  605. /** @defgroup DMA2D_Private_Macros DMA2D Private Macros

  606.   * @{

  607.   */

  608. #define IS_DMA2D_LAYER(LAYER)                 (((LAYER) == DMA2D_BACKGROUND_LAYER) || ((LAYER) == DMA2D_FOREGROUND_LAYER))

  609. 

  610. #define IS_DMA2D_MODE(MODE)                   (((MODE) == DMA2D_M2M)       || ((MODE) == DMA2D_M2M_PFC) || \

  611.                                                ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))

  612. 

  613. #define IS_DMA2D_CMODE(MODE_ARGB)             (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888)   || \

  614.                                                ((MODE_ARGB) == DMA2D_OUTPUT_RGB565)   || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \

  615.                                                ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))

  616. 

  617. #define IS_DMA2D_COLOR(COLOR)                 ((COLOR) <= DMA2D_COLOR_VALUE)

  618. #define IS_DMA2D_LINE(LINE)                   ((LINE) <= DMA2D_LINE)

  619. #define IS_DMA2D_PIXEL(PIXEL)                 ((PIXEL) <= DMA2D_PIXEL)

  620. #define IS_DMA2D_OFFSET(OOFFSET)              ((OOFFSET) <= DMA2D_OFFSET)

  621. 

  622. #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM)   (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888)   || \

  623.                                                ((INPUT_CM) == DMA2D_INPUT_RGB565)   || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \

  624.                                                ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8)       || \

  625.                                                ((INPUT_CM) == DMA2D_INPUT_AL44)     || ((INPUT_CM) == DMA2D_INPUT_AL88)     || \

  626.                                                ((INPUT_CM) == DMA2D_INPUT_L4)       || ((INPUT_CM) == DMA2D_INPUT_A8)       || \

  627.                                                ((INPUT_CM) == DMA2D_INPUT_A4)       || ((INPUT_CM) == DMA2D_INPUT_YCBCR))

  628. 

  629. #define IS_DMA2D_ALPHA_MODE(AlphaMode)        (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \

  630.                                                ((AlphaMode) == DMA2D_REPLACE_ALPHA)  || \

  631.                                                ((AlphaMode) == DMA2D_COMBINE_ALPHA))

  632. 

  633. #define IS_DMA2D_ALPHA_INVERTED(Alpha_Inverted) (((Alpha_Inverted) == DMA2D_REGULAR_ALPHA) || \

  634.                                                  ((Alpha_Inverted) == DMA2D_INVERTED_ALPHA))

  635. 

  636. #define IS_DMA2D_RB_SWAP(RB_Swap) (((RB_Swap) == DMA2D_RB_REGULAR) || \

  637.                                    ((RB_Swap) == DMA2D_RB_SWAP))

  638. 

  639. 

  640. 

  641. #define IS_DMA2D_CHROMA_SUB_SAMPLING(CSS) (((CSS) == DMA2D_NO_CSS)  || \

  642.                                            ((CSS) == DMA2D_CSS_422) || \

  643.                                            ((CSS) == DMA2D_CSS_420))

  644. 

  645. #define IS_DMA2D_CLUT_CM(CLUT_CM)             (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))

  646. #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE)         ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)

  647. #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)

  648. #define IS_DMA2D_IT(IT)                       (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \

  649.                                                ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \

  650.                                                ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))

  651. #define IS_DMA2D_GET_FLAG(FLAG)               (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \

  652.                                                ((FLAG) == DMA2D_FLAG_TW)   || ((FLAG) == DMA2D_FLAG_TC)  || \

  653.                                                ((FLAG) == DMA2D_FLAG_TE)   || ((FLAG) == DMA2D_FLAG_CE))

  654. /**

  655.   * @}

  656.   */

  657. 

  658. /**

  659.   * @}

  660.   */

  661. 

  662. /**

  663.   * @}

  664.   */

  665. 

  666. 

  667. #ifdef __cplusplus

  668. }

  669. #endif

  670. 

  671. #endif /* STM32H7xx_HAL_DMA2D_H */

  672. 

  673. 

  674. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/