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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_pwr_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL Extension module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32H7xx_HAL_PWR_EX_H
  21. #define STM32H7xx_HAL_PWR_EX_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32h7xx_hal_def.h"
  27. /** @addtogroup STM32H7xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PWREx
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PWREx_Exported_Types PWREx Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PWREx AVD configuration structure definition
  39. */
  40. typedef struct
  41. {
  42. uint32_t AVDLevel; /*!< AVDLevel: Specifies the AVD detection level.
  43. This parameter can be a value of @ref PWREx_AVD_detection_level */
  44. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  45. This parameter can be a value of @ref PWREx_AVD_Mode */
  46. }PWREx_AVDTypeDef;
  47. /**
  48. * @brief PWREx Wakeup pin configuration structure definition
  49. */
  50. typedef struct
  51. {
  52. uint32_t WakeUpPin; /*!< WakeUpPin: Specifies the Wake-Up pin to be enabled.
  53. This parameter can be a value of @ref PWREx_WakeUp_Pins */
  54. uint32_t PinPolarity; /*!< PinPolarity: Specifies the Wake-Up pin polarity.
  55. This parameter can be a value of @ref PWREx_PIN_Polarity */
  56. uint32_t PinPull; /*!< PinPull: Specifies the Wake-Up pin pull.
  57. This parameter can be a value of @ref PWREx_PIN_Pull */
  58. }PWREx_WakeupPinTypeDef;
  59. /**
  60. * @}
  61. */
  62. /* Exported constants --------------------------------------------------------*/
  63. /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
  64. * @{
  65. */
  66. /** @defgroup PWREx_WakeUp_Pins PWREx Wake-Up Pins
  67. * @{
  68. */
  69. #define PWR_WAKEUP_PIN6 PWR_WKUPEPR_WKUPEN6
  70. #define PWR_WAKEUP_PIN5 PWR_WKUPEPR_WKUPEN5
  71. #define PWR_WAKEUP_PIN4 PWR_WKUPEPR_WKUPEN4
  72. #define PWR_WAKEUP_PIN3 PWR_WKUPEPR_WKUPEN3
  73. #define PWR_WAKEUP_PIN2 PWR_WKUPEPR_WKUPEN2
  74. #define PWR_WAKEUP_PIN1 PWR_WKUPEPR_WKUPEN1
  75. /* High level and No pull */
  76. #define PWR_WAKEUP_PIN6_HIGH PWR_WKUPEPR_WKUPEN6
  77. #define PWR_WAKEUP_PIN5_HIGH PWR_WKUPEPR_WKUPEN5
  78. #define PWR_WAKEUP_PIN4_HIGH PWR_WKUPEPR_WKUPEN4
  79. #define PWR_WAKEUP_PIN3_HIGH PWR_WKUPEPR_WKUPEN3
  80. #define PWR_WAKEUP_PIN2_HIGH PWR_WKUPEPR_WKUPEN2
  81. #define PWR_WAKEUP_PIN1_HIGH PWR_WKUPEPR_WKUPEN1
  82. /* Low level and No pull */
  83. #define PWR_WAKEUP_PIN6_LOW (uint32_t)(PWR_WKUPEPR_WKUPP6 | PWR_WKUPEPR_WKUPEN6)
  84. #define PWR_WAKEUP_PIN5_LOW (uint32_t)(PWR_WKUPEPR_WKUPP5 | PWR_WKUPEPR_WKUPEN5)
  85. #define PWR_WAKEUP_PIN4_LOW (uint32_t)(PWR_WKUPEPR_WKUPP4 | PWR_WKUPEPR_WKUPEN4)
  86. #define PWR_WAKEUP_PIN3_LOW (uint32_t)(PWR_WKUPEPR_WKUPP3 | PWR_WKUPEPR_WKUPEN3)
  87. #define PWR_WAKEUP_PIN2_LOW (uint32_t)(PWR_WKUPEPR_WKUPP2 | PWR_WKUPEPR_WKUPEN2)
  88. #define PWR_WAKEUP_PIN1_LOW (uint32_t)(PWR_WKUPEPR_WKUPP1 | PWR_WKUPEPR_WKUPEN1)
  89. /**
  90. * @}
  91. */
  92. /** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration
  93. * @{
  94. */
  95. #define PWR_PIN_POLARITY_HIGH ((uint32_t)0x00000000U)
  96. #define PWR_PIN_POLARITY_LOW ((uint32_t)0x00000001U)
  97. /**
  98. * @}
  99. */
  100. /** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration
  101. * @{
  102. */
  103. #define PWR_PIN_NO_PULL ((uint32_t)0x00000000U)
  104. #define PWR_PIN_PULL_UP ((uint32_t)0x00000001U)
  105. #define PWR_PIN_PULL_DOWN ((uint32_t)0x00000002U)
  106. /**
  107. * @}
  108. */
  109. /** @defgroup PWREx_Wakeup_Pins_Flags PWREx Wakeup Pins Flags.
  110. * @{
  111. */
  112. #define PWR_WAKEUP_FLAG1 PWR_WKUPFR_WKUPF1 /*!< Wakeup event on pin 1 */
  113. #define PWR_WAKEUP_FLAG2 PWR_WKUPFR_WKUPF2 /*!< Wakeup event on pin 2 */
  114. #define PWR_WAKEUP_FLAG3 PWR_WKUPFR_WKUPF3 /*!< Wakeup event on pin 3 */
  115. #define PWR_WAKEUP_FLAG4 PWR_WKUPFR_WKUPF4 /*!< Wakeup event on pin 4 */
  116. #define PWR_WAKEUP_FLAG5 PWR_WKUPFR_WKUPF5 /*!< Wakeup event on pin 5 */
  117. #define PWR_WAKEUP_FLAG6 PWR_WKUPFR_WKUPF6 /*!< Wakeup event on pin 6 */
  118. /**
  119. * @}
  120. */
  121. #if defined(DUAL_CORE)
  122. /** @defgroup PWREx_Core_Select PWREx Core definition
  123. * @{
  124. */
  125. #define PWR_CORE_CPU1 ((uint32_t)0x00000000U)
  126. #define PWR_CORE_CPU2 ((uint32_t)0x00000001U)
  127. /**
  128. * @}
  129. */
  130. #endif /*DUAL_CORE*/
  131. /** @defgroup PWREx_Domains PWREx Domains definition
  132. * @{
  133. */
  134. #define PWR_D1_DOMAIN ((uint32_t)0x00000000U)
  135. #define PWR_D2_DOMAIN ((uint32_t)0x00000001U)
  136. #define PWR_D3_DOMAIN ((uint32_t)0x00000002U)
  137. /**
  138. * @}
  139. */
  140. /** @defgroup PWREx_Domain_Flags PWREx Domain Flags definition
  141. * @{
  142. */
  143. #if defined(DUAL_CORE)
  144. #define PWR_D1_DOMAIN_FLAGS ((uint32_t)0x00000000U)
  145. #define PWR_D2_DOMAIN_FLAGS ((uint32_t)0x00000001U)
  146. #else
  147. #define PWR_CPU_FLAGS ((uint32_t)0x00000000U)
  148. #endif /*DUAL_CORE*/
  149. /**
  150. * @}
  151. */
  152. /** @defgroup PWREx_D3_State PWREx D3 Domain State
  153. * @{
  154. */
  155. #define PWR_D3_DOMAIN_STOP ((uint32_t)0x00000000U)
  156. #define PWR_D3_DOMAIN_RUN ((uint32_t)0x00000800U)
  157. /**
  158. * @}
  159. */
  160. /** @defgroup PWREx_Supply_configuration PWREx Supply configuration
  161. * @{
  162. */
  163. #define PWR_LDO_SUPPLY PWR_CR3_LDOEN /*!< Core domains are suppplied from the LDO */
  164. #if defined(SMPS)
  165. #define PWR_DIRECT_SMPS_SUPPLY PWR_CR3_SMPSEN /*!< Core domains are suppplied from the SMPS only */
  166. #define PWR_SMPS_1V8_SUPPLIES_LDO (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN) /*!< The SMPS 1.8V output supplies the LDO which supplies the Core domains */
  167. #define PWR_SMPS_2V5_SUPPLIES_LDO (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN) /*!< The SMPS 2.5V output supplies the LDO which supplies the Core domains */
  168. #define PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN) /*!< The SMPS 1.8V output supplies an external circuits and the LDO. The Core domains are suppplied from the LDO */
  169. #define PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN) /*!< The SMPS 2.5V output supplies an external circuits and the LDO. The Core domains are suppplied from the LDO */
  170. #define PWR_SMPS_1V8_SUPPLIES_EXT (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS) /*!< The SMPS 1.8V output supplies an external source which supplies the Core domains */
  171. #define PWR_SMPS_2V5_SUPPLIES_EXT (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS) /*!< The SMPS 2.5V output supplies an external source which supplies the Core domains */
  172. #endif /* SMPS */
  173. #define PWR_EXTERNAL_SOURCE_SUPPLY PWR_CR3_BYPASS /*!< The SMPS disabled and the LDO Bypass. The Core domains are supplied from an external source */
  174. #if defined(SMPS)
  175. #define PWR_SUPPLY_CONFIG_MASK (PWR_CR3_SMPSLEVEL | PWR_CR3_SMPSEXTHP | \
  176. PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)
  177. #else
  178. #define PWR_SUPPLY_CONFIG_MASK (PWR_CR3_SCUEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)
  179. #endif /* SMPS */
  180. /**
  181. * @}
  182. */
  183. /** @defgroup PWREx_AVD_detection_level PWREx AVD detection level
  184. * @{
  185. */
  186. #define PWR_AVDLEVEL_0 PWR_CR1_ALS_LEV0
  187. #define PWR_AVDLEVEL_1 PWR_CR1_ALS_LEV1
  188. #define PWR_AVDLEVEL_2 PWR_CR1_ALS_LEV2
  189. #define PWR_AVDLEVEL_3 PWR_CR1_ALS_LEV3
  190. /**
  191. * @}
  192. */
  193. /** @defgroup PWREx_AVD_Mode PWREx AVD Mode
  194. * @{
  195. */
  196. #define PWR_AVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Basic mode is used */
  197. #define PWR_AVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
  198. #define PWR_AVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
  199. #define PWR_AVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  200. #define PWR_AVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
  201. #define PWR_AVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
  202. #define PWR_AVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
  203. /**
  204. * @}
  205. */
  206. /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
  207. * @{
  208. */
  209. #define PWR_REGULATOR_SVOS_SCALE5 (PWR_CR1_SVOS_0)
  210. #define PWR_REGULATOR_SVOS_SCALE4 (PWR_CR1_SVOS_1)
  211. #define PWR_REGULATOR_SVOS_SCALE3 (uint32_t)(PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)
  212. /**
  213. * @}
  214. */
  215. /** @defgroup PWREx_VBAT_Battery_Charging_Resistor PWR battery charging resistor selection
  216. * @{
  217. */
  218. #define PWR_BATTERY_CHARGING_RESISTOR_5 ((uint32_t)0x00000000U) /*!< VBAT charging through a 5 kOhms resistor */
  219. #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR3_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */
  220. /**
  221. * @}
  222. */
  223. /** @defgroup PWREx_VBAT_Thresholds PWREx VBAT Thresholds
  224. * @{
  225. */
  226. #define PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD ((uint32_t)0x00000000U)
  227. #define PWR_VBAT_BELOW_LOW_THRESHOLD PWR_CR2_VBATL
  228. #define PWR_VBAT_ABOVE_HIGH_THRESHOLD PWR_CR2_VBATH
  229. /**
  230. * @}
  231. */
  232. /** @defgroup PWREx_TEMP_Thresholds PWREx Temperature Thresholds
  233. * @{
  234. */
  235. #define PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD ((uint32_t)0x00000000U)
  236. #define PWR_TEMP_BELOW_LOW_THRESHOLD PWR_CR2_TEMPL
  237. #define PWR_TEMP_ABOVE_HIGH_THRESHOLD PWR_CR2_TEMPH
  238. /**
  239. * @}
  240. */
  241. /** @defgroup PWREx_AVD_EXTI_Line PWREx AVD EXTI Line 16
  242. * @{
  243. */
  244. #define PWR_EXTI_LINE_AVD ((uint32_t)EXTI_IMR1_IM16) /*!< External interrupt line 16 Connected to the AVD EXTI Line */
  245. /**
  246. * @}
  247. */
  248. /**
  249. * @}
  250. */
  251. /* Exported macro ------------------------------------------------------------*/
  252. /** @defgroup PWREx_Exported_Macro PWREx Exported Macro
  253. * @{
  254. */
  255. /**
  256. * @brief Enable the AVD EXTI Line 16.
  257. * @retval None.
  258. */
  259. #define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
  260. #if defined(DUAL_CORE)
  261. /**
  262. * @brief Enable the AVD EXTI D2 Line 16.
  263. * @retval None.
  264. */
  265. #define __HAL_PWR_AVD_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, PWR_EXTI_LINE_AVD)
  266. #endif /*DUAL_CORE*/
  267. /**
  268. * @brief Disable the AVD EXTI Line 16
  269. * @retval None.
  270. */
  271. #define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
  272. #if defined(DUAL_CORE)
  273. /**
  274. * @brief Disable the AVD EXTI D2 Line 16.
  275. * @retval None.
  276. */
  277. #define __HAL_PWR_AVD_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, PWR_EXTI_LINE_AVD)
  278. #endif /*DUAL_CORE*/
  279. /**
  280. * @brief Enable event on AVD EXTI Line 16.
  281. * @retval None.
  282. */
  283. #define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
  284. #if defined(DUAL_CORE)
  285. /**
  286. * @brief Enable event on AVD EXTI D2 Line 16.
  287. * @retval None.
  288. */
  289. #define __HAL_PWR_AVD_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, PWR_EXTI_LINE_AVD)
  290. #endif /*DUAL_CORE*/
  291. /**
  292. * @brief Disable event on AVD EXTI Line 16.
  293. * @retval None.
  294. */
  295. #define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
  296. #if defined(DUAL_CORE)
  297. /**
  298. * @brief Disable event on AVD EXTI D2 Line 16.
  299. * @retval None.
  300. */
  301. #define __HAL_PWR_AVD_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, PWR_EXTI_LINE_AVD)
  302. #endif /*DUAL_CORE*/
  303. /**
  304. * @brief Enable the AVD Extended Interrupt Rising Trigger.
  305. * @retval None.
  306. */
  307. #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
  308. /**
  309. * @brief Disable the AVD Extended Interrupt Rising Trigger.
  310. * @retval None.
  311. */
  312. #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
  313. /**
  314. * @brief Enable the AVD Extended Interrupt Falling Trigger.
  315. * @retval None.
  316. */
  317. #define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
  318. /**
  319. * @brief Disable the AVD Extended Interrupt Falling Trigger.
  320. * @retval None.
  321. */
  322. #define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
  323. /**
  324. * @brief AVD EXTI line configuration: set rising & falling edge trigger.
  325. * @retval None.
  326. */
  327. #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
  328. __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \
  329. __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \
  330. } while(0);
  331. /**
  332. * @brief Disable the AVD Extended Interrupt Rising & Falling Trigger.
  333. * @retval None.
  334. */
  335. #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  336. do { \
  337. __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \
  338. __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \
  339. } while(0);
  340. /**
  341. * @brief Check whether the specified AVD EXTI interrupt flag is set or not.
  342. * @retval EXTI AVD Line Status.
  343. */
  344. #define __HAL_PWR_AVD_EXTI_GET_FLAG() ((READ_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD) == PWR_EXTI_LINE_AVD) ? SET : RESET)
  345. #if defined(DUAL_CORE)
  346. /**
  347. * @brief Check whether the specified AVD EXTI D2 interrupt flag is set or not.
  348. * @retval EXTI D2 AVD Line Status.
  349. */
  350. #define __HAL_PWR_AVD_EXTID2_GET_FLAG() ((READ_BIT(EXTI_D2->PR1, PWR_EXTI_LINE_AVD) == PWR_EXTI_LINE_AVD) ? SET : RESET)
  351. #endif /*DUAL_CORE*/
  352. /**
  353. * @brief Clear the AVD EXTI flag.
  354. * @retval None.
  355. */
  356. #define __HAL_PWR_AVD_EXTI_CLEAR_FLAG() SET_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD)
  357. #if defined(DUAL_CORE)
  358. /**
  359. * @brief Clear the AVD EXTI D2 flag.
  360. * @retval None.
  361. */
  362. #define __HAL_PWR_AVD_EXTID2_CLEAR_FLAG() SET_BIT(EXTI_D2->PR1, PWR_EXTI_LINE_AVD)
  363. #endif /*DUAL_CORE*/
  364. /**
  365. * @}
  366. */
  367. /* Exported functions --------------------------------------------------------*/
  368. /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
  369. * @{
  370. */
  371. /** @addtogroup PWREx_Exported_Functions_Group1 Power supply control functions
  372. * @{
  373. */
  374. /* Power supply control functions */
  375. HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource);
  376. uint32_t HAL_PWREx_GetSupplyConfig(void);
  377. /* Power volatge scaling functions */
  378. HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
  379. uint32_t HAL_PWREx_GetVoltageRange(void);
  380. HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling);
  381. uint32_t HAL_PWREx_GetStopModeVoltageRange(void);
  382. /**
  383. * @}
  384. */
  385. /** @addtogroup PWREx_Exported_Functions_Group2 Low power control functions
  386. * @{
  387. */
  388. /* System low power control functions */
  389. void HAL_PWREx_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry, uint32_t Domain);
  390. void HAL_PWREx_EnterSTANDBYMode(uint32_t Domain);
  391. void HAL_PWREx_ConfigD3Domain(uint32_t D3State);
  392. #if defined(DUAL_CORE)
  393. void HAL_PWREx_ClearDomainFlags(uint32_t DomainFlags);
  394. /* Power core holding functions */
  395. HAL_StatusTypeDef HAL_PWREx_HoldCore(uint32_t CPU);
  396. void HAL_PWREx_ReleaseCore(uint32_t CPU);
  397. #endif /*DUAL_CORE*/
  398. /* Clear pending event function */
  399. void HAL_PWREx_ClearPendingEvent(void);
  400. /* Flash low power control functions */
  401. void HAL_PWREx_EnableFlashPowerDown(void);
  402. void HAL_PWREx_DisableFlashPowerDown(void);
  403. /* Wakeup Pins control functions */
  404. void HAL_PWREx_EnableWakeUpPin(PWREx_WakeupPinTypeDef *sPinParams);
  405. void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPin);
  406. uint32_t HAL_PWREx_GetWakeupFlag(uint32_t WakeUpFlag);
  407. HAL_StatusTypeDef HAL_PWREx_ClearWakeupFlag(uint32_t WakeUpFlag);
  408. /* Power Wakeup PIN IRQ Handler */
  409. void HAL_PWREx_WAKEUP_PIN_IRQHandler(void);
  410. void HAL_PWREx_WKUP1_Callback(void);
  411. void HAL_PWREx_WKUP2_Callback(void);
  412. void HAL_PWREx_WKUP3_Callback(void);
  413. void HAL_PWREx_WKUP4_Callback(void);
  414. void HAL_PWREx_WKUP5_Callback(void);
  415. void HAL_PWREx_WKUP6_Callback(void);
  416. /**
  417. * @}
  418. */
  419. /** @addtogroup PWREx_Exported_Functions_Group3 Peripherals control functions
  420. * @{
  421. */
  422. /* Backup regulator control functions */
  423. HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
  424. HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
  425. /* USB regulator control functions */
  426. HAL_StatusTypeDef HAL_PWREx_EnableUSBReg(void);
  427. HAL_StatusTypeDef HAL_PWREx_DisableUSBReg(void);
  428. void HAL_PWREx_EnableUSBVoltageDetector(void);
  429. void HAL_PWREx_DisableUSBVoltageDetector(void);
  430. /* Battery control functions */
  431. void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue);
  432. void HAL_PWREx_DisableBatteryCharging(void);
  433. /**
  434. * @}
  435. */
  436. /** @addtogroup PWREx_Exported_Functions_Group4 Power Monitoring functions
  437. * @{
  438. */
  439. /* Power VBAT/Temperature monitoring functions */
  440. void HAL_PWREx_EnableMonitoring(void);
  441. void HAL_PWREx_DisableMonitoring(void);
  442. uint32_t HAL_PWREx_GetTemperatureLevel(void);
  443. uint32_t HAL_PWREx_GetVBATLevel(void);
  444. /* Power AVD configuration functions */
  445. void HAL_PWREx_ConfigAVD(PWREx_AVDTypeDef *sConfigAVD);
  446. void HAL_PWREx_EnableAVD(void);
  447. void HAL_PWREx_DisableAVD(void);
  448. /* Power PVD/AVD IRQ Handler */
  449. void HAL_PWREx_PVD_AVD_IRQHandler(void);
  450. void HAL_PWREx_AVDCallback(void);
  451. /**
  452. * @}
  453. */
  454. /**
  455. * @}
  456. */
  457. /* Private types -------------------------------------------------------------*/
  458. /* Private variables ---------------------------------------------------------*/
  459. /* Private constants ---------------------------------------------------------*/
  460. /* Private macros ------------------------------------------------------------*/
  461. /** @defgroup PWREx_Private_Macros PWREx Private Macros
  462. * @{
  463. */
  464. /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
  465. * @{
  466. */
  467. #if defined(SMPS)
  468. #define IS_PWR_SUPPLY(PWR_SOURCE) (((PWR_SOURCE) == PWR_LDO_SUPPLY) || \
  469. ((PWR_SOURCE) == PWR_DIRECT_SMPS_SUPPLY) || \
  470. ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_LDO) || \
  471. ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_LDO) || \
  472. ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) || \
  473. ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO) || \
  474. ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_EXT) || \
  475. ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_EXT) || \
  476. ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY))
  477. #else
  478. #define IS_PWR_SUPPLY(PWR_SOURCE) (((PWR_SOURCE) == PWR_LDO_SUPPLY) || \
  479. ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY))
  480. #endif /*SMPS*/
  481. #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) || \
  482. ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) || \
  483. ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5))
  484. #define IS_PWR_DOMAIN(DOMAIN) (((DOMAIN) == PWR_D1_DOMAIN) || \
  485. ((DOMAIN) == PWR_D2_DOMAIN) || \
  486. ((DOMAIN) == PWR_D3_DOMAIN))
  487. #define IS_D3_STATE(STATE) (((STATE) == PWR_D3_DOMAIN_STOP) || ((STATE) == PWR_D3_DOMAIN_RUN))
  488. #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
  489. ((PIN) == PWR_WAKEUP_PIN2) || \
  490. ((PIN) == PWR_WAKEUP_PIN3) || \
  491. ((PIN) == PWR_WAKEUP_PIN4) || \
  492. ((PIN) == PWR_WAKEUP_PIN5) || \
  493. ((PIN) == PWR_WAKEUP_PIN6) || \
  494. ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \
  495. ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \
  496. ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \
  497. ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \
  498. ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \
  499. ((PIN) == PWR_WAKEUP_PIN6_HIGH) || \
  500. ((PIN) == PWR_WAKEUP_PIN1_LOW) || \
  501. ((PIN) == PWR_WAKEUP_PIN2_LOW) || \
  502. ((PIN) == PWR_WAKEUP_PIN3_LOW) || \
  503. ((PIN) == PWR_WAKEUP_PIN4_LOW) || \
  504. ((PIN) == PWR_WAKEUP_PIN5_LOW) || \
  505. ((PIN) == PWR_WAKEUP_PIN6_LOW))
  506. #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) || \
  507. ((POLARITY) == PWR_PIN_POLARITY_LOW))
  508. #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) || \
  509. ((PULL) == PWR_PIN_PULL_UP) || \
  510. ((PULL) == PWR_PIN_PULL_DOWN))
  511. #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) || \
  512. ((FLAG) == PWR_WAKEUP_FLAG2) || \
  513. ((FLAG) == PWR_WAKEUP_FLAG3) || \
  514. ((FLAG) == PWR_WAKEUP_FLAG4) || \
  515. ((FLAG) == PWR_WAKEUP_FLAG5) || \
  516. ((FLAG) == PWR_WAKEUP_FLAG6))
  517. #define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) || ((LEVEL) == PWR_AVDLEVEL_1) || \
  518. ((LEVEL) == PWR_AVDLEVEL_2) || ((LEVEL) == PWR_AVDLEVEL_3))
  519. #define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING)|| ((MODE) == PWR_AVD_MODE_IT_FALLING) || \
  520. ((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_AVD_MODE_EVENT_RISING) || \
  521. ((MODE) == PWR_AVD_MODE_EVENT_FALLING) || ((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING) || \
  522. ((MODE) == PWR_AVD_MODE_NORMAL))
  523. #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
  524. ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
  525. #define IS_PWR_D1_CPU(CPU) ((CPU) == CM7_CPUID)
  526. #if defined(DUAL_CORE)
  527. #define IS_PWR_CORE(CPU) (((CPU) == PWR_CORE_CPU1) || ((CPU) == PWR_CORE_CPU2))
  528. #define IS_PWR_D2_CPU(CPU) ((CPU) == CM4_CPUID)
  529. #define IS_PWR_DOMAIN_FLAG(FLAG) (((FLAG) == PWR_D1_DOMAIN_FLAGS) || \
  530. ((FLAG) == PWR_D2_DOMAIN_FLAGS))
  531. #endif /*DUAL_CORE*/
  532. /**
  533. * @}
  534. */
  535. /**
  536. * @}
  537. */
  538. /**
  539. * @}
  540. */
  541. /**
  542. * @}
  543. */
  544. #ifdef __cplusplus
  545. }
  546. #endif
  547. #endif /* STM32H7xx_HAL_PWR_EX_H */
  548. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/