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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.2.2
  6. * @date 14-April-2017
  7. * @brief Header file of DMA2D LL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F7xx_LL_DMA2D_H
  39. #define __STM32F7xx_LL_DMA2D_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f7xx.h"
  45. /** @addtogroup STM32F7xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (DMA2D)
  49. /** @defgroup DMA2D_LL DMA2D
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /* Private macros ------------------------------------------------------------*/
  56. #if defined(USE_FULL_LL_DRIVER)
  57. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. #endif /*USE_FULL_LL_DRIVER*/
  64. /* Exported types ------------------------------------------------------------*/
  65. #if defined(USE_FULL_LL_DRIVER)
  66. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  67. * @{
  68. */
  69. /**
  70. * @brief LL DMA2D Init Structure Definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  75. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  77. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  78. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  79. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  80. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  84. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  85. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  86. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  87. function @ref LL_DMA2D_ConfigOutputColor(). */
  88. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  92. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  93. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  94. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  95. function @ref LL_DMA2D_ConfigOutputColor(). */
  96. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  100. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  101. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  103. function @ref LL_DMA2D_ConfigOutputColor(). */
  104. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  106. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  107. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  108. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  109. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  110. function @ref LL_DMA2D_ConfigOutputColor(). */
  111. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  112. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  113. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  114. uint32_t LineOffset; /*!< Specifies the output line offset value.
  115. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  116. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  117. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  118. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  119. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  120. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  121. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  122. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  123. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  124. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  125. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  126. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  127. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  128. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  129. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  130. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  131. } LL_DMA2D_InitTypeDef;
  132. /**
  133. * @brief LL DMA2D Layer Configuration Structure Definition
  134. */
  135. typedef struct
  136. {
  137. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  138. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  139. This parameter can be modified afterwards using unitary functions
  140. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  141. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  142. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  143. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  144. This parameter can be modified afterwards using unitary functions
  145. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  146. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  147. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  148. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  149. This parameter can be modified afterwards using unitary functions
  150. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  151. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  152. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  153. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  154. This parameter can be modified afterwards using unitary functions
  155. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  156. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  157. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  158. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  159. This parameter can be modified afterwards using unitary functions
  160. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  161. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  162. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  163. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  164. This parameter can be modified afterwards using unitary functions
  165. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  166. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  167. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  168. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  169. This parameter can be modified afterwards using unitary functions
  170. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  171. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  172. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  173. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  174. This parameter can be modified afterwards using unitary functions
  175. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  176. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  177. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  178. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  179. This parameter can be modified afterwards using unitary functions
  180. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  181. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  182. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  183. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  184. This parameter can be modified afterwards using unitary functions
  185. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  186. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  187. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  188. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  189. This parameter can be modified afterwards using unitary functions
  190. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  191. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  192. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  193. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  194. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  195. This parameter can be modified afterwards using unitary functions
  196. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  197. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  198. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  199. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  200. This parameter can be modified afterwards using unitary functions
  201. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  202. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  203. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  204. } LL_DMA2D_LayerCfgTypeDef;
  205. /**
  206. * @brief LL DMA2D Output Color Structure Definition
  207. */
  208. typedef struct
  209. {
  210. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  211. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  212. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  213. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  215. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  216. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  217. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  218. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  219. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  220. function @ref LL_DMA2D_ConfigOutputColor(). */
  221. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  223. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  224. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  225. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  226. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  227. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  228. function @ref LL_DMA2D_ConfigOutputColor(). */
  229. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  230. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  231. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  232. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  233. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  234. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  235. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  236. function @ref LL_DMA2D_ConfigOutputColor(). */
  237. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  238. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  239. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  240. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  241. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  242. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  243. function @ref LL_DMA2D_ConfigOutputColor(). */
  244. } LL_DMA2D_ColorTypeDef;
  245. /**
  246. * @}
  247. */
  248. #endif /* USE_FULL_LL_DRIVER */
  249. /* Exported constants --------------------------------------------------------*/
  250. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  251. * @{
  252. */
  253. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  254. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  255. * @{
  256. */
  257. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  258. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  259. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  260. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  261. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  262. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  263. /**
  264. * @}
  265. */
  266. /** @defgroup DMA2D_LL_EC_IT IT Defines
  267. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  268. * @{
  269. */
  270. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  271. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  272. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  273. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  274. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  275. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  276. /**
  277. * @}
  278. */
  279. /** @defgroup DMA2D_LL_EC_MODE Mode
  280. * @{
  281. */
  282. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  283. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  284. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  285. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  286. /**
  287. * @}
  288. */
  289. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  290. * @{
  291. */
  292. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  293. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  294. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  295. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  296. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  297. /**
  298. * @}
  299. */
  300. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  301. * @{
  302. */
  303. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  304. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  305. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  306. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  307. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  308. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  309. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  310. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  311. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  312. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  313. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  314. /**
  315. * @}
  316. */
  317. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  318. * @{
  319. */
  320. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  321. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  322. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  323. with original alpha channel value */
  324. /**
  325. * @}
  326. */
  327. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  328. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  329. * @{
  330. */
  331. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  332. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  333. /**
  334. * @}
  335. */
  336. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  337. * @{
  338. */
  339. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  340. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  341. /**
  342. * @}
  343. */
  344. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  345. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  346. * @{
  347. */
  348. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  349. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  350. /**
  351. * @}
  352. */
  353. /**
  354. * @}
  355. */
  356. /* Exported macro ------------------------------------------------------------*/
  357. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  358. * @{
  359. */
  360. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  361. * @{
  362. */
  363. /**
  364. * @brief Write a value in DMA2D register.
  365. * @param __INSTANCE__ DMA2D Instance
  366. * @param __REG__ Register to be written
  367. * @param __VALUE__ Value to be written in the register
  368. * @retval None
  369. */
  370. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  371. /**
  372. * @brief Read a value in DMA2D register.
  373. * @param __INSTANCE__ DMA2D Instance
  374. * @param __REG__ Register to be read
  375. * @retval Register value
  376. */
  377. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  378. /**
  379. * @}
  380. */
  381. /**
  382. * @}
  383. */
  384. /* Exported functions --------------------------------------------------------*/
  385. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  386. * @{
  387. */
  388. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  389. * @{
  390. */
  391. /**
  392. * @brief Start a DMA2D transfer.
  393. * @rmtoll CR START LL_DMA2D_Start
  394. * @param DMA2Dx DMA2D Instance
  395. * @retval None
  396. */
  397. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  398. {
  399. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  400. }
  401. /**
  402. * @brief Indicate if a DMA2D transfer is ongoing.
  403. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  404. * @param DMA2Dx DMA2D Instance
  405. * @retval State of bit (1 or 0).
  406. */
  407. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  408. {
  409. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  410. }
  411. /**
  412. * @brief Suspend DMA2D transfer.
  413. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  414. * @rmtoll CR SUSP LL_DMA2D_Suspend
  415. * @param DMA2Dx DMA2D Instance
  416. * @retval None
  417. */
  418. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  419. {
  420. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  421. }
  422. /**
  423. * @brief Resume DMA2D transfer.
  424. * @note This API can be used to resume automatic foreground or background CLUT loading.
  425. * @rmtoll CR SUSP LL_DMA2D_Resume
  426. * @param DMA2Dx DMA2D Instance
  427. * @retval None
  428. */
  429. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  430. {
  431. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  432. }
  433. /**
  434. * @brief Indicate if DMA2D transfer is suspended.
  435. * @note This API can be used to indicate whether or not automatic foreground or
  436. * background CLUT loading is suspended.
  437. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  438. * @param DMA2Dx DMA2D Instance
  439. * @retval State of bit (1 or 0).
  440. */
  441. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  442. {
  443. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  444. }
  445. /**
  446. * @brief Abort DMA2D transfer.
  447. * @note This API can be used to abort automatic foreground or background CLUT loading.
  448. * @rmtoll CR ABORT LL_DMA2D_Abort
  449. * @param DMA2Dx DMA2D Instance
  450. * @retval None
  451. */
  452. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  453. {
  454. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  455. }
  456. /**
  457. * @brief Indicate if DMA2D transfer is aborted.
  458. * @note This API can be used to indicate whether or not automatic foreground or
  459. * background CLUT loading is aborted.
  460. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  461. * @param DMA2Dx DMA2D Instance
  462. * @retval State of bit (1 or 0).
  463. */
  464. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  465. {
  466. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  467. }
  468. /**
  469. * @brief Set DMA2D mode.
  470. * @rmtoll CR MODE LL_DMA2D_SetMode
  471. * @param DMA2Dx DMA2D Instance
  472. * @param Mode This parameter can be one of the following values:
  473. * @arg @ref LL_DMA2D_MODE_M2M
  474. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  475. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  476. * @arg @ref LL_DMA2D_MODE_R2M
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  480. {
  481. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  482. }
  483. /**
  484. * @brief Return DMA2D mode
  485. * @rmtoll CR MODE LL_DMA2D_GetMode
  486. * @param DMA2Dx DMA2D Instance
  487. * @retval Returned value can be one of the following values:
  488. * @arg @ref LL_DMA2D_MODE_M2M
  489. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  490. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  491. * @arg @ref LL_DMA2D_MODE_R2M
  492. */
  493. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  494. {
  495. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  496. }
  497. /**
  498. * @brief Set DMA2D output color mode.
  499. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  500. * @param DMA2Dx DMA2D Instance
  501. * @param ColorMode This parameter can be one of the following values:
  502. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  503. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  504. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  505. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  506. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  507. * @retval None
  508. */
  509. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  510. {
  511. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  512. }
  513. /**
  514. * @brief Return DMA2D output color mode.
  515. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  516. * @param DMA2Dx DMA2D Instance
  517. * @retval Returned value can be one of the following values:
  518. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  519. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  520. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  521. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  522. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  523. */
  524. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  525. {
  526. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  527. }
  528. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  529. /**
  530. * @brief Set DMA2D output Red Blue swap mode.
  531. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  532. * @param DMA2Dx DMA2D Instance
  533. * @param RBSwapMode This parameter can be one of the following values:
  534. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  535. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  536. * @retval None
  537. */
  538. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  539. {
  540. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  541. }
  542. /**
  543. * @brief Return DMA2D output Red Blue swap mode.
  544. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  545. * @param DMA2Dx DMA2D Instance
  546. * @retval Returned value can be one of the following values:
  547. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  548. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  549. */
  550. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  551. {
  552. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  553. }
  554. /**
  555. * @brief Set DMA2D output alpha inversion mode.
  556. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  557. * @param DMA2Dx DMA2D Instance
  558. * @param AlphaInversionMode This parameter can be one of the following values:
  559. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  560. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  561. * @retval None
  562. */
  563. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  564. {
  565. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  566. }
  567. /**
  568. * @brief Return DMA2D output alpha inversion mode.
  569. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  570. * @param DMA2Dx DMA2D Instance
  571. * @retval Returned value can be one of the following values:
  572. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  573. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  574. */
  575. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  576. {
  577. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  578. }
  579. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  580. /**
  581. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  582. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  583. * @param DMA2Dx DMA2D Instance
  584. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  585. * @retval None
  586. */
  587. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  588. {
  589. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  590. }
  591. /**
  592. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  593. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  594. * @param DMA2Dx DMA2D Instance
  595. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  596. */
  597. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  598. {
  599. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  600. }
  601. /**
  602. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  603. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  604. * @param DMA2Dx DMA2D Instance
  605. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  606. * @retval None
  607. */
  608. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  609. {
  610. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  611. }
  612. /**
  613. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  614. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  615. * @param DMA2Dx DMA2D Instance
  616. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  617. */
  618. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  619. {
  620. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  621. }
  622. /**
  623. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  624. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  625. * @param DMA2Dx DMA2D Instance
  626. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  627. * @retval None
  628. */
  629. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  630. {
  631. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  632. }
  633. /**
  634. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  635. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  636. * @param DMA2Dx DMA2D Instance
  637. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  638. */
  639. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  640. {
  641. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  642. }
  643. /**
  644. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  645. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  646. * @param DMA2Dx DMA2D Instance
  647. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  648. * @retval None
  649. */
  650. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  651. {
  652. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  653. }
  654. /**
  655. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  656. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  657. * @param DMA2Dx DMA2D Instance
  658. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  659. */
  660. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  661. {
  662. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  663. }
  664. /**
  665. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  666. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  667. * RGB565, ARGB1555 or ARGB4444.
  668. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  669. * with respect to color mode is not done by the user code.
  670. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  671. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  672. * OCOLR RED LL_DMA2D_SetOutputColor\n
  673. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  674. * @param DMA2Dx DMA2D Instance
  675. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  676. * @retval None
  677. */
  678. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  679. {
  680. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  681. OutputColor);
  682. }
  683. /**
  684. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  685. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  686. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  687. * as set by @ref LL_DMA2D_SetOutputColorMode.
  688. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  689. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  690. * OCOLR RED LL_DMA2D_GetOutputColor\n
  691. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  692. * @param DMA2Dx DMA2D Instance
  693. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  694. */
  695. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  696. {
  697. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  698. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  699. }
  700. /**
  701. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  702. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  703. * @param DMA2Dx DMA2D Instance
  704. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  705. * @retval None
  706. */
  707. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  708. {
  709. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  710. }
  711. /**
  712. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  713. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  714. * @param DMA2Dx DMA2D Instance
  715. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  716. */
  717. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  718. {
  719. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  720. }
  721. /**
  722. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  723. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  724. * @param DMA2Dx DMA2D Instance
  725. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  726. * @retval None
  727. */
  728. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  729. {
  730. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  731. }
  732. /**
  733. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  734. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  735. * @param DMA2Dx DMA2D Instance
  736. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  737. */
  738. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  739. {
  740. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  741. }
  742. /**
  743. * @brief Enable DMA2D dead time functionality.
  744. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  745. * @param DMA2Dx DMA2D Instance
  746. * @retval None
  747. */
  748. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  749. {
  750. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  751. }
  752. /**
  753. * @brief Disable DMA2D dead time functionality.
  754. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  755. * @param DMA2Dx DMA2D Instance
  756. * @retval None
  757. */
  758. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  759. {
  760. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  761. }
  762. /**
  763. * @brief Indicate if DMA2D dead time functionality is enabled.
  764. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  765. * @param DMA2Dx DMA2D Instance
  766. * @retval State of bit (1 or 0).
  767. */
  768. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  769. {
  770. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  771. }
  772. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  773. * @{
  774. */
  775. /**
  776. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  777. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  778. * @param DMA2Dx DMA2D Instance
  779. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  780. * @retval None
  781. */
  782. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  783. {
  784. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  785. }
  786. /**
  787. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  788. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  789. * @param DMA2Dx DMA2D Instance
  790. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  791. */
  792. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  793. {
  794. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  795. }
  796. /**
  797. * @brief Enable DMA2D foreground CLUT loading.
  798. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  799. * @param DMA2Dx DMA2D Instance
  800. * @retval None
  801. */
  802. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  803. {
  804. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  805. }
  806. /**
  807. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  808. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  809. * @param DMA2Dx DMA2D Instance
  810. * @retval State of bit (1 or 0).
  811. */
  812. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  813. {
  814. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  815. }
  816. /**
  817. * @brief Set DMA2D foreground color mode.
  818. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  819. * @param DMA2Dx DMA2D Instance
  820. * @param ColorMode This parameter can be one of the following values:
  821. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  822. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  823. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  824. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  825. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  826. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  827. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  828. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  829. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  830. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  831. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  832. * @retval None
  833. */
  834. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  835. {
  836. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  837. }
  838. /**
  839. * @brief Return DMA2D foreground color mode.
  840. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  841. * @param DMA2Dx DMA2D Instance
  842. * @retval Returned value can be one of the following values:
  843. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  844. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  845. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  846. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  847. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  848. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  849. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  850. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  851. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  852. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  853. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  854. */
  855. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  856. {
  857. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  858. }
  859. /**
  860. * @brief Set DMA2D foreground alpha mode.
  861. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  862. * @param DMA2Dx DMA2D Instance
  863. * @param AphaMode This parameter can be one of the following values:
  864. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  865. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  866. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  867. * @retval None
  868. */
  869. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  870. {
  871. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  872. }
  873. /**
  874. * @brief Return DMA2D foreground alpha mode.
  875. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  876. * @param DMA2Dx DMA2D Instance
  877. * @retval Returned value can be one of the following values:
  878. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  879. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  880. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  881. */
  882. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  883. {
  884. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  885. }
  886. /**
  887. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  888. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  889. * @param DMA2Dx DMA2D Instance
  890. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  891. * @retval None
  892. */
  893. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  894. {
  895. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  896. }
  897. /**
  898. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  899. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  900. * @param DMA2Dx DMA2D Instance
  901. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  902. */
  903. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  904. {
  905. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  906. }
  907. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  908. /**
  909. * @brief Set DMA2D foreground Red Blue swap mode.
  910. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  911. * @param DMA2Dx DMA2D Instance
  912. * @param RBSwapMode This parameter can be one of the following values:
  913. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  914. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  915. * @retval None
  916. */
  917. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  918. {
  919. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  920. }
  921. /**
  922. * @brief Return DMA2D foreground Red Blue swap mode.
  923. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  924. * @param DMA2Dx DMA2D Instance
  925. * @retval Returned value can be one of the following values:
  926. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  927. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  928. */
  929. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  930. {
  931. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  932. }
  933. /**
  934. * @brief Set DMA2D foreground alpha inversion mode.
  935. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  936. * @param DMA2Dx DMA2D Instance
  937. * @param AlphaInversionMode This parameter can be one of the following values:
  938. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  939. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  940. * @retval None
  941. */
  942. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  943. {
  944. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  945. }
  946. /**
  947. * @brief Return DMA2D foreground alpha inversion mode.
  948. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  949. * @param DMA2Dx DMA2D Instance
  950. * @retval Returned value can be one of the following values:
  951. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  952. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  953. */
  954. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  955. {
  956. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  957. }
  958. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  959. /**
  960. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  961. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  962. * @param DMA2Dx DMA2D Instance
  963. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  964. * @retval None
  965. */
  966. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  967. {
  968. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  969. }
  970. /**
  971. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  972. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  973. * @param DMA2Dx DMA2D Instance
  974. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  975. */
  976. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  977. {
  978. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  979. }
  980. /**
  981. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  982. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  983. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  984. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  985. * @param DMA2Dx DMA2D Instance
  986. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  987. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  988. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  989. * @retval None
  990. */
  991. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  992. {
  993. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  994. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  995. }
  996. /**
  997. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  998. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  999. * @param DMA2Dx DMA2D Instance
  1000. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1001. * @retval None
  1002. */
  1003. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1004. {
  1005. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  1006. }
  1007. /**
  1008. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1009. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1010. * @param DMA2Dx DMA2D Instance
  1011. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1012. */
  1013. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1014. {
  1015. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1016. }
  1017. /**
  1018. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1019. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1020. * @param DMA2Dx DMA2D Instance
  1021. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1022. * @retval None
  1023. */
  1024. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1025. {
  1026. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1027. }
  1028. /**
  1029. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1030. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1031. * @param DMA2Dx DMA2D Instance
  1032. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1033. */
  1034. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1035. {
  1036. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1037. }
  1038. /**
  1039. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1040. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1041. * @param DMA2Dx DMA2D Instance
  1042. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1043. * @retval None
  1044. */
  1045. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1046. {
  1047. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1048. }
  1049. /**
  1050. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1051. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1052. * @param DMA2Dx DMA2D Instance
  1053. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1054. */
  1055. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1056. {
  1057. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1058. }
  1059. /**
  1060. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1061. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1062. * @param DMA2Dx DMA2D Instance
  1063. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1064. * @retval None
  1065. */
  1066. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1067. {
  1068. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1069. }
  1070. /**
  1071. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1072. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1073. * @param DMA2Dx DMA2D Instance
  1074. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1075. */
  1076. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1077. {
  1078. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1079. }
  1080. /**
  1081. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1082. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1083. * @param DMA2Dx DMA2D Instance
  1084. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1085. * @retval None
  1086. */
  1087. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1088. {
  1089. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1090. }
  1091. /**
  1092. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1093. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1094. * @param DMA2Dx DMA2D Instance
  1095. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1096. */
  1097. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1098. {
  1099. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1100. }
  1101. /**
  1102. * @brief Set DMA2D foreground CLUT color mode.
  1103. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1104. * @param DMA2Dx DMA2D Instance
  1105. * @param CLUTColorMode This parameter can be one of the following values:
  1106. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1107. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1108. * @retval None
  1109. */
  1110. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1111. {
  1112. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1113. }
  1114. /**
  1115. * @brief Return DMA2D foreground CLUT color mode.
  1116. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1117. * @param DMA2Dx DMA2D Instance
  1118. * @retval Returned value can be one of the following values:
  1119. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1120. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1121. */
  1122. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1123. {
  1124. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1125. }
  1126. /**
  1127. * @}
  1128. */
  1129. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1130. * @{
  1131. */
  1132. /**
  1133. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1134. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1135. * @param DMA2Dx DMA2D Instance
  1136. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1137. * @retval None
  1138. */
  1139. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1140. {
  1141. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1142. }
  1143. /**
  1144. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1145. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1146. * @param DMA2Dx DMA2D Instance
  1147. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1148. */
  1149. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1150. {
  1151. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1152. }
  1153. /**
  1154. * @brief Enable DMA2D background CLUT loading.
  1155. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1156. * @param DMA2Dx DMA2D Instance
  1157. * @retval None
  1158. */
  1159. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1160. {
  1161. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1162. }
  1163. /**
  1164. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1165. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1166. * @param DMA2Dx DMA2D Instance
  1167. * @retval State of bit (1 or 0).
  1168. */
  1169. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1170. {
  1171. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1172. }
  1173. /**
  1174. * @brief Set DMA2D background color mode.
  1175. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1176. * @param DMA2Dx DMA2D Instance
  1177. * @param ColorMode This parameter can be one of the following values:
  1178. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1179. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1180. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1181. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1182. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1183. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1184. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1185. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1186. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1187. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1188. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1189. * @retval None
  1190. */
  1191. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1192. {
  1193. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1194. }
  1195. /**
  1196. * @brief Return DMA2D background color mode.
  1197. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1198. * @param DMA2Dx DMA2D Instance
  1199. * @retval Returned value can be one of the following values:
  1200. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1201. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1202. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1203. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1204. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1205. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1206. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1207. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1208. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1209. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1210. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1211. */
  1212. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1213. {
  1214. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1215. }
  1216. /**
  1217. * @brief Set DMA2D background alpha mode.
  1218. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1219. * @param DMA2Dx DMA2D Instance
  1220. * @param AphaMode This parameter can be one of the following values:
  1221. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1222. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1223. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1224. * @retval None
  1225. */
  1226. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1227. {
  1228. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1229. }
  1230. /**
  1231. * @brief Return DMA2D background alpha mode.
  1232. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1233. * @param DMA2Dx DMA2D Instance
  1234. * @retval Returned value can be one of the following values:
  1235. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1236. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1237. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1238. */
  1239. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1240. {
  1241. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1242. }
  1243. /**
  1244. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1245. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1246. * @param DMA2Dx DMA2D Instance
  1247. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1248. * @retval None
  1249. */
  1250. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1251. {
  1252. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1253. }
  1254. /**
  1255. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1256. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1257. * @param DMA2Dx DMA2D Instance
  1258. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1259. */
  1260. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1261. {
  1262. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1263. }
  1264. #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
  1265. /**
  1266. * @brief Set DMA2D background Red Blue swap mode.
  1267. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1268. * @param DMA2Dx DMA2D Instance
  1269. * @param RBSwapMode This parameter can be one of the following values:
  1270. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1271. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1272. * @retval None
  1273. */
  1274. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1275. {
  1276. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1277. }
  1278. /**
  1279. * @brief Return DMA2D background Red Blue swap mode.
  1280. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1281. * @param DMA2Dx DMA2D Instance
  1282. * @retval Returned value can be one of the following values:
  1283. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1284. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1285. */
  1286. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1287. {
  1288. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1289. }
  1290. /**
  1291. * @brief Set DMA2D background alpha inversion mode.
  1292. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1293. * @param DMA2Dx DMA2D Instance
  1294. * @param AlphaInversionMode This parameter can be one of the following values:
  1295. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1296. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1297. * @retval None
  1298. */
  1299. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1300. {
  1301. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1302. }
  1303. /**
  1304. * @brief Return DMA2D background alpha inversion mode.
  1305. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1306. * @param DMA2Dx DMA2D Instance
  1307. * @retval Returned value can be one of the following values:
  1308. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1309. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1310. */
  1311. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1312. {
  1313. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1314. }
  1315. #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
  1316. /**
  1317. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1318. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1319. * @param DMA2Dx DMA2D Instance
  1320. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1321. * @retval None
  1322. */
  1323. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1324. {
  1325. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1326. }
  1327. /**
  1328. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1329. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1330. * @param DMA2Dx DMA2D Instance
  1331. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1332. */
  1333. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1334. {
  1335. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1336. }
  1337. /**
  1338. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1339. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1340. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1341. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1342. * @param DMA2Dx DMA2D Instance
  1343. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1344. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1345. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1346. * @retval None
  1347. */
  1348. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1349. {
  1350. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1351. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1352. }
  1353. /**
  1354. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1355. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1356. * @param DMA2Dx DMA2D Instance
  1357. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1358. * @retval None
  1359. */
  1360. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1361. {
  1362. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1363. }
  1364. /**
  1365. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1366. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1367. * @param DMA2Dx DMA2D Instance
  1368. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1369. */
  1370. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1371. {
  1372. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1373. }
  1374. /**
  1375. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1376. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1377. * @param DMA2Dx DMA2D Instance
  1378. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1379. * @retval None
  1380. */
  1381. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1382. {
  1383. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1384. }
  1385. /**
  1386. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1387. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1388. * @param DMA2Dx DMA2D Instance
  1389. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1390. */
  1391. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1392. {
  1393. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1394. }
  1395. /**
  1396. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1397. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1398. * @param DMA2Dx DMA2D Instance
  1399. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1400. * @retval None
  1401. */
  1402. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1403. {
  1404. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1405. }
  1406. /**
  1407. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1408. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1409. * @param DMA2Dx DMA2D Instance
  1410. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1411. */
  1412. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1413. {
  1414. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1415. }
  1416. /**
  1417. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1418. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1419. * @param DMA2Dx DMA2D Instance
  1420. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1421. * @retval None
  1422. */
  1423. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1424. {
  1425. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1426. }
  1427. /**
  1428. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1429. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1430. * @param DMA2Dx DMA2D Instance
  1431. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1432. */
  1433. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1434. {
  1435. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1436. }
  1437. /**
  1438. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1439. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1440. * @param DMA2Dx DMA2D Instance
  1441. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1442. * @retval None
  1443. */
  1444. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1445. {
  1446. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1447. }
  1448. /**
  1449. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1450. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1451. * @param DMA2Dx DMA2D Instance
  1452. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1453. */
  1454. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1455. {
  1456. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1457. }
  1458. /**
  1459. * @brief Set DMA2D background CLUT color mode.
  1460. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1461. * @param DMA2Dx DMA2D Instance
  1462. * @param CLUTColorMode This parameter can be one of the following values:
  1463. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1464. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1465. * @retval None
  1466. */
  1467. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1468. {
  1469. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1470. }
  1471. /**
  1472. * @brief Return DMA2D background CLUT color mode.
  1473. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1474. * @param DMA2Dx DMA2D Instance
  1475. * @retval Returned value can be one of the following values:
  1476. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1477. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1478. */
  1479. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1480. {
  1481. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1482. }
  1483. /**
  1484. * @}
  1485. */
  1486. /**
  1487. * @}
  1488. */
  1489. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1490. * @{
  1491. */
  1492. /**
  1493. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1494. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1495. * @param DMA2Dx DMA2D Instance
  1496. * @retval State of bit (1 or 0).
  1497. */
  1498. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1499. {
  1500. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1501. }
  1502. /**
  1503. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1504. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1505. * @param DMA2Dx DMA2D Instance
  1506. * @retval State of bit (1 or 0).
  1507. */
  1508. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1509. {
  1510. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1511. }
  1512. /**
  1513. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1514. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1515. * @param DMA2Dx DMA2D Instance
  1516. * @retval State of bit (1 or 0).
  1517. */
  1518. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1519. {
  1520. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1521. }
  1522. /**
  1523. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1524. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1525. * @param DMA2Dx DMA2D Instance
  1526. * @retval State of bit (1 or 0).
  1527. */
  1528. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1529. {
  1530. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1531. }
  1532. /**
  1533. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1534. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1535. * @param DMA2Dx DMA2D Instance
  1536. * @retval State of bit (1 or 0).
  1537. */
  1538. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1539. {
  1540. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1541. }
  1542. /**
  1543. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1544. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1545. * @param DMA2Dx DMA2D Instance
  1546. * @retval State of bit (1 or 0).
  1547. */
  1548. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1549. {
  1550. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1551. }
  1552. /**
  1553. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1554. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1555. * @param DMA2Dx DMA2D Instance
  1556. * @retval None
  1557. */
  1558. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1559. {
  1560. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1561. }
  1562. /**
  1563. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1564. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1565. * @param DMA2Dx DMA2D Instance
  1566. * @retval None
  1567. */
  1568. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1569. {
  1570. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1571. }
  1572. /**
  1573. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1574. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1575. * @param DMA2Dx DMA2D Instance
  1576. * @retval None
  1577. */
  1578. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1579. {
  1580. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1581. }
  1582. /**
  1583. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1584. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1585. * @param DMA2Dx DMA2D Instance
  1586. * @retval None
  1587. */
  1588. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1589. {
  1590. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1591. }
  1592. /**
  1593. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1594. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1595. * @param DMA2Dx DMA2D Instance
  1596. * @retval None
  1597. */
  1598. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1599. {
  1600. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1601. }
  1602. /**
  1603. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1604. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1605. * @param DMA2Dx DMA2D Instance
  1606. * @retval None
  1607. */
  1608. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1609. {
  1610. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1611. }
  1612. /**
  1613. * @}
  1614. */
  1615. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1616. * @{
  1617. */
  1618. /**
  1619. * @brief Enable Configuration Error Interrupt
  1620. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1621. * @param DMA2Dx DMA2D Instance
  1622. * @retval None
  1623. */
  1624. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1625. {
  1626. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1627. }
  1628. /**
  1629. * @brief Enable CLUT Transfer Complete Interrupt
  1630. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1631. * @param DMA2Dx DMA2D Instance
  1632. * @retval None
  1633. */
  1634. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1635. {
  1636. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1637. }
  1638. /**
  1639. * @brief Enable CLUT Access Error Interrupt
  1640. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1641. * @param DMA2Dx DMA2D Instance
  1642. * @retval None
  1643. */
  1644. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1645. {
  1646. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1647. }
  1648. /**
  1649. * @brief Enable Transfer Watermark Interrupt
  1650. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1651. * @param DMA2Dx DMA2D Instance
  1652. * @retval None
  1653. */
  1654. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1655. {
  1656. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1657. }
  1658. /**
  1659. * @brief Enable Transfer Complete Interrupt
  1660. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1661. * @param DMA2Dx DMA2D Instance
  1662. * @retval None
  1663. */
  1664. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1665. {
  1666. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1667. }
  1668. /**
  1669. * @brief Enable Transfer Error Interrupt
  1670. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1671. * @param DMA2Dx DMA2D Instance
  1672. * @retval None
  1673. */
  1674. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1675. {
  1676. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1677. }
  1678. /**
  1679. * @brief Disable Configuration Error Interrupt
  1680. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1681. * @param DMA2Dx DMA2D Instance
  1682. * @retval None
  1683. */
  1684. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1685. {
  1686. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1687. }
  1688. /**
  1689. * @brief Disable CLUT Transfer Complete Interrupt
  1690. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1691. * @param DMA2Dx DMA2D Instance
  1692. * @retval None
  1693. */
  1694. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1695. {
  1696. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1697. }
  1698. /**
  1699. * @brief Disable CLUT Access Error Interrupt
  1700. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1701. * @param DMA2Dx DMA2D Instance
  1702. * @retval None
  1703. */
  1704. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1705. {
  1706. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1707. }
  1708. /**
  1709. * @brief Disable Transfer Watermark Interrupt
  1710. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1711. * @param DMA2Dx DMA2D Instance
  1712. * @retval None
  1713. */
  1714. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1715. {
  1716. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1717. }
  1718. /**
  1719. * @brief Disable Transfer Complete Interrupt
  1720. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1721. * @param DMA2Dx DMA2D Instance
  1722. * @retval None
  1723. */
  1724. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1725. {
  1726. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1727. }
  1728. /**
  1729. * @brief Disable Transfer Error Interrupt
  1730. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1731. * @param DMA2Dx DMA2D Instance
  1732. * @retval None
  1733. */
  1734. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1735. {
  1736. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1737. }
  1738. /**
  1739. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1740. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1741. * @param DMA2Dx DMA2D Instance
  1742. * @retval State of bit (1 or 0).
  1743. */
  1744. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1745. {
  1746. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1747. }
  1748. /**
  1749. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1750. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1751. * @param DMA2Dx DMA2D Instance
  1752. * @retval State of bit (1 or 0).
  1753. */
  1754. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1755. {
  1756. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1757. }
  1758. /**
  1759. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1760. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1761. * @param DMA2Dx DMA2D Instance
  1762. * @retval State of bit (1 or 0).
  1763. */
  1764. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1765. {
  1766. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1767. }
  1768. /**
  1769. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1770. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1771. * @param DMA2Dx DMA2D Instance
  1772. * @retval State of bit (1 or 0).
  1773. */
  1774. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1775. {
  1776. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1777. }
  1778. /**
  1779. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1780. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1781. * @param DMA2Dx DMA2D Instance
  1782. * @retval State of bit (1 or 0).
  1783. */
  1784. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1785. {
  1786. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1787. }
  1788. /**
  1789. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1790. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1791. * @param DMA2Dx DMA2D Instance
  1792. * @retval State of bit (1 or 0).
  1793. */
  1794. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1795. {
  1796. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1797. }
  1798. /**
  1799. * @}
  1800. */
  1801. #if defined(USE_FULL_LL_DRIVER)
  1802. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1803. * @{
  1804. */
  1805. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1806. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1807. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1808. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1809. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1810. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1811. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1812. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1813. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1814. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1815. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1816. /**
  1817. * @}
  1818. */
  1819. #endif /* USE_FULL_LL_DRIVER */
  1820. /**
  1821. * @}
  1822. */
  1823. /**
  1824. * @}
  1825. */
  1826. #endif /* defined (DMA2D) */
  1827. /**
  1828. * @}
  1829. */
  1830. #ifdef __cplusplus
  1831. }
  1832. #endif
  1833. #endif /* __STM32F7xx_LL_DMA2D_H */
  1834. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/