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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_ll_spi.c
  4. * @author MCD Application Team
  5. * @version V1.2.2
  6. * @date 14-April-2017
  7. * @brief SPI LL module driver.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /* Includes ------------------------------------------------------------------*/
  39. #include "stm32f7xx_ll_spi.h"
  40. #include "stm32f7xx_ll_bus.h"
  41. #include "stm32f7xx_ll_rcc.h"
  42. #ifdef USE_FULL_ASSERT
  43. #include "stm32_assert.h"
  44. #else
  45. #define assert_param(expr) ((void)0U)
  46. #endif
  47. /** @addtogroup STM32F7xx_LL_Driver
  48. * @{
  49. */
  50. #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined(SPI4) || defined(SPI5) || defined(SPI6)
  51. /** @addtogroup SPI_LL
  52. * @{
  53. */
  54. /* Private types -------------------------------------------------------------*/
  55. /* Private variables ---------------------------------------------------------*/
  56. /* Private constants ---------------------------------------------------------*/
  57. /** @defgroup SPI_LL_Private_Constants SPI Private Constants
  58. * @{
  59. */
  60. /* SPI registers Masks */
  61. #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
  62. SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \
  63. SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \
  64. SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \
  65. SPI_CR1_BIDIMODE)
  66. /**
  67. * @}
  68. */
  69. /* Private macros ------------------------------------------------------------*/
  70. /** @defgroup SPI_LL_Private_Macros SPI Private Macros
  71. * @{
  72. */
  73. #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \
  74. || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \
  75. || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
  76. || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
  77. #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
  78. || ((__VALUE__) == LL_SPI_MODE_SLAVE))
  79. #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \
  80. || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \
  81. || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \
  82. || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \
  83. || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \
  84. || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \
  85. || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
  86. || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
  87. || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
  88. || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
  89. || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
  90. || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
  91. || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
  92. #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
  93. || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
  94. #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
  95. || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
  96. #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
  97. || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
  98. || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
  99. #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \
  100. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \
  101. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \
  102. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \
  103. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \
  104. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \
  105. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
  106. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
  107. #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
  108. || ((__VALUE__) == LL_SPI_MSB_FIRST))
  109. #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
  110. || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
  111. #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
  112. /**
  113. * @}
  114. */
  115. /* Private function prototypes -----------------------------------------------*/
  116. /* Exported functions --------------------------------------------------------*/
  117. /** @addtogroup SPI_LL_Exported_Functions
  118. * @{
  119. */
  120. /** @addtogroup SPI_LL_EF_Init
  121. * @{
  122. */
  123. /**
  124. * @brief De-initialize the SPI registers to their default reset values.
  125. * @param SPIx SPI Instance
  126. * @retval An ErrorStatus enumeration value:
  127. * - SUCCESS: SPI registers are de-initialized
  128. * - ERROR: SPI registers are not de-initialized
  129. */
  130. ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
  131. {
  132. ErrorStatus status = ERROR;
  133. /* Check the parameters */
  134. assert_param(IS_SPI_ALL_INSTANCE(SPIx));
  135. #if defined(SPI1)
  136. if (SPIx == SPI1)
  137. {
  138. /* Force reset of SPI clock */
  139. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
  140. /* Release reset of SPI clock */
  141. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
  142. status = SUCCESS;
  143. }
  144. #endif /* SPI1 */
  145. #if defined(SPI2)
  146. if (SPIx == SPI2)
  147. {
  148. /* Force reset of SPI clock */
  149. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
  150. /* Release reset of SPI clock */
  151. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
  152. status = SUCCESS;
  153. }
  154. #endif /* SPI2 */
  155. #if defined(SPI3)
  156. if (SPIx == SPI3)
  157. {
  158. /* Force reset of SPI clock */
  159. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
  160. /* Release reset of SPI clock */
  161. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
  162. status = SUCCESS;
  163. }
  164. #endif /* SPI3 */
  165. #if defined(SPI4)
  166. if (SPIx == SPI4)
  167. {
  168. /* Force reset of SPI clock */
  169. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI4);
  170. /* Release reset of SPI clock */
  171. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI4);
  172. status = SUCCESS;
  173. }
  174. #endif /* SPI4 */
  175. #if defined(SPI5)
  176. if (SPIx == SPI5)
  177. {
  178. /* Force reset of SPI clock */
  179. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI5);
  180. /* Release reset of SPI clock */
  181. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI5);
  182. status = SUCCESS;
  183. }
  184. #endif /* SPI5 */
  185. #if defined(SPI6)
  186. if (SPIx == SPI6)
  187. {
  188. /* Force reset of SPI clock */
  189. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI6);
  190. /* Release reset of SPI clock */
  191. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI6);
  192. status = SUCCESS;
  193. }
  194. #endif /* SPI6 */
  195. return status;
  196. }
  197. /**
  198. * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
  199. * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
  200. * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  201. * @param SPIx SPI Instance
  202. * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
  203. * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
  204. */
  205. ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
  206. {
  207. ErrorStatus status = ERROR;
  208. /* Check the SPI Instance SPIx*/
  209. assert_param(IS_SPI_ALL_INSTANCE(SPIx));
  210. /* Check the SPI parameters from SPI_InitStruct*/
  211. assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
  212. assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
  213. assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
  214. assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
  215. assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
  216. assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
  217. assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
  218. assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
  219. assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
  220. if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
  221. {
  222. /*---------------------------- SPIx CR1 Configuration ------------------------
  223. * Configure SPIx CR1 with parameters:
  224. * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
  225. * - Master/Slave Mode: SPI_CR1_MSTR bit
  226. * - ClockPolarity: SPI_CR1_CPOL bit
  227. * - ClockPhase: SPI_CR1_CPHA bit
  228. * - NSS management: SPI_CR1_SSM bit
  229. * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
  230. * - BitOrder: SPI_CR1_LSBFIRST bit
  231. * - CRCCalculation: SPI_CR1_CRCEN bit
  232. */
  233. MODIFY_REG(SPIx->CR1,
  234. SPI_CR1_CLEAR_MASK,
  235. SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
  236. SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
  237. SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
  238. SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
  239. /*---------------------------- SPIx CR2 Configuration ------------------------
  240. * Configure SPIx CR2 with parameters:
  241. * - DataWidth: DS[3:0] bits
  242. * - NSS management: SSOE bit
  243. */
  244. MODIFY_REG(SPIx->CR2,
  245. SPI_CR2_DS | SPI_CR2_SSOE,
  246. SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
  247. /*---------------------------- SPIx CRCPR Configuration ----------------------
  248. * Configure SPIx CRCPR with parameters:
  249. * - CRCPoly: CRCPOLY[15:0] bits
  250. */
  251. if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
  252. {
  253. assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
  254. LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
  255. }
  256. status = SUCCESS;
  257. }
  258. /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
  259. CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  260. return status;
  261. }
  262. /**
  263. * @brief Set each @ref LL_SPI_InitTypeDef field to default value.
  264. * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
  265. * whose fields will be set to default values.
  266. * @retval None
  267. */
  268. void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
  269. {
  270. /* Set SPI_InitStruct fields to default values */
  271. SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
  272. SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE;
  273. SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT;
  274. SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW;
  275. SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE;
  276. SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT;
  277. SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
  278. SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST;
  279. SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
  280. SPI_InitStruct->CRCPoly = 7U;
  281. }
  282. /**
  283. * @}
  284. */
  285. /**
  286. * @}
  287. */
  288. /**
  289. * @}
  290. */
  291. /** @addtogroup I2S_LL
  292. * @{
  293. */
  294. /* Private types -------------------------------------------------------------*/
  295. /* Private variables ---------------------------------------------------------*/
  296. /* Private constants ---------------------------------------------------------*/
  297. /** @defgroup I2S_LL_Private_Constants I2S Private Constants
  298. * @{
  299. */
  300. /* I2S registers Masks */
  301. #define I2S_I2SCFGR_CLEAR_MASK (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \
  302. SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD | \
  303. SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD )
  304. #define I2S_I2SPR_CLEAR_MASK 0x0002U
  305. /**
  306. * @}
  307. */
  308. /* Private macros ------------------------------------------------------------*/
  309. /** @defgroup I2S_LL_Private_Macros I2S Private Macros
  310. * @{
  311. */
  312. #define IS_LL_I2S_DATAFORMAT(__VALUE__) (((__VALUE__) == LL_I2S_DATAFORMAT_16B) \
  313. || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
  314. || ((__VALUE__) == LL_I2S_DATAFORMAT_24B) \
  315. || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
  316. #define IS_LL_I2S_CPOL(__VALUE__) (((__VALUE__) == LL_I2S_POLARITY_LOW) \
  317. || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
  318. #define IS_LL_I2S_STANDARD(__VALUE__) (((__VALUE__) == LL_I2S_STANDARD_PHILIPS) \
  319. || ((__VALUE__) == LL_I2S_STANDARD_MSB) \
  320. || ((__VALUE__) == LL_I2S_STANDARD_LSB) \
  321. || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
  322. || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
  323. #define IS_LL_I2S_MODE(__VALUE__) (((__VALUE__) == LL_I2S_MODE_SLAVE_TX) \
  324. || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX) \
  325. || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
  326. || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
  327. #define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
  328. || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
  329. #define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K) \
  330. && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
  331. || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
  332. #define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__) ((__VALUE__) >= 0x2U)
  333. #define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
  334. || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
  335. /**
  336. * @}
  337. */
  338. /* Private function prototypes -----------------------------------------------*/
  339. /* Exported functions --------------------------------------------------------*/
  340. /** @addtogroup I2S_LL_Exported_Functions
  341. * @{
  342. */
  343. /** @addtogroup I2S_LL_EF_Init
  344. * @{
  345. */
  346. /**
  347. * @brief De-initialize the SPI/I2S registers to their default reset values.
  348. * @param SPIx SPI Instance
  349. * @retval An ErrorStatus enumeration value:
  350. * - SUCCESS: SPI registers are de-initialized
  351. * - ERROR: SPI registers are not de-initialized
  352. */
  353. ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
  354. {
  355. return LL_SPI_DeInit(SPIx);
  356. }
  357. /**
  358. * @brief Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
  359. * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
  360. * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  361. * @param SPIx SPI Instance
  362. * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
  363. * @retval An ErrorStatus enumeration value:
  364. * - SUCCESS: SPI registers are Initialized
  365. * - ERROR: SPI registers are not Initialized
  366. */
  367. ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
  368. {
  369. uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
  370. uint32_t tmp = 0U;
  371. uint32_t sourceclock = 0U;
  372. ErrorStatus status = ERROR;
  373. /* Check the I2S parameters */
  374. assert_param(IS_I2S_ALL_INSTANCE(SPIx));
  375. assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
  376. assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
  377. assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
  378. assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
  379. assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
  380. assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
  381. if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
  382. {
  383. /*---------------------------- SPIx I2SCFGR Configuration --------------------
  384. * Configure SPIx I2SCFGR with parameters:
  385. * - Mode: SPI_I2SCFGR_I2SCFG[1:0] bit
  386. * - Standard: SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
  387. * - DataFormat: SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
  388. * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
  389. */
  390. /* Write to SPIx I2SCFGR */
  391. MODIFY_REG(SPIx->I2SCFGR,
  392. I2S_I2SCFGR_CLEAR_MASK,
  393. I2S_InitStruct->Mode | I2S_InitStruct->Standard |
  394. I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
  395. SPI_I2SCFGR_I2SMOD);
  396. /*---------------------------- SPIx I2SPR Configuration ----------------------
  397. * Configure SPIx I2SPR with parameters:
  398. * - MCLKOutput: SPI_I2SPR_MCKOE bit
  399. * - AudioFreq: SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
  400. */
  401. /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
  402. * else, default values are used: i2sodd = 0U, i2sdiv = 2U.
  403. */
  404. if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
  405. {
  406. /* Check the frame length (For the Prescaler computing)
  407. * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
  408. */
  409. if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
  410. {
  411. /* Packet length is 32 bits */
  412. packetlength = 2U;
  413. }
  414. /* If an external I2S clock has to be used, the specific define should be set
  415. in the project configuration or in the stm32f7xx_ll_rcc.h file */
  416. /* Get the I2S source clock value */
  417. sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S1_CLKSOURCE);
  418. /* Compute the Real divider depending on the MCLK output state with a floating point */
  419. if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
  420. {
  421. /* MCLK output is enabled */
  422. tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
  423. }
  424. else
  425. {
  426. /* MCLK output is disabled */
  427. tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
  428. }
  429. /* Remove the floating point */
  430. tmp = tmp / 10U;
  431. /* Check the parity of the divider */
  432. i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);
  433. /* Compute the i2sdiv prescaler */
  434. i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
  435. /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
  436. i2sodd = (uint16_t)(i2sodd << 8U);
  437. }
  438. /* Test if the divider is 1 or 0 or greater than 0xFF */
  439. if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
  440. {
  441. /* Set the default values */
  442. i2sdiv = 2U;
  443. i2sodd = 0U;
  444. }
  445. /* Write to SPIx I2SPR register the computed value */
  446. WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
  447. status = SUCCESS;
  448. }
  449. return status;
  450. }
  451. /**
  452. * @brief Set each @ref LL_I2S_InitTypeDef field to default value.
  453. * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
  454. * whose fields will be set to default values.
  455. * @retval None
  456. */
  457. void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
  458. {
  459. /*--------------- Reset I2S init structure parameters values -----------------*/
  460. I2S_InitStruct->Mode = LL_I2S_MODE_SLAVE_TX;
  461. I2S_InitStruct->Standard = LL_I2S_STANDARD_PHILIPS;
  462. I2S_InitStruct->DataFormat = LL_I2S_DATAFORMAT_16B;
  463. I2S_InitStruct->MCLKOutput = LL_I2S_MCLK_OUTPUT_DISABLE;
  464. I2S_InitStruct->AudioFreq = LL_I2S_AUDIOFREQ_DEFAULT;
  465. I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW;
  466. }
  467. /**
  468. * @brief Set linear and parity prescaler.
  469. * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
  470. * Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
  471. * @param SPIx SPI Instance
  472. * @param PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF.
  473. * @param PrescalerParity This parameter can be one of the following values:
  474. * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
  475. * @arg @ref LL_I2S_PRESCALER_PARITY_ODD
  476. * @retval None
  477. */
  478. void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
  479. {
  480. /* Check the I2S parameters */
  481. assert_param(IS_I2S_ALL_INSTANCE(SPIx));
  482. assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
  483. assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
  484. /* Write to SPIx I2SPR */
  485. MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
  486. }
  487. /**
  488. * @}
  489. */
  490. /**
  491. * @}
  492. */
  493. /**
  494. * @}
  495. */
  496. #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) || defined(SPI4) || defined(SPI5) || defined(SPI6) */
  497. /**
  498. * @}
  499. */
  500. #endif /* USE_FULL_LL_DRIVER */
  501. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/