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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32H7xx_LL_DMA2D_H
  21. #define STM32H7xx_LL_DMA2D_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32h7xx.h"
  27. /** @addtogroup STM32H7xx_LL_Driver
  28. * @{
  29. */
  30. #if defined (DMA2D)
  31. /** @defgroup DMA2D_LL DMA2D
  32. * @{
  33. */
  34. /* Private types -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private constants ---------------------------------------------------------*/
  37. /* Private macros ------------------------------------------------------------*/
  38. #if defined(USE_FULL_LL_DRIVER)
  39. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  40. * @{
  41. */
  42. /**
  43. * @}
  44. */
  45. #endif /*USE_FULL_LL_DRIVER*/
  46. /* Exported types ------------------------------------------------------------*/
  47. #if defined(USE_FULL_LL_DRIVER)
  48. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  49. * @{
  50. */
  51. /**
  52. * @brief LL DMA2D Init Structure Definition
  53. */
  54. typedef struct
  55. {
  56. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  57. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  58. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  62. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  63. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  64. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  65. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  66. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  67. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  68. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  69. function @ref LL_DMA2D_ConfigOutputColor(). */
  70. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  71. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  72. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  73. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  74. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  75. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  77. function @ref LL_DMA2D_ConfigOutputColor(). */
  78. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  90. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  91. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  92. function @ref LL_DMA2D_ConfigOutputColor(). */
  93. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  94. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  95. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  96. uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image.
  97. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE.
  98. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */
  99. uint32_t LineOffsetMode; /*!< Specifies the output line offset mode.
  100. - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE.
  101. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */
  102. uint32_t LineOffset; /*!< Specifies the output line offset value.
  103. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  104. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  105. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  106. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  107. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  108. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  109. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  110. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  111. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  112. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  113. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  114. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  115. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  116. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  117. } LL_DMA2D_InitTypeDef;
  118. /**
  119. * @brief LL DMA2D Layer Configuration Structure Definition
  120. */
  121. typedef struct
  122. {
  123. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  124. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  125. This parameter can be modified afterwards using unitary functions
  126. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  127. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  128. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  129. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  130. This parameter can be modified afterwards using unitary functions
  131. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  132. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  133. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  134. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  135. This parameter can be modified afterwards using unitary functions
  136. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  137. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  138. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  139. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  140. This parameter can be modified afterwards using unitary functions
  141. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  142. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  143. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  144. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  145. This parameter can be modified afterwards using unitary functions
  146. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  147. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  148. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  149. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  150. This parameter can be modified afterwards using unitary functions
  151. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  152. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  153. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  154. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  155. This parameter can be modified afterwards using unitary functions
  156. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  157. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  158. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  159. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  160. This parameter can be modified afterwards using unitary functions
  161. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  162. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  163. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  164. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  165. This parameter can be modified afterwards using unitary functions
  166. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  167. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  168. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  169. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  170. This parameter can be modified afterwards using unitary functions
  171. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  172. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  173. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  174. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  175. This parameter can be modified afterwards using unitary functions
  176. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  177. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  178. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  179. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  180. This parameter can be modified afterwards using unitary functions
  181. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  182. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  183. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  184. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  185. This parameter can be modified afterwards using unitary functions
  186. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  187. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  188. uint32_t ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode
  189. This parameter is applicable for foreground layer only.
  190. This parameter can be one value of @ref DMA2D_LL_CHROMA_SUB_SAMPLING
  191. This parameter can be modified afterwards using unitary functions
  192. - @ref LL_DMA2D_FGND_SetChrSubSampling() for foreground layer. */
  193. } LL_DMA2D_LayerCfgTypeDef;
  194. /**
  195. * @brief LL DMA2D Output Color Structure Definition
  196. */
  197. typedef struct
  198. {
  199. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  200. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  201. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  202. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  203. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  204. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  205. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  206. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  207. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  208. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  209. function @ref LL_DMA2D_ConfigOutputColor(). */
  210. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  211. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  212. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  213. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  215. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  216. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  217. function @ref LL_DMA2D_ConfigOutputColor(). */
  218. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  219. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  220. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  221. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  223. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  224. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  225. function @ref LL_DMA2D_ConfigOutputColor(). */
  226. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  227. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  228. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  229. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  230. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  231. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  232. function @ref LL_DMA2D_ConfigOutputColor(). */
  233. } LL_DMA2D_ColorTypeDef;
  234. /**
  235. * @}
  236. */
  237. #endif /* USE_FULL_LL_DRIVER */
  238. /* Exported constants --------------------------------------------------------*/
  239. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  240. * @{
  241. */
  242. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  243. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  244. * @{
  245. */
  246. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  247. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  248. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  249. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  250. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  251. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  252. /**
  253. * @}
  254. */
  255. /** @defgroup DMA2D_LL_EC_IT IT Defines
  256. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  257. * @{
  258. */
  259. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  260. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  261. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  262. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  263. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  264. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  265. /**
  266. * @}
  267. */
  268. /** @defgroup DMA2D_LL_EC_MODE Mode
  269. * @{
  270. */
  271. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  272. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  273. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  274. #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */
  275. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */
  276. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */
  277. /**
  278. * @}
  279. */
  280. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  281. * @{
  282. */
  283. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  284. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  285. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  286. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  287. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  288. /**
  289. * @}
  290. */
  291. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  292. * @{
  293. */
  294. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  295. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  296. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  297. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  298. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  299. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  300. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  301. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  302. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  303. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  304. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  305. #define LL_DMA2D_INPUT_MODE_YCBCR (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< YCbCr */
  306. /**
  307. * @}
  308. */
  309. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  310. * @{
  311. */
  312. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  313. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  314. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  315. with original alpha channel value */
  316. /**
  317. * @}
  318. */
  319. /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode
  320. * @{
  321. */
  322. #define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U /*!< Regular order */
  323. #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */
  324. /**
  325. * @}
  326. */
  327. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  328. * @{
  329. */
  330. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  331. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  332. /**
  333. * @}
  334. */
  335. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  336. * @{
  337. */
  338. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  339. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  340. /**
  341. * @}
  342. */
  343. /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode
  344. * @{
  345. */
  346. #define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U /*!< Line offsets are expressed in pixels */
  347. #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */
  348. /**
  349. * @}
  350. */
  351. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  352. * @{
  353. */
  354. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  355. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  356. /**
  357. * @}
  358. */
  359. /** @defgroup DMA2D_LL_CHROMA_SUB_SAMPLING Chroma Sub Sampling
  360. * @{
  361. */
  362. #define LL_DMA2D_CSS_444 0x00000000U /*!< No chroma sub-sampling 4:4:4 */
  363. #define LL_DMA2D_CSS_422 DMA2D_FGPFCCR_CSS_0 /*!< chroma sub-sampling 4:2:2 */
  364. #define LL_DMA2D_CSS_420 DMA2D_FGPFCCR_CSS_1 /*!< chroma sub-sampling 4:2:0 */
  365. /**
  366. * @}
  367. */
  368. /**
  369. * @}
  370. */
  371. /* Exported macro ------------------------------------------------------------*/
  372. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  373. * @{
  374. */
  375. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  376. * @{
  377. */
  378. /**
  379. * @brief Write a value in DMA2D register.
  380. * @param __INSTANCE__ DMA2D Instance
  381. * @param __REG__ Register to be written
  382. * @param __VALUE__ Value to be written in the register
  383. * @retval None
  384. */
  385. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  386. /**
  387. * @brief Read a value in DMA2D register.
  388. * @param __INSTANCE__ DMA2D Instance
  389. * @param __REG__ Register to be read
  390. * @retval Register value
  391. */
  392. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  393. /**
  394. * @}
  395. */
  396. /**
  397. * @}
  398. */
  399. /* Exported functions --------------------------------------------------------*/
  400. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  401. * @{
  402. */
  403. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  404. * @{
  405. */
  406. /**
  407. * @brief Start a DMA2D transfer.
  408. * @rmtoll CR START LL_DMA2D_Start
  409. * @param DMA2Dx DMA2D Instance
  410. * @retval None
  411. */
  412. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  413. {
  414. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  415. }
  416. /**
  417. * @brief Indicate if a DMA2D transfer is ongoing.
  418. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  419. * @param DMA2Dx DMA2D Instance
  420. * @retval State of bit (1 or 0).
  421. */
  422. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  423. {
  424. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  425. }
  426. /**
  427. * @brief Suspend DMA2D transfer.
  428. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  429. * @rmtoll CR SUSP LL_DMA2D_Suspend
  430. * @param DMA2Dx DMA2D Instance
  431. * @retval None
  432. */
  433. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  434. {
  435. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  436. }
  437. /**
  438. * @brief Resume DMA2D transfer.
  439. * @note This API can be used to resume automatic foreground or background CLUT loading.
  440. * @rmtoll CR SUSP LL_DMA2D_Resume
  441. * @param DMA2Dx DMA2D Instance
  442. * @retval None
  443. */
  444. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  445. {
  446. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  447. }
  448. /**
  449. * @brief Indicate if DMA2D transfer is suspended.
  450. * @note This API can be used to indicate whether or not automatic foreground or
  451. * background CLUT loading is suspended.
  452. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  453. * @param DMA2Dx DMA2D Instance
  454. * @retval State of bit (1 or 0).
  455. */
  456. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  457. {
  458. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  459. }
  460. /**
  461. * @brief Abort DMA2D transfer.
  462. * @note This API can be used to abort automatic foreground or background CLUT loading.
  463. * @rmtoll CR ABORT LL_DMA2D_Abort
  464. * @param DMA2Dx DMA2D Instance
  465. * @retval None
  466. */
  467. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  468. {
  469. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  470. }
  471. /**
  472. * @brief Indicate if DMA2D transfer is aborted.
  473. * @note This API can be used to indicate whether or not automatic foreground or
  474. * background CLUT loading is aborted.
  475. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  476. * @param DMA2Dx DMA2D Instance
  477. * @retval State of bit (1 or 0).
  478. */
  479. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  480. {
  481. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  482. }
  483. /**
  484. * @brief Set DMA2D mode.
  485. * @rmtoll CR MODE LL_DMA2D_SetMode
  486. * @param DMA2Dx DMA2D Instance
  487. * @param Mode This parameter can be one of the following values:
  488. * @arg @ref LL_DMA2D_MODE_M2M
  489. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  490. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  491. * @arg @ref LL_DMA2D_MODE_R2M
  492. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG
  493. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG
  494. * @retval None
  495. */
  496. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  497. {
  498. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  499. }
  500. /**
  501. * @brief Return DMA2D mode
  502. * @rmtoll CR MODE LL_DMA2D_GetMode
  503. * @param DMA2Dx DMA2D Instance
  504. * @retval Returned value can be one of the following values:
  505. * @arg @ref LL_DMA2D_MODE_M2M
  506. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  507. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  508. * @arg @ref LL_DMA2D_MODE_R2M
  509. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG
  510. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG
  511. */
  512. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  513. {
  514. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  515. }
  516. /**
  517. * @brief Set DMA2D output color mode.
  518. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  519. * @param DMA2Dx DMA2D Instance
  520. * @param ColorMode This parameter can be one of the following values:
  521. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  522. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  523. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  524. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  525. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  526. * @retval None
  527. */
  528. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  529. {
  530. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  531. }
  532. /**
  533. * @brief Return DMA2D output color mode.
  534. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  535. * @param DMA2Dx DMA2D Instance
  536. * @retval Returned value can be one of the following values:
  537. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  538. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  539. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  540. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  541. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  542. */
  543. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  544. {
  545. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  546. }
  547. /**
  548. * @brief Set DMA2D output Red Blue swap mode.
  549. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  550. * @param DMA2Dx DMA2D Instance
  551. * @param RBSwapMode This parameter can be one of the following values:
  552. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  553. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  554. * @retval None
  555. */
  556. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  557. {
  558. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  559. }
  560. /**
  561. * @brief Return DMA2D output Red Blue swap mode.
  562. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  563. * @param DMA2Dx DMA2D Instance
  564. * @retval Returned value can be one of the following values:
  565. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  566. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  567. */
  568. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  569. {
  570. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  571. }
  572. /**
  573. * @brief Set DMA2D output alpha inversion mode.
  574. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  575. * @param DMA2Dx DMA2D Instance
  576. * @param AlphaInversionMode This parameter can be one of the following values:
  577. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  578. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  579. * @retval None
  580. */
  581. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  582. {
  583. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  584. }
  585. /**
  586. * @brief Return DMA2D output alpha inversion mode.
  587. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  588. * @param DMA2Dx DMA2D Instance
  589. * @retval Returned value can be one of the following values:
  590. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  591. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  592. */
  593. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  594. {
  595. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  596. }
  597. /**
  598. * @brief Set DMA2D output swap mode.
  599. * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode
  600. * @param DMA2Dx DMA2D Instance
  601. * @param OutputSwapMode This parameter can be one of the following values:
  602. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  603. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  604. * @retval None
  605. */
  606. __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode)
  607. {
  608. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode);
  609. }
  610. /**
  611. * @brief Return DMA2D output swap mode.
  612. * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode
  613. * @param DMA2Dx DMA2D Instance
  614. * @retval Returned value can be one of the following values:
  615. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  616. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  617. */
  618. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx)
  619. {
  620. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB));
  621. }
  622. /**
  623. * @brief Set DMA2D line offset mode.
  624. * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode
  625. * @param DMA2Dx DMA2D Instance
  626. * @param LineOffsetMode This parameter can be one of the following values:
  627. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  628. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  629. * @retval None
  630. */
  631. __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode)
  632. {
  633. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode);
  634. }
  635. /**
  636. * @brief Return DMA2D line offset mode.
  637. * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode
  638. * @param DMA2Dx DMA2D Instance
  639. * @retval Returned value can be one of the following values:
  640. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  641. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  642. */
  643. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx)
  644. {
  645. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM));
  646. }
  647. /**
  648. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  649. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  650. * @param DMA2Dx DMA2D Instance
  651. * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF
  652. * @retval None
  653. */
  654. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  655. {
  656. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  657. }
  658. /**
  659. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  660. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  661. * @param DMA2Dx DMA2D Instance
  662. * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF
  663. @endif
  664. */
  665. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  666. {
  667. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  668. }
  669. /**
  670. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  671. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  672. * @param DMA2Dx DMA2D Instance
  673. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  674. * @retval None
  675. */
  676. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  677. {
  678. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  679. }
  680. /**
  681. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  682. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  683. * @param DMA2Dx DMA2D Instance
  684. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  685. */
  686. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  687. {
  688. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  689. }
  690. /**
  691. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  692. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  693. * @param DMA2Dx DMA2D Instance
  694. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  695. * @retval None
  696. */
  697. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  698. {
  699. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  700. }
  701. /**
  702. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  703. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  704. * @param DMA2Dx DMA2D Instance
  705. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  706. */
  707. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  708. {
  709. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  710. }
  711. /**
  712. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  713. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  714. * @param DMA2Dx DMA2D Instance
  715. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  716. * @retval None
  717. */
  718. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  719. {
  720. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  721. }
  722. /**
  723. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  724. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  725. * @param DMA2Dx DMA2D Instance
  726. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  727. */
  728. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  729. {
  730. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  731. }
  732. /**
  733. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  734. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  735. * RGB565, ARGB1555 or ARGB4444.
  736. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  737. * with respect to color mode is not done by the user code.
  738. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  739. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  740. * OCOLR RED LL_DMA2D_SetOutputColor\n
  741. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  742. * @param DMA2Dx DMA2D Instance
  743. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  744. * @retval None
  745. */
  746. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  747. {
  748. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  749. OutputColor);
  750. }
  751. /**
  752. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  753. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  754. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  755. * as set by @ref LL_DMA2D_SetOutputColorMode.
  756. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  757. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  758. * OCOLR RED LL_DMA2D_GetOutputColor\n
  759. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  760. * @param DMA2Dx DMA2D Instance
  761. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  762. */
  763. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  764. {
  765. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  766. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  767. }
  768. /**
  769. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  770. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  771. * @param DMA2Dx DMA2D Instance
  772. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  773. * @retval None
  774. */
  775. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  776. {
  777. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  778. }
  779. /**
  780. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  781. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  782. * @param DMA2Dx DMA2D Instance
  783. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  784. */
  785. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  786. {
  787. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  788. }
  789. /**
  790. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  791. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  792. * @param DMA2Dx DMA2D Instance
  793. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  794. * @retval None
  795. */
  796. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  797. {
  798. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  799. }
  800. /**
  801. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  802. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  803. * @param DMA2Dx DMA2D Instance
  804. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  805. */
  806. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  807. {
  808. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  809. }
  810. /**
  811. * @brief Enable DMA2D dead time functionality.
  812. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  813. * @param DMA2Dx DMA2D Instance
  814. * @retval None
  815. */
  816. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  817. {
  818. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  819. }
  820. /**
  821. * @brief Disable DMA2D dead time functionality.
  822. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  823. * @param DMA2Dx DMA2D Instance
  824. * @retval None
  825. */
  826. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  827. {
  828. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  829. }
  830. /**
  831. * @brief Indicate if DMA2D dead time functionality is enabled.
  832. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  833. * @param DMA2Dx DMA2D Instance
  834. * @retval State of bit (1 or 0).
  835. */
  836. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  837. {
  838. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  839. }
  840. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  841. * @{
  842. */
  843. /**
  844. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  845. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  846. * @param DMA2Dx DMA2D Instance
  847. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  848. * @retval None
  849. */
  850. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  851. {
  852. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  853. }
  854. /**
  855. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  856. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  857. * @param DMA2Dx DMA2D Instance
  858. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  859. */
  860. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  861. {
  862. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  863. }
  864. /**
  865. * @brief Enable DMA2D foreground CLUT loading.
  866. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  867. * @param DMA2Dx DMA2D Instance
  868. * @retval None
  869. */
  870. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  871. {
  872. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  873. }
  874. /**
  875. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  876. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  877. * @param DMA2Dx DMA2D Instance
  878. * @retval State of bit (1 or 0).
  879. */
  880. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  881. {
  882. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  883. }
  884. /**
  885. * @brief Set DMA2D foreground color mode.
  886. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  887. * @param DMA2Dx DMA2D Instance
  888. * @param ColorMode This parameter can be one of the following values:
  889. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  890. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  891. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  892. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  893. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  894. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  895. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  896. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  897. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  898. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  899. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  900. * @retval None
  901. */
  902. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  903. {
  904. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  905. }
  906. /**
  907. * @brief Return DMA2D foreground color mode.
  908. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  909. * @param DMA2Dx DMA2D Instance
  910. * @retval Returned value can be one of the following values:
  911. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  912. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  913. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  914. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  915. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  916. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  917. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  918. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  919. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  920. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  921. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  922. */
  923. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  924. {
  925. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  926. }
  927. /**
  928. * @brief Set DMA2D foreground alpha mode.
  929. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  930. * @param DMA2Dx DMA2D Instance
  931. * @param AphaMode This parameter can be one of the following values:
  932. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  933. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  934. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  935. * @retval None
  936. */
  937. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  938. {
  939. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  940. }
  941. /**
  942. * @brief Return DMA2D foreground alpha mode.
  943. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  944. * @param DMA2Dx DMA2D Instance
  945. * @retval Returned value can be one of the following values:
  946. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  947. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  948. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  949. */
  950. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  951. {
  952. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  953. }
  954. /**
  955. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  956. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  957. * @param DMA2Dx DMA2D Instance
  958. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  959. * @retval None
  960. */
  961. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  962. {
  963. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  964. }
  965. /**
  966. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  967. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  968. * @param DMA2Dx DMA2D Instance
  969. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  970. */
  971. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  972. {
  973. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  974. }
  975. /**
  976. * @brief Set DMA2D foreground Red Blue swap mode.
  977. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  978. * @param DMA2Dx DMA2D Instance
  979. * @param RBSwapMode This parameter can be one of the following values:
  980. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  981. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  982. * @retval None
  983. */
  984. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  985. {
  986. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  987. }
  988. /**
  989. * @brief Return DMA2D foreground Red Blue swap mode.
  990. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  991. * @param DMA2Dx DMA2D Instance
  992. * @retval Returned value can be one of the following values:
  993. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  994. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  995. */
  996. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  997. {
  998. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  999. }
  1000. /**
  1001. * @brief Set DMA2D foreground alpha inversion mode.
  1002. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  1003. * @param DMA2Dx DMA2D Instance
  1004. * @param AlphaInversionMode This parameter can be one of the following values:
  1005. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1006. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1007. * @retval None
  1008. */
  1009. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1010. {
  1011. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  1012. }
  1013. /**
  1014. * @brief Return DMA2D foreground alpha inversion mode.
  1015. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  1016. * @param DMA2Dx DMA2D Instance
  1017. * @retval Returned value can be one of the following values:
  1018. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1019. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1020. */
  1021. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1022. {
  1023. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  1024. }
  1025. /**
  1026. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1027. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  1028. * @param DMA2Dx DMA2D Instance
  1029. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1030. * @retval None
  1031. */
  1032. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1033. {
  1034. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  1035. }
  1036. /**
  1037. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1038. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  1039. * @param DMA2Dx DMA2D Instance
  1040. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  1041. */
  1042. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1043. {
  1044. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  1045. }
  1046. /**
  1047. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  1048. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  1049. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  1050. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  1051. * @param DMA2Dx DMA2D Instance
  1052. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1053. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1054. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1055. * @retval None
  1056. */
  1057. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1058. {
  1059. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  1060. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  1061. }
  1062. /**
  1063. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1064. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  1065. * @param DMA2Dx DMA2D Instance
  1066. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1067. * @retval None
  1068. */
  1069. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1070. {
  1071. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  1072. }
  1073. /**
  1074. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1075. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1076. * @param DMA2Dx DMA2D Instance
  1077. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1078. */
  1079. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1080. {
  1081. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1082. }
  1083. /**
  1084. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1085. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1086. * @param DMA2Dx DMA2D Instance
  1087. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1088. * @retval None
  1089. */
  1090. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1091. {
  1092. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1093. }
  1094. /**
  1095. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1096. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1097. * @param DMA2Dx DMA2D Instance
  1098. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1099. */
  1100. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1101. {
  1102. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1103. }
  1104. /**
  1105. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1106. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1107. * @param DMA2Dx DMA2D Instance
  1108. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1109. * @retval None
  1110. */
  1111. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1112. {
  1113. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1114. }
  1115. /**
  1116. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1117. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1118. * @param DMA2Dx DMA2D Instance
  1119. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1120. */
  1121. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1122. {
  1123. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1124. }
  1125. /**
  1126. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1127. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1128. * @param DMA2Dx DMA2D Instance
  1129. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1130. * @retval None
  1131. */
  1132. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1133. {
  1134. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1135. }
  1136. /**
  1137. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1138. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1139. * @param DMA2Dx DMA2D Instance
  1140. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1141. */
  1142. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1143. {
  1144. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1145. }
  1146. /**
  1147. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1148. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1149. * @param DMA2Dx DMA2D Instance
  1150. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1151. * @retval None
  1152. */
  1153. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1154. {
  1155. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1156. }
  1157. /**
  1158. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1159. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1160. * @param DMA2Dx DMA2D Instance
  1161. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1162. */
  1163. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1164. {
  1165. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1166. }
  1167. /**
  1168. * @brief Set DMA2D foreground CLUT color mode.
  1169. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1170. * @param DMA2Dx DMA2D Instance
  1171. * @param CLUTColorMode This parameter can be one of the following values:
  1172. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1173. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1174. * @retval None
  1175. */
  1176. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1177. {
  1178. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1179. }
  1180. /**
  1181. * @brief Return DMA2D foreground CLUT color mode.
  1182. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1183. * @param DMA2Dx DMA2D Instance
  1184. * @retval Returned value can be one of the following values:
  1185. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1186. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1187. */
  1188. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1189. {
  1190. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1191. }
  1192. /**
  1193. * @brief Set DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
  1194. * @rmtoll FGPFCCR CSS LL_DMA2D_FGND_SetChrSubSampling
  1195. * @param DMA2Dx DMA2D Instance
  1196. * @param ChromaSubSampling This parameter can be one of the following values:
  1197. * @arg @ref LL_DMA2D_CSS_444
  1198. * @arg @ref LL_DMA2D_CSS_422
  1199. * @arg @ref LL_DMA2D_CSS_420
  1200. * @retval None
  1201. */
  1202. __STATIC_INLINE void LL_DMA2D_FGND_SetChrSubSampling(DMA2D_TypeDef *DMA2Dx, uint32_t ChromaSubSampling)
  1203. {
  1204. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS, ChromaSubSampling);
  1205. }
  1206. /**
  1207. * @brief Return DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
  1208. * @rmtoll FGPFCCR CSS LL_DMA2D_FGND_GetChrSubSampling
  1209. * @param DMA2Dx DMA2D Instance
  1210. * @retval Returned value can be one of the following values:
  1211. * @arg @ref LL_DMA2D_CSS_444
  1212. * @arg @ref LL_DMA2D_CSS_422
  1213. * @arg @ref LL_DMA2D_CSS_420
  1214. */
  1215. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetChrSubSampling(DMA2D_TypeDef *DMA2Dx)
  1216. {
  1217. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS));
  1218. }
  1219. /**
  1220. * @}
  1221. */
  1222. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1223. * @{
  1224. */
  1225. /**
  1226. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1227. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1228. * @param DMA2Dx DMA2D Instance
  1229. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1230. * @retval None
  1231. */
  1232. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1233. {
  1234. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1235. }
  1236. /**
  1237. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1238. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1239. * @param DMA2Dx DMA2D Instance
  1240. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1241. */
  1242. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1243. {
  1244. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1245. }
  1246. /**
  1247. * @brief Enable DMA2D background CLUT loading.
  1248. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1249. * @param DMA2Dx DMA2D Instance
  1250. * @retval None
  1251. */
  1252. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1253. {
  1254. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1255. }
  1256. /**
  1257. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1258. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1259. * @param DMA2Dx DMA2D Instance
  1260. * @retval State of bit (1 or 0).
  1261. */
  1262. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1263. {
  1264. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1265. }
  1266. /**
  1267. * @brief Set DMA2D background color mode.
  1268. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1269. * @param DMA2Dx DMA2D Instance
  1270. * @param ColorMode This parameter can be one of the following values:
  1271. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1272. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1273. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1274. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1275. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1276. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1277. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1278. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1279. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1280. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1281. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1282. * @retval None
  1283. */
  1284. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1285. {
  1286. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1287. }
  1288. /**
  1289. * @brief Return DMA2D background color mode.
  1290. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1291. * @param DMA2Dx DMA2D Instance
  1292. * @retval Returned value can be one of the following values:
  1293. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1294. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1295. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1296. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1297. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1298. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1299. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1300. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1301. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1302. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1303. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1304. */
  1305. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1306. {
  1307. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1308. }
  1309. /**
  1310. * @brief Set DMA2D background alpha mode.
  1311. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1312. * @param DMA2Dx DMA2D Instance
  1313. * @param AphaMode This parameter can be one of the following values:
  1314. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1315. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1316. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1317. * @retval None
  1318. */
  1319. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1320. {
  1321. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1322. }
  1323. /**
  1324. * @brief Return DMA2D background alpha mode.
  1325. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1326. * @param DMA2Dx DMA2D Instance
  1327. * @retval Returned value can be one of the following values:
  1328. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1329. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1330. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1331. */
  1332. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1333. {
  1334. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1335. }
  1336. /**
  1337. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1338. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1339. * @param DMA2Dx DMA2D Instance
  1340. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1341. * @retval None
  1342. */
  1343. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1344. {
  1345. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1346. }
  1347. /**
  1348. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1349. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1350. * @param DMA2Dx DMA2D Instance
  1351. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1352. */
  1353. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1354. {
  1355. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1356. }
  1357. /**
  1358. * @brief Set DMA2D background Red Blue swap mode.
  1359. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1360. * @param DMA2Dx DMA2D Instance
  1361. * @param RBSwapMode This parameter can be one of the following values:
  1362. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1363. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1364. * @retval None
  1365. */
  1366. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1367. {
  1368. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1369. }
  1370. /**
  1371. * @brief Return DMA2D background Red Blue swap mode.
  1372. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1373. * @param DMA2Dx DMA2D Instance
  1374. * @retval Returned value can be one of the following values:
  1375. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1376. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1377. */
  1378. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1379. {
  1380. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1381. }
  1382. /**
  1383. * @brief Set DMA2D background alpha inversion mode.
  1384. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1385. * @param DMA2Dx DMA2D Instance
  1386. * @param AlphaInversionMode This parameter can be one of the following values:
  1387. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1388. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1389. * @retval None
  1390. */
  1391. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1392. {
  1393. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1394. }
  1395. /**
  1396. * @brief Return DMA2D background alpha inversion mode.
  1397. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1398. * @param DMA2Dx DMA2D Instance
  1399. * @retval Returned value can be one of the following values:
  1400. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1401. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1402. */
  1403. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1404. {
  1405. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1406. }
  1407. /**
  1408. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1409. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1410. * @param DMA2Dx DMA2D Instance
  1411. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1412. * @retval None
  1413. */
  1414. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1415. {
  1416. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1417. }
  1418. /**
  1419. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1420. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1421. * @param DMA2Dx DMA2D Instance
  1422. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1423. */
  1424. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1425. {
  1426. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1427. }
  1428. /**
  1429. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1430. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1431. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1432. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1433. * @param DMA2Dx DMA2D Instance
  1434. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1435. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1436. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1437. * @retval None
  1438. */
  1439. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1440. {
  1441. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1442. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1443. }
  1444. /**
  1445. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1446. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1447. * @param DMA2Dx DMA2D Instance
  1448. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1449. * @retval None
  1450. */
  1451. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1452. {
  1453. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1454. }
  1455. /**
  1456. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1457. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1458. * @param DMA2Dx DMA2D Instance
  1459. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1460. */
  1461. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1462. {
  1463. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1464. }
  1465. /**
  1466. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1467. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1468. * @param DMA2Dx DMA2D Instance
  1469. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1470. * @retval None
  1471. */
  1472. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1473. {
  1474. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1475. }
  1476. /**
  1477. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1478. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1479. * @param DMA2Dx DMA2D Instance
  1480. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1481. */
  1482. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1483. {
  1484. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1485. }
  1486. /**
  1487. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1488. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1489. * @param DMA2Dx DMA2D Instance
  1490. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1491. * @retval None
  1492. */
  1493. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1494. {
  1495. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1496. }
  1497. /**
  1498. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1499. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1500. * @param DMA2Dx DMA2D Instance
  1501. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1502. */
  1503. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1504. {
  1505. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1506. }
  1507. /**
  1508. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1509. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1510. * @param DMA2Dx DMA2D Instance
  1511. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1512. * @retval None
  1513. */
  1514. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1515. {
  1516. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1517. }
  1518. /**
  1519. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1520. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1521. * @param DMA2Dx DMA2D Instance
  1522. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1523. */
  1524. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1525. {
  1526. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1527. }
  1528. /**
  1529. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1530. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1531. * @param DMA2Dx DMA2D Instance
  1532. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1533. * @retval None
  1534. */
  1535. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1536. {
  1537. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1538. }
  1539. /**
  1540. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1541. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1542. * @param DMA2Dx DMA2D Instance
  1543. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1544. */
  1545. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1546. {
  1547. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1548. }
  1549. /**
  1550. * @brief Set DMA2D background CLUT color mode.
  1551. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1552. * @param DMA2Dx DMA2D Instance
  1553. * @param CLUTColorMode This parameter can be one of the following values:
  1554. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1555. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1556. * @retval None
  1557. */
  1558. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1559. {
  1560. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1561. }
  1562. /**
  1563. * @brief Return DMA2D background CLUT color mode.
  1564. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1565. * @param DMA2Dx DMA2D Instance
  1566. * @retval Returned value can be one of the following values:
  1567. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1568. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1569. */
  1570. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1571. {
  1572. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1573. }
  1574. /**
  1575. * @}
  1576. */
  1577. /**
  1578. * @}
  1579. */
  1580. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1581. * @{
  1582. */
  1583. /**
  1584. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1585. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1586. * @param DMA2Dx DMA2D Instance
  1587. * @retval State of bit (1 or 0).
  1588. */
  1589. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1590. {
  1591. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1592. }
  1593. /**
  1594. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1595. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1596. * @param DMA2Dx DMA2D Instance
  1597. * @retval State of bit (1 or 0).
  1598. */
  1599. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1600. {
  1601. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1602. }
  1603. /**
  1604. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1605. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1606. * @param DMA2Dx DMA2D Instance
  1607. * @retval State of bit (1 or 0).
  1608. */
  1609. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1610. {
  1611. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1612. }
  1613. /**
  1614. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1615. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1616. * @param DMA2Dx DMA2D Instance
  1617. * @retval State of bit (1 or 0).
  1618. */
  1619. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1620. {
  1621. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1622. }
  1623. /**
  1624. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1625. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1626. * @param DMA2Dx DMA2D Instance
  1627. * @retval State of bit (1 or 0).
  1628. */
  1629. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1630. {
  1631. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1632. }
  1633. /**
  1634. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1635. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1636. * @param DMA2Dx DMA2D Instance
  1637. * @retval State of bit (1 or 0).
  1638. */
  1639. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1640. {
  1641. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1642. }
  1643. /**
  1644. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1645. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1646. * @param DMA2Dx DMA2D Instance
  1647. * @retval None
  1648. */
  1649. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1650. {
  1651. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1652. }
  1653. /**
  1654. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1655. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1656. * @param DMA2Dx DMA2D Instance
  1657. * @retval None
  1658. */
  1659. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1660. {
  1661. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1662. }
  1663. /**
  1664. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1665. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1666. * @param DMA2Dx DMA2D Instance
  1667. * @retval None
  1668. */
  1669. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1670. {
  1671. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1672. }
  1673. /**
  1674. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1675. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1676. * @param DMA2Dx DMA2D Instance
  1677. * @retval None
  1678. */
  1679. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1680. {
  1681. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1682. }
  1683. /**
  1684. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1685. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1686. * @param DMA2Dx DMA2D Instance
  1687. * @retval None
  1688. */
  1689. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1690. {
  1691. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1692. }
  1693. /**
  1694. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1695. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1696. * @param DMA2Dx DMA2D Instance
  1697. * @retval None
  1698. */
  1699. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1700. {
  1701. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1702. }
  1703. /**
  1704. * @}
  1705. */
  1706. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1707. * @{
  1708. */
  1709. /**
  1710. * @brief Enable Configuration Error Interrupt
  1711. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1712. * @param DMA2Dx DMA2D Instance
  1713. * @retval None
  1714. */
  1715. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1716. {
  1717. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1718. }
  1719. /**
  1720. * @brief Enable CLUT Transfer Complete Interrupt
  1721. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1722. * @param DMA2Dx DMA2D Instance
  1723. * @retval None
  1724. */
  1725. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1726. {
  1727. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1728. }
  1729. /**
  1730. * @brief Enable CLUT Access Error Interrupt
  1731. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1732. * @param DMA2Dx DMA2D Instance
  1733. * @retval None
  1734. */
  1735. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1736. {
  1737. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1738. }
  1739. /**
  1740. * @brief Enable Transfer Watermark Interrupt
  1741. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1742. * @param DMA2Dx DMA2D Instance
  1743. * @retval None
  1744. */
  1745. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1746. {
  1747. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1748. }
  1749. /**
  1750. * @brief Enable Transfer Complete Interrupt
  1751. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1752. * @param DMA2Dx DMA2D Instance
  1753. * @retval None
  1754. */
  1755. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1756. {
  1757. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1758. }
  1759. /**
  1760. * @brief Enable Transfer Error Interrupt
  1761. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1762. * @param DMA2Dx DMA2D Instance
  1763. * @retval None
  1764. */
  1765. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1766. {
  1767. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1768. }
  1769. /**
  1770. * @brief Disable Configuration Error Interrupt
  1771. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1772. * @param DMA2Dx DMA2D Instance
  1773. * @retval None
  1774. */
  1775. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1776. {
  1777. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1778. }
  1779. /**
  1780. * @brief Disable CLUT Transfer Complete Interrupt
  1781. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1782. * @param DMA2Dx DMA2D Instance
  1783. * @retval None
  1784. */
  1785. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1786. {
  1787. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1788. }
  1789. /**
  1790. * @brief Disable CLUT Access Error Interrupt
  1791. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1792. * @param DMA2Dx DMA2D Instance
  1793. * @retval None
  1794. */
  1795. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1796. {
  1797. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1798. }
  1799. /**
  1800. * @brief Disable Transfer Watermark Interrupt
  1801. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1802. * @param DMA2Dx DMA2D Instance
  1803. * @retval None
  1804. */
  1805. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1806. {
  1807. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1808. }
  1809. /**
  1810. * @brief Disable Transfer Complete Interrupt
  1811. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1812. * @param DMA2Dx DMA2D Instance
  1813. * @retval None
  1814. */
  1815. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1816. {
  1817. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1818. }
  1819. /**
  1820. * @brief Disable Transfer Error Interrupt
  1821. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1822. * @param DMA2Dx DMA2D Instance
  1823. * @retval None
  1824. */
  1825. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1826. {
  1827. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1828. }
  1829. /**
  1830. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1831. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1832. * @param DMA2Dx DMA2D Instance
  1833. * @retval State of bit (1 or 0).
  1834. */
  1835. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1836. {
  1837. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1838. }
  1839. /**
  1840. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1841. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1842. * @param DMA2Dx DMA2D Instance
  1843. * @retval State of bit (1 or 0).
  1844. */
  1845. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1846. {
  1847. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1848. }
  1849. /**
  1850. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1851. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1852. * @param DMA2Dx DMA2D Instance
  1853. * @retval State of bit (1 or 0).
  1854. */
  1855. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1856. {
  1857. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1858. }
  1859. /**
  1860. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1861. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1862. * @param DMA2Dx DMA2D Instance
  1863. * @retval State of bit (1 or 0).
  1864. */
  1865. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1866. {
  1867. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1868. }
  1869. /**
  1870. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1871. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1872. * @param DMA2Dx DMA2D Instance
  1873. * @retval State of bit (1 or 0).
  1874. */
  1875. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1876. {
  1877. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1878. }
  1879. /**
  1880. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1881. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1882. * @param DMA2Dx DMA2D Instance
  1883. * @retval State of bit (1 or 0).
  1884. */
  1885. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1886. {
  1887. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1888. }
  1889. /**
  1890. * @}
  1891. */
  1892. #if defined(USE_FULL_LL_DRIVER)
  1893. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1894. * @{
  1895. */
  1896. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1897. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1898. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1899. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1900. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1901. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1902. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1903. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1904. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1905. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1906. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1907. /**
  1908. * @}
  1909. */
  1910. #endif /* USE_FULL_LL_DRIVER */
  1911. /**
  1912. * @}
  1913. */
  1914. /**
  1915. * @}
  1916. */
  1917. #endif /* defined (DMA2D) */
  1918. /**
  1919. * @}
  1920. */
  1921. #ifdef __cplusplus
  1922. }
  1923. #endif
  1924. #endif /* STM32H7xx_LL_DMA2D_H */
  1925. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/