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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_dac_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended DAC HAL module driver.
  6. * This file provides firmware functions to manage the extended
  7. * functionalities of the DAC peripheral.
  8. *
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### How to use this driver #####
  13. ==============================================================================
  14. [..]
  15. *** Dual mode IO operation ***
  16. ==============================
  17. (+) Use HAL_DACEx_DualStart() to enable both channel and start conversion
  18. for dual mode operation.
  19. If software trigger is selected, using HAL_DACEx_DualStart() will start
  20. the conversion of the value previously set by HAL_DACEx_DualSetValue().
  21. (+) Use HAL_DACEx_DualStop() to disable both channel and stop conversion
  22. for dual mode operation.
  23. (+) Use HAL_DACEx_DualStart_DMA() to enable both channel and start conversion
  24. for dual mode operation using DMA to feed DAC converters.
  25. First issued trigger will start the conversion of the value previously
  26. set by HAL_DACEx_DualSetValue().
  27. The same callbacks that are used in single mode are called in dual mode to notify
  28. transfer completion (half complete or complete), errors or underrun.
  29. (+) Use HAL_DACEx_DualStop_DMA() to disable both channel and stop conversion
  30. for dual mode operation using DMA to feed DAC converters.
  31. (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
  32. Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
  33. HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
  34. Channel 1 and Channel 2.
  35. *** Signal generation operation ***
  36. ===================================
  37. (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
  38. (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
  39. (+) HAL_DACEx_SelfCalibrate to calibrate one DAC channel.
  40. (+) HAL_DACEx_SetUserTrimming to set user trimming value.
  41. (+) HAL_DACEx_GetTrimOffset to retrieve trimming value (factory setting
  42. after reset, user setting if HAL_DACEx_SetUserTrimming have been used
  43. at least one time after reset).
  44. @endverbatim
  45. ******************************************************************************
  46. * @attention
  47. *
  48. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  49. * All rights reserved.</center></h2>
  50. *
  51. * This software component is licensed by ST under BSD 3-Clause license,
  52. * the "License"; You may not use this file except in compliance with the
  53. * License. You may obtain a copy of the License at:
  54. * opensource.org/licenses/BSD-3-Clause
  55. *
  56. ******************************************************************************
  57. */
  58. /* Includes ------------------------------------------------------------------*/
  59. #include "stm32h7xx_hal.h"
  60. /** @addtogroup STM32H7xx_HAL_Driver
  61. * @{
  62. */
  63. #ifdef HAL_DAC_MODULE_ENABLED
  64. #if defined(DAC1) || defined(DAC2)
  65. /** @defgroup DACEx DACEx
  66. * @brief DAC Extended HAL module driver
  67. * @{
  68. */
  69. /* Private typedef -----------------------------------------------------------*/
  70. /* Private define ------------------------------------------------------------*/
  71. /* Private macro -------------------------------------------------------------*/
  72. /* Private variables ---------------------------------------------------------*/
  73. /* Private function prototypes -----------------------------------------------*/
  74. /* Exported functions --------------------------------------------------------*/
  75. /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
  76. * @{
  77. */
  78. /** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
  79. * @brief Extended IO operation functions
  80. *
  81. @verbatim
  82. ==============================================================================
  83. ##### Extended features functions #####
  84. ==============================================================================
  85. [..] This section provides functions allowing to:
  86. (+) Start conversion.
  87. (+) Stop conversion.
  88. (+) Start conversion and enable DMA transfer.
  89. (+) Stop conversion and disable DMA transfer.
  90. (+) Get result of conversion.
  91. (+) Get result of dual mode conversion.
  92. @endverbatim
  93. * @{
  94. */
  95. /**
  96. * @brief Enables DAC and starts conversion of both channels.
  97. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  98. * the configuration information for the specified DAC.
  99. * @retval HAL status
  100. */
  101. HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac)
  102. {
  103. uint32_t tmp_swtrig = 0UL;
  104. /* Process locked */
  105. __HAL_LOCK(hdac);
  106. /* Change DAC state */
  107. hdac->State = HAL_DAC_STATE_BUSY;
  108. /* Enable the Peripheral */
  109. __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
  110. __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
  111. /* Check if software trigger enabled */
  112. if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_CR_TEN1)
  113. {
  114. tmp_swtrig |= DAC_SWTRIGR_SWTRIG1;
  115. }
  116. if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == DAC_CR_TEN2)
  117. {
  118. tmp_swtrig |= DAC_SWTRIGR_SWTRIG2;
  119. }
  120. /* Enable the selected DAC software conversion*/
  121. SET_BIT(hdac->Instance->SWTRIGR, tmp_swtrig);
  122. /* Change DAC state */
  123. hdac->State = HAL_DAC_STATE_READY;
  124. /* Process unlocked */
  125. __HAL_UNLOCK(hdac);
  126. /* Return function status */
  127. return HAL_OK;
  128. }
  129. /**
  130. * @brief Disables DAC and stop conversion of both channels.
  131. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  132. * the configuration information for the specified DAC.
  133. * @retval HAL status
  134. */
  135. HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
  136. {
  137. /* Disable the Peripheral */
  138. __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
  139. __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
  140. /* Change DAC state */
  141. hdac->State = HAL_DAC_STATE_READY;
  142. /* Return function status */
  143. return HAL_OK;
  144. }
  145. /**
  146. * @brief Enables DAC and starts conversion of both channel 1 and 2 of the same DAC.
  147. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  148. * the configuration information for the specified DAC.
  149. * @param Channel The DAC channel that will request data from DMA.
  150. * This parameter can be one of the following values:
  151. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  152. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  153. * @param pData The destination peripheral Buffer address.
  154. * @param Length The length of data to be transferred from memory to DAC peripheral
  155. * @param Alignment Specifies the data alignment for DAC channel.
  156. * This parameter can be one of the following values:
  157. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  158. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  159. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  160. * @retval HAL status
  161. */
  162. HAL_StatusTypeDef HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
  163. uint32_t Alignment)
  164. {
  165. HAL_StatusTypeDef status;
  166. uint32_t tmpreg = 0UL;
  167. /* Check the parameters */
  168. assert_param(IS_DAC_CHANNEL(Channel));
  169. assert_param(IS_DAC_ALIGN(Alignment));
  170. /* Process locked */
  171. __HAL_LOCK(hdac);
  172. /* Change DAC state */
  173. hdac->State = HAL_DAC_STATE_BUSY;
  174. if (Channel == DAC_CHANNEL_1)
  175. {
  176. /* Set the DMA transfer complete callback for channel1 */
  177. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  178. /* Set the DMA half transfer complete callback for channel1 */
  179. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  180. /* Set the DMA error callback for channel1 */
  181. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  182. /* Enable the selected DAC channel1 DMA request */
  183. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  184. }
  185. else
  186. {
  187. /* Set the DMA transfer complete callback for channel2 */
  188. hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  189. /* Set the DMA half transfer complete callback for channel2 */
  190. hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  191. /* Set the DMA error callback for channel2 */
  192. hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  193. /* Enable the selected DAC channel2 DMA request */
  194. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  195. }
  196. switch (Alignment)
  197. {
  198. case DAC_ALIGN_12B_R:
  199. /* Get DHR12R1 address */
  200. tmpreg = (uint32_t)&hdac->Instance->DHR12RD;
  201. break;
  202. case DAC_ALIGN_12B_L:
  203. /* Get DHR12L1 address */
  204. tmpreg = (uint32_t)&hdac->Instance->DHR12LD;
  205. break;
  206. case DAC_ALIGN_8B_R:
  207. /* Get DHR8R1 address */
  208. tmpreg = (uint32_t)&hdac->Instance->DHR8RD;
  209. break;
  210. default:
  211. break;
  212. }
  213. /* Enable the DMA channel */
  214. if (Channel == DAC_CHANNEL_1)
  215. {
  216. /* Enable the DAC DMA underrun interrupt */
  217. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  218. /* Enable the DMA channel */
  219. status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  220. }
  221. else
  222. {
  223. /* Enable the DAC DMA underrun interrupt */
  224. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  225. /* Enable the DMA channel */
  226. status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  227. }
  228. /* Process Unlocked */
  229. __HAL_UNLOCK(hdac);
  230. if (status == HAL_OK)
  231. {
  232. /* Enable the Peripheral */
  233. __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
  234. __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
  235. }
  236. else
  237. {
  238. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  239. }
  240. /* Return function status */
  241. return status;
  242. }
  243. /**
  244. * @brief Disables DAC and stop conversion both channel.
  245. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  246. * the configuration information for the specified DAC.
  247. * @param Channel The DAC channel that requests data from DMA.
  248. * This parameter can be one of the following values:
  249. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  250. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  251. * @retval HAL status
  252. */
  253. HAL_StatusTypeDef HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
  254. {
  255. HAL_StatusTypeDef status;
  256. /* Disable the selected DAC channel DMA request */
  257. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2 | DAC_CR_DMAEN1);
  258. /* Disable the Peripheral */
  259. __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
  260. __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
  261. /* Disable the DMA channel */
  262. /* Channel1 is used */
  263. if (Channel == DAC_CHANNEL_1)
  264. {
  265. /* Disable the DMA channel */
  266. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  267. /* Disable the DAC DMA underrun interrupt */
  268. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
  269. }
  270. else
  271. {
  272. /* Disable the DMA channel */
  273. status = HAL_DMA_Abort(hdac->DMA_Handle2);
  274. /* Disable the DAC DMA underrun interrupt */
  275. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
  276. }
  277. /* Check if DMA Channel effectively disabled */
  278. if (status != HAL_OK)
  279. {
  280. /* Update DAC state machine to error */
  281. hdac->State = HAL_DAC_STATE_ERROR;
  282. }
  283. else
  284. {
  285. /* Change DAC state */
  286. hdac->State = HAL_DAC_STATE_READY;
  287. }
  288. /* Return function status */
  289. return status;
  290. }
  291. /**
  292. * @brief Enable or disable the selected DAC channel wave generation.
  293. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  294. * the configuration information for the specified DAC.
  295. * @param Channel The selected DAC channel.
  296. * This parameter can be one of the following values:
  297. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  298. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  299. * @param Amplitude Select max triangle amplitude.
  300. * This parameter can be one of the following values:
  301. * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
  302. * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
  303. * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
  304. * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
  305. * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
  306. * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
  307. * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
  308. * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
  309. * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
  310. * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
  311. * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
  312. * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
  313. * @retval HAL status
  314. */
  315. HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
  316. {
  317. /* Check the parameters */
  318. assert_param(IS_DAC_CHANNEL(Channel));
  319. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  320. /* Process locked */
  321. __HAL_LOCK(hdac);
  322. /* Change DAC state */
  323. hdac->State = HAL_DAC_STATE_BUSY;
  324. /* Enable the triangle wave generation for the selected DAC channel */
  325. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
  326. /* Change DAC state */
  327. hdac->State = HAL_DAC_STATE_READY;
  328. /* Process unlocked */
  329. __HAL_UNLOCK(hdac);
  330. /* Return function status */
  331. return HAL_OK;
  332. }
  333. /**
  334. * @brief Enable or disable the selected DAC channel wave generation.
  335. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  336. * the configuration information for the specified DAC.
  337. * @param Channel The selected DAC channel.
  338. * This parameter can be one of the following values:
  339. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  340. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  341. * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
  342. * This parameter can be one of the following values:
  343. * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
  344. * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
  345. * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
  346. * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
  347. * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
  348. * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
  349. * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
  350. * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
  351. * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
  352. * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
  353. * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
  354. * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
  355. * @retval HAL status
  356. */
  357. HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
  358. {
  359. /* Check the parameters */
  360. assert_param(IS_DAC_CHANNEL(Channel));
  361. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  362. /* Process locked */
  363. __HAL_LOCK(hdac);
  364. /* Change DAC state */
  365. hdac->State = HAL_DAC_STATE_BUSY;
  366. /* Enable the noise wave generation for the selected DAC channel */
  367. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
  368. /* Change DAC state */
  369. hdac->State = HAL_DAC_STATE_READY;
  370. /* Process unlocked */
  371. __HAL_UNLOCK(hdac);
  372. /* Return function status */
  373. return HAL_OK;
  374. }
  375. /**
  376. * @brief Set the specified data holding register value for dual DAC channel.
  377. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  378. * the configuration information for the specified DAC.
  379. * @param Alignment Specifies the data alignment for dual channel DAC.
  380. * This parameter can be one of the following values:
  381. * DAC_ALIGN_8B_R: 8bit right data alignment selected
  382. * DAC_ALIGN_12B_L: 12bit left data alignment selected
  383. * DAC_ALIGN_12B_R: 12bit right data alignment selected
  384. * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
  385. * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
  386. * @note In dual mode, a unique register access is required to write in both
  387. * DAC channels at the same time.
  388. * @retval HAL status
  389. */
  390. HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
  391. {
  392. uint32_t data;
  393. uint32_t tmp;
  394. /* Check the parameters */
  395. assert_param(IS_DAC_ALIGN(Alignment));
  396. assert_param(IS_DAC_DATA(Data1));
  397. assert_param(IS_DAC_DATA(Data2));
  398. /* Calculate and set dual DAC data holding register value */
  399. if (Alignment == DAC_ALIGN_8B_R)
  400. {
  401. data = ((uint32_t)Data2 << 8U) | Data1;
  402. }
  403. else
  404. {
  405. data = ((uint32_t)Data2 << 16U) | Data1;
  406. }
  407. tmp = (uint32_t)hdac->Instance;
  408. tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
  409. /* Set the dual DAC selected data holding register */
  410. *(__IO uint32_t *)tmp = data;
  411. /* Return function status */
  412. return HAL_OK;
  413. }
  414. /**
  415. * @brief Conversion complete callback in non-blocking mode for Channel2.
  416. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  417. * the configuration information for the specified DAC.
  418. * @retval None
  419. */
  420. __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
  421. {
  422. /* Prevent unused argument(s) compilation warning */
  423. UNUSED(hdac);
  424. /* NOTE : This function should not be modified, when the callback is needed,
  425. the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
  426. */
  427. }
  428. /**
  429. * @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
  430. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  431. * the configuration information for the specified DAC.
  432. * @retval None
  433. */
  434. __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
  435. {
  436. /* Prevent unused argument(s) compilation warning */
  437. UNUSED(hdac);
  438. /* NOTE : This function should not be modified, when the callback is needed,
  439. the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
  440. */
  441. }
  442. /**
  443. * @brief Error DAC callback for Channel2.
  444. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  445. * the configuration information for the specified DAC.
  446. * @retval None
  447. */
  448. __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
  449. {
  450. /* Prevent unused argument(s) compilation warning */
  451. UNUSED(hdac);
  452. /* NOTE : This function should not be modified, when the callback is needed,
  453. the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
  454. */
  455. }
  456. /**
  457. * @brief DMA underrun DAC callback for Channel2.
  458. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  459. * the configuration information for the specified DAC.
  460. * @retval None
  461. */
  462. __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
  463. {
  464. /* Prevent unused argument(s) compilation warning */
  465. UNUSED(hdac);
  466. /* NOTE : This function should not be modified, when the callback is needed,
  467. the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
  468. */
  469. }
  470. /**
  471. * @brief Run the self calibration of one DAC channel.
  472. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  473. * the configuration information for the specified DAC.
  474. * @param sConfig DAC channel configuration structure.
  475. * @param Channel The selected DAC channel.
  476. * This parameter can be one of the following values:
  477. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  478. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  479. * @retval Updates DAC_TrimmingValue. , DAC_UserTrimming set to DAC_UserTrimming
  480. * @retval HAL status
  481. * @note Calibration runs about 7 ms.
  482. */
  483. HAL_StatusTypeDef HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
  484. {
  485. HAL_StatusTypeDef status = HAL_OK;
  486. __IO uint32_t tmp;
  487. uint32_t trimmingvalue;
  488. uint32_t delta;
  489. /* store/restore channel configuration structure purpose */
  490. uint32_t oldmodeconfiguration;
  491. /* Check the parameters */
  492. assert_param(IS_DAC_CHANNEL(Channel));
  493. /* Check the DAC handle allocation */
  494. /* Check if DAC running */
  495. if (hdac == NULL)
  496. {
  497. status = HAL_ERROR;
  498. }
  499. else if (hdac->State == HAL_DAC_STATE_BUSY)
  500. {
  501. status = HAL_ERROR;
  502. }
  503. else
  504. {
  505. /* Process locked */
  506. __HAL_LOCK(hdac);
  507. /* Store configuration */
  508. oldmodeconfiguration = (hdac->Instance->MCR & (DAC_MCR_MODE1 << (Channel & 0x10UL)));
  509. /* Disable the selected DAC channel */
  510. CLEAR_BIT((hdac->Instance->CR), (DAC_CR_EN1 << (Channel & 0x10UL)));
  511. /* Set mode in MCR for calibration */
  512. MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), 0U);
  513. /* Set DAC Channel1 DHR register to the middle value */
  514. tmp = (uint32_t)hdac->Instance;
  515. if (Channel == DAC_CHANNEL_1)
  516. {
  517. tmp += DAC_DHR12R1_ALIGNMENT(DAC_ALIGN_12B_R);
  518. }
  519. else
  520. {
  521. tmp += DAC_DHR12R2_ALIGNMENT(DAC_ALIGN_12B_R);
  522. }
  523. *(__IO uint32_t *) tmp = 0x0800UL;
  524. /* Enable the selected DAC channel calibration */
  525. /* i.e. set DAC_CR_CENx bit */
  526. SET_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
  527. /* Init trimming counter */
  528. /* Medium value */
  529. trimmingvalue = 16UL;
  530. delta = 8UL;
  531. while (delta != 0UL)
  532. {
  533. /* Set candidate trimming */
  534. MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
  535. /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */
  536. /* i.e. minimum time needed between two calibration steps */
  537. HAL_Delay(1);
  538. if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL)))
  539. {
  540. /* DAC_SR_CAL_FLAGx is HIGH try higher trimming */
  541. trimmingvalue -= delta;
  542. }
  543. else
  544. {
  545. /* DAC_SR_CAL_FLAGx is LOW try lower trimming */
  546. trimmingvalue += delta;
  547. }
  548. delta >>= 1UL;
  549. }
  550. /* Still need to check if right calibration is current value or one step below */
  551. /* Indeed the first value that causes the DAC_SR_CAL_FLAGx bit to change from 0 to 1 */
  552. /* Set candidate trimming */
  553. MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
  554. /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */
  555. /* i.e. minimum time needed between two calibration steps */
  556. HAL_Delay(1U);
  557. if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == 0UL)
  558. {
  559. /* Trimming is actually one value more */
  560. trimmingvalue++;
  561. /* Set right trimming */
  562. MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
  563. }
  564. /* Disable the selected DAC channel calibration */
  565. /* i.e. clear DAC_CR_CENx bit */
  566. CLEAR_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
  567. sConfig->DAC_TrimmingValue = trimmingvalue;
  568. sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
  569. /* Restore configuration */
  570. MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), oldmodeconfiguration);
  571. /* Process unlocked */
  572. __HAL_UNLOCK(hdac);
  573. }
  574. return status;
  575. }
  576. /**
  577. * @brief Set the trimming mode and trimming value (user trimming mode applied).
  578. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  579. * the configuration information for the specified DAC.
  580. * @param sConfig DAC configuration structure updated with new DAC trimming value.
  581. * @param Channel The selected DAC channel.
  582. * This parameter can be one of the following values:
  583. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  584. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  585. * @param NewTrimmingValue DAC new trimming value
  586. * @retval HAL status
  587. */
  588. HAL_StatusTypeDef HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel,
  589. uint32_t NewTrimmingValue)
  590. {
  591. HAL_StatusTypeDef status = HAL_OK;
  592. /* Check the parameters */
  593. assert_param(IS_DAC_CHANNEL(Channel));
  594. assert_param(IS_DAC_NEWTRIMMINGVALUE(NewTrimmingValue));
  595. /* Check the DAC handle allocation */
  596. if (hdac == NULL)
  597. {
  598. status = HAL_ERROR;
  599. }
  600. else
  601. {
  602. /* Process locked */
  603. __HAL_LOCK(hdac);
  604. /* Set new trimming */
  605. MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (NewTrimmingValue << (Channel & 0x10UL)));
  606. /* Update trimming mode */
  607. sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
  608. sConfig->DAC_TrimmingValue = NewTrimmingValue;
  609. /* Process unlocked */
  610. __HAL_UNLOCK(hdac);
  611. }
  612. return status;
  613. }
  614. /**
  615. * @brief Return the DAC trimming value.
  616. * @param hdac DAC handle
  617. * @param Channel The selected DAC channel.
  618. * This parameter can be one of the following values:
  619. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  620. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  621. * @retval Trimming value : range: 0->31
  622. *
  623. */
  624. uint32_t HAL_DACEx_GetTrimOffset(DAC_HandleTypeDef *hdac, uint32_t Channel)
  625. {
  626. /* Check the parameter */
  627. assert_param(IS_DAC_CHANNEL(Channel));
  628. /* Retrieve trimming */
  629. return ((hdac->Instance->CCR & (DAC_CCR_OTRIM1 << (Channel & 0x10UL))) >> (Channel & 0x10UL));
  630. }
  631. /**
  632. * @}
  633. */
  634. /** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
  635. * @brief Extended Peripheral Control functions
  636. *
  637. @verbatim
  638. ==============================================================================
  639. ##### Peripheral Control functions #####
  640. ==============================================================================
  641. [..] This section provides functions allowing to:
  642. (+) Set the specified data holding register value for DAC channel.
  643. @endverbatim
  644. * @{
  645. */
  646. /**
  647. * @brief Return the last data output value of the selected DAC channel.
  648. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  649. * the configuration information for the specified DAC.
  650. * @retval The selected DAC channel data output value.
  651. */
  652. uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
  653. {
  654. uint32_t tmp = 0UL;
  655. tmp |= hdac->Instance->DOR1;
  656. tmp |= hdac->Instance->DOR2 << 16UL;
  657. /* Returns the DAC channel data output register value */
  658. return tmp;
  659. }
  660. /**
  661. * @}
  662. */
  663. /**
  664. * @}
  665. */
  666. /* Private functions ---------------------------------------------------------*/
  667. /** @defgroup DACEx_Private_Functions DACEx private functions
  668. * @brief Extended private functions
  669. * @{
  670. */
  671. /**
  672. * @brief DMA conversion complete callback.
  673. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  674. * the configuration information for the specified DMA module.
  675. * @retval None
  676. */
  677. void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
  678. {
  679. DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  680. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  681. hdac->ConvCpltCallbackCh2(hdac);
  682. #else
  683. HAL_DACEx_ConvCpltCallbackCh2(hdac);
  684. #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
  685. hdac->State = HAL_DAC_STATE_READY;
  686. }
  687. /**
  688. * @brief DMA half transfer complete callback.
  689. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  690. * the configuration information for the specified DMA module.
  691. * @retval None
  692. */
  693. void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
  694. {
  695. DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  696. /* Conversion complete callback */
  697. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  698. hdac->ConvHalfCpltCallbackCh2(hdac);
  699. #else
  700. HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
  701. #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
  702. }
  703. /**
  704. * @brief DMA error callback.
  705. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  706. * the configuration information for the specified DMA module.
  707. * @retval None
  708. */
  709. void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
  710. {
  711. DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  712. /* Set DAC error code to DMA error */
  713. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  714. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  715. hdac->ErrorCallbackCh2(hdac);
  716. #else
  717. HAL_DACEx_ErrorCallbackCh2(hdac);
  718. #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
  719. hdac->State = HAL_DAC_STATE_READY;
  720. }
  721. /**
  722. * @}
  723. */
  724. /**
  725. * @}
  726. */
  727. #endif /* DAC1 || DAC2 */
  728. #endif /* HAL_DAC_MODULE_ENABLED */
  729. /**
  730. * @}
  731. */
  732. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/