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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_pwr.c
  4. * @author MCD Application Team
  5. * @brief PWR HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the Power Controller (PWR) peripheral:
  9. * + Initialization/de-initialization functions
  10. * + Peripheral Control functions
  11. *
  12. ******************************************************************************
  13. * @attention
  14. *
  15. * <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
  16. * All rights reserved.</center></h2>
  17. *
  18. * This software component is licensed by ST under BSD 3-Clause license,
  19. * the "License"; You may not use this file except in compliance with the
  20. * License. You may obtain a copy of the License at:
  21. * opensource.org/licenses/BSD-3-Clause
  22. *
  23. ******************************************************************************
  24. */
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l0xx_hal.h"
  27. #ifdef HAL_PWR_MODULE_ENABLED
  28. /** @addtogroup STM32L0xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PWR
  32. * @{
  33. */
  34. /** @addtogroup PWR_Private
  35. * @{
  36. */
  37. #if defined(PWR_PVD_SUPPORT)
  38. /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
  39. * @{
  40. */
  41. #define PVD_MODE_IT ((uint32_t)0x00010000U)
  42. #define PVD_MODE_EVT ((uint32_t)0x00020000U)
  43. #define PVD_RISING_EDGE ((uint32_t)0x00000001U)
  44. #define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
  45. /**
  46. * @}
  47. */
  48. #endif
  49. /**
  50. * @}
  51. */
  52. /** @addtogroup PWR_Exported_Functions
  53. * @{
  54. */
  55. /** @addtogroup PWR_Exported_Functions_Group1
  56. * @brief Initialization and de-initialization functions
  57. *
  58. @verbatim
  59. ===============================================================================
  60. ##### Initialization and de-initialization functions #####
  61. ===============================================================================
  62. @endverbatim
  63. * @{
  64. */
  65. /**
  66. * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
  67. * @retval None
  68. */
  69. void HAL_PWR_DeInit(void)
  70. {
  71. __HAL_RCC_PWR_FORCE_RESET();
  72. __HAL_RCC_PWR_RELEASE_RESET();
  73. }
  74. /**
  75. * @}
  76. */
  77. /** @addtogroup PWR_Exported_Functions_Group2
  78. * @brief Low Power modes configuration functions
  79. *
  80. @verbatim
  81. ===============================================================================
  82. ##### Peripheral Control functions #####
  83. ===============================================================================
  84. *** Backup domain ***
  85. =========================
  86. [..]
  87. After reset, the backup domain (RTC registers, RTC backup data
  88. registers) is protected against possible unwanted
  89. write accesses.
  90. To enable access to the RTC Domain and RTC registers, proceed as follows:
  91. (+) Enable the Power Controller (PWR) APB1 interface clock using the
  92. __HAL_RCC_PWR_CLK_ENABLE() macro.
  93. (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  94. *** PVD configuration ***
  95. =========================
  96. [..]
  97. (+) The PVD is used to monitor the VDD power supply by comparing it to a
  98. threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
  99. (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
  100. internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
  101. when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
  102. (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
  103. than the PVD threshold. This event is internally connected to the EXTI
  104. line16 and can generate an interrupt if enabled. This is done through
  105. __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
  106. (+) The PVD is stopped in Standby mode.
  107. (+) The PVD feature is not supported on L0 Value line.
  108. *** WakeUp pin configuration ***
  109. ================================
  110. [..]
  111. (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
  112. forced in input pull-down configuration and is active on rising edges.
  113. (+) There are two WakeUp pins:
  114. WakeUp Pin 1 on PA.00.
  115. WakeUp Pin 2 on PC.13.
  116. WakeUp Pin 3 on PE.06 .
  117. [..]
  118. *** Main and Backup Regulators configuration ***
  119. ================================================
  120. (+) The main internal regulator can be configured to have a tradeoff between
  121. performance and power consumption when the device does not operate at
  122. the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
  123. macro which configures the two VOS bits in PWR_CR register:
  124. (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
  125. the System frequency can go up to 32 MHz.
  126. (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
  127. the System frequency can go up to 16 MHz.
  128. (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
  129. the System frequency can go up to 4.2 MHz.
  130. Refer to the datasheets for more details.
  131. *** Low Power modes configuration ***
  132. =====================================
  133. [..]
  134. The device features 5 low-power modes:
  135. (+) Low power run mode: regulator in low power mode, limited clock frequency,
  136. limited number of peripherals running.
  137. (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
  138. (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
  139. limited number of peripherals running, regulator in low power mode.
  140. (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
  141. (+) Standby mode: VCORE domain powered off
  142. *** Low power run mode ***
  143. =========================
  144. [..]
  145. To further reduce the consumption when the system is in Run mode, the regulator can be
  146. configured in low power mode. In this mode, the system frequency should not exceed
  147. MSI frequency range1.
  148. In Low power run mode, all I/O pins keep the same state as in Run mode.
  149. (+) Entry:
  150. (++) VCORE in range2
  151. (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
  152. (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
  153. function.
  154. (+) Exit:
  155. (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
  156. function.
  157. (++) Increase the system frequency if needed.
  158. *** Sleep mode ***
  159. ==================
  160. [..]
  161. (+) Entry:
  162. The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  163. functions with
  164. (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  165. (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  166. (+) Exit:
  167. (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
  168. controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
  169. the MCU exits Sleep mode as soon as an event occurs.
  170. *** Low power sleep mode ***
  171. ============================
  172. [..]
  173. (+) Entry:
  174. The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  175. functions with
  176. (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  177. (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  178. (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
  179. This reduces power consumption but increases the wake-up time.
  180. (+) Exit:
  181. (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
  182. acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
  183. from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
  184. the MCU exits Sleep mode as soon as an event occurs.
  185. *** Stop mode ***
  186. =================
  187. [..]
  188. The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
  189. clock gating. The voltage regulator can be configured either in normal or low-power mode.
  190. In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
  191. the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
  192. To get the lowest consumption in Stop mode, the internal Flash memory also enters low
  193. power mode. When the Flash memory is in power-down mode, an additional startup delay is
  194. incurred when waking up from Stop mode.
  195. To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
  196. sensor can be switched off before entering Stop mode. They can be switched on again by
  197. software after exiting Stop mode using the ULP bit in the PWR_CR register.
  198. In Stop mode, all I/O pins keep the same state as in Run mode.
  199. (+) Entry:
  200. The Stop mode is entered using the HAL_PWR_EnterSTOPMode
  201. function with:
  202. (++) Main regulator ON.
  203. (++) Low Power regulator ON.
  204. (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  205. (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  206. (+) Exit:
  207. (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
  208. oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
  209. register
  210. *** Standby mode ***
  211. ====================
  212. [..]
  213. The Standby mode allows to achieve the lowest power consumption. It is based on the
  214. Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
  215. consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
  216. also switched off. SRAM and register contents are lost except for the RTC registers, RTC
  217. backup registers and Standby circuitry.
  218. To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
  219. sensor can be switched off before entering the Standby mode. They can be switched
  220. on again by software after exiting the Standby mode.
  221. function.
  222. (+) Entry:
  223. (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
  224. (+) Exit:
  225. (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
  226. tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
  227. *** Auto-wakeup (AWU) from low-power mode ***
  228. =============================================
  229. [..]
  230. The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
  231. Wakeup event, a tamper event, a time-stamp event, or a comparator event,
  232. without depending on an external interrupt (Auto-wakeup mode).
  233. (+) RTC auto-wakeup (AWU) from the Stop mode
  234. (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
  235. (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
  236. or Event modes) using the EXTI_Init() function.
  237. (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
  238. (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
  239. and RTC_AlarmCmd() functions.
  240. (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
  241. is necessary to:
  242. (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
  243. or Event modes) using the EXTI_Init() function.
  244. (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
  245. function.
  246. (+++) Configure the RTC to detect the tamper or time stamp event using the
  247. RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
  248. functions.
  249. (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
  250. (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
  251. or Event modes) using the EXTI_Init() function.
  252. (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
  253. (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
  254. RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
  255. (+) RTC auto-wakeup (AWU) from the Standby mode
  256. (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
  257. (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
  258. (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
  259. and RTC_AlarmCmd() functions.
  260. (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
  261. is necessary to:
  262. (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
  263. function.
  264. (+++) Configure the RTC to detect the tamper or time stamp event using the
  265. RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
  266. functions.
  267. (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
  268. (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
  269. (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
  270. RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
  271. (+) Comparator auto-wakeup (AWU) from the Stop mode
  272. (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
  273. event, it is necessary to:
  274. (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
  275. to be sensitive to to the selected edges (falling, rising or falling
  276. and rising) (Interrupt or Event modes) using the EXTI_Init() function.
  277. (+++) Configure the comparator to generate the event.
  278. @endverbatim
  279. * @{
  280. */
  281. /**
  282. * @brief Enables access to the backup domain (RTC registers, RTC
  283. * backup data registers ).
  284. * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
  285. * Backup Domain Access should be kept enabled.
  286. * @retval None
  287. */
  288. void HAL_PWR_EnableBkUpAccess(void)
  289. {
  290. /* Enable access to RTC and backup registers */
  291. SET_BIT(PWR->CR, PWR_CR_DBP);
  292. }
  293. /**
  294. * @brief Disables access to the backup domain
  295. * @note Applies to RTC registers, RTC backup data registers.
  296. * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
  297. * Backup Domain Access should be kept enabled.
  298. * @retval None
  299. */
  300. void HAL_PWR_DisableBkUpAccess(void)
  301. {
  302. /* Disable access to RTC and backup registers */
  303. CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  304. }
  305. #if defined(PWR_PVD_SUPPORT)
  306. /**
  307. * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
  308. * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
  309. * information for the PVD.
  310. * @note Refer to the electrical characteristics of your device datasheet for
  311. * more details about the voltage threshold corresponding to each
  312. * detection level.
  313. * @retval None
  314. */
  315. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
  316. {
  317. /* Check the parameters */
  318. assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
  319. assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
  320. /* Set PLS[7:5] bits according to PVDLevel value */
  321. MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
  322. /* Clear any previous config. Keep it clear if no event or IT mode is selected */
  323. __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
  324. __HAL_PWR_PVD_EXTI_DISABLE_IT();
  325. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
  326. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
  327. /* Configure interrupt mode */
  328. if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
  329. {
  330. __HAL_PWR_PVD_EXTI_ENABLE_IT();
  331. }
  332. /* Configure event mode */
  333. if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
  334. {
  335. __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
  336. }
  337. /* Configure the edge */
  338. if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
  339. {
  340. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
  341. }
  342. if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
  343. {
  344. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
  345. }
  346. }
  347. /**
  348. * @brief Enables the Power Voltage Detector(PVD).
  349. * @retval None
  350. */
  351. void HAL_PWR_EnablePVD(void)
  352. {
  353. /* Enable the power voltage detector */
  354. SET_BIT(PWR->CR, PWR_CR_PVDE);
  355. }
  356. /**
  357. * @brief Disables the Power Voltage Detector(PVD).
  358. * @retval None
  359. */
  360. void HAL_PWR_DisablePVD(void)
  361. {
  362. /* Disable the power voltage detector */
  363. CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  364. }
  365. #endif /* PWR_PVD_SUPPORT */
  366. /**
  367. * @brief Enables the WakeUp PINx functionality.
  368. * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
  369. * This parameter can be one of the following values:
  370. * @arg PWR_WAKEUP_PIN1
  371. * @arg PWR_WAKEUP_PIN2
  372. * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
  373. * @retval None
  374. */
  375. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
  376. {
  377. /* Check the parameter */
  378. assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  379. /* Enable the EWUPx pin */
  380. SET_BIT(PWR->CSR, WakeUpPinx);
  381. }
  382. /**
  383. * @brief Disables the WakeUp PINx functionality.
  384. * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
  385. * This parameter can be one of the following values:
  386. * @arg PWR_WAKEUP_PIN1
  387. * @arg PWR_WAKEUP_PIN2
  388. * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
  389. * @retval None
  390. */
  391. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
  392. {
  393. /* Check the parameter */
  394. assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  395. /* Disable the EWUPx pin */
  396. CLEAR_BIT(PWR->CSR, WakeUpPinx);
  397. }
  398. /**
  399. * @brief Enters Sleep mode.
  400. * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
  401. * @param Regulator: Specifies the regulator state in SLEEP mode.
  402. * This parameter can be one of the following values:
  403. * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
  404. * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
  405. * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
  406. * When WFI entry is used, tick interrupt have to be disabled if not desired as
  407. * the interrupt wake up source.
  408. * This parameter can be one of the following values:
  409. * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  410. * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  411. * @retval None
  412. */
  413. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
  414. {
  415. uint32_t tmpreg = 0U;
  416. /* Check the parameters */
  417. assert_param(IS_PWR_REGULATOR(Regulator));
  418. assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
  419. /* Select the regulator state in Sleep mode ---------------------------------*/
  420. tmpreg = PWR->CR;
  421. /* Clear PDDS and LPDS bits */
  422. CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
  423. /* Set LPSDSR bit according to PWR_Regulator value */
  424. SET_BIT(tmpreg, Regulator);
  425. /* Store the new value */
  426. PWR->CR = tmpreg;
  427. /* Clear SLEEPDEEP bit of Cortex System Control Register */
  428. CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
  429. /* Select SLEEP mode entry -------------------------------------------------*/
  430. if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  431. {
  432. /* Request Wait For Interrupt */
  433. __WFI();
  434. }
  435. else
  436. {
  437. /* Request Wait For Event */
  438. __SEV();
  439. __WFE();
  440. __WFE();
  441. }
  442. /* Additional NOP to ensure all pending instructions are flushed before entering low power mode */
  443. __NOP();
  444. }
  445. /**
  446. * @brief Enters Stop mode.
  447. * @note In Stop mode, all I/O pins keep the same state as in Run mode.
  448. * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
  449. * MSI or HSI16 RCoscillator is selected as system clock depending
  450. * the bit STOPWUCK in the RCC_CFGR register.
  451. * @note When the voltage regulator operates in low power mode, an additional
  452. * startup delay is incurred when waking up from Stop mode.
  453. * By keeping the internal regulator ON during Stop mode, the consumption
  454. * is higher although the startup time is reduced.
  455. * @note Before entering in this function, it is important to ensure that the WUF
  456. * wakeup flag is cleared. To perform this action, it is possible to call the
  457. * following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
  458. *
  459. * @param Regulator: Specifies the regulator state in Stop mode.
  460. * This parameter can be one of the following values:
  461. * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
  462. * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
  463. * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
  464. * This parameter can be one of the following values:
  465. * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
  466. * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
  467. * @retval None
  468. */
  469. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
  470. {
  471. uint32_t tmpreg = 0U;
  472. /* Check the parameters */
  473. assert_param(IS_PWR_REGULATOR(Regulator));
  474. assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
  475. /* Select the regulator state in Stop mode ---------------------------------*/
  476. tmpreg = PWR->CR;
  477. /* Clear PDDS and LPDS bits */
  478. CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
  479. /* Set LPSDSR bit according to PWR_Regulator value */
  480. SET_BIT(tmpreg, Regulator);
  481. /* Store the new value */
  482. PWR->CR = tmpreg;
  483. /* Set SLEEPDEEP bit of Cortex System Control Register */
  484. SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
  485. /* Select Stop mode entry --------------------------------------------------*/
  486. if(STOPEntry == PWR_STOPENTRY_WFI)
  487. {
  488. /* Request Wait For Interrupt */
  489. __WFI();
  490. }
  491. else
  492. {
  493. /* Request Wait For Event */
  494. __SEV();
  495. __WFE();
  496. __WFE();
  497. }
  498. /* Reset SLEEPDEEP bit of Cortex System Control Register */
  499. CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
  500. }
  501. /**
  502. * @brief Enters Standby mode.
  503. * @note In Standby mode, all I/O pins are high impedance except for:
  504. * - Reset pad (still available)
  505. * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
  506. * Alarm out, or RTC clock calibration out.
  507. * - RTC_AF2 pin (PC13) if configured for tamper.
  508. * - WKUP pin 1 (PA00) if enabled.
  509. * - WKUP pin 2 (PC13) if enabled.
  510. * - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
  511. * - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
  512. * @retval None
  513. */
  514. void HAL_PWR_EnterSTANDBYMode(void)
  515. {
  516. /* Select Standby mode */
  517. SET_BIT(PWR->CR, PWR_CR_PDDS);
  518. /* Set SLEEPDEEP bit of Cortex System Control Register */
  519. SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
  520. /* This option is used to ensure that store operations are completed */
  521. #if defined ( __CC_ARM)
  522. __force_stores();
  523. #endif
  524. /* Request Wait For Interrupt */
  525. __WFI();
  526. }
  527. /**
  528. * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
  529. * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  530. * re-enters SLEEP mode when an interruption handling is over.
  531. * Setting this bit is useful when the processor is expected to run only on
  532. * interruptions handling.
  533. * @retval None
  534. */
  535. void HAL_PWR_EnableSleepOnExit(void)
  536. {
  537. /* Set SLEEPONEXIT bit of Cortex System Control Register */
  538. SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  539. }
  540. /**
  541. * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
  542. * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  543. * re-enters SLEEP mode when an interruption handling is over.
  544. * @retval None
  545. */
  546. void HAL_PWR_DisableSleepOnExit(void)
  547. {
  548. /* Clear SLEEPONEXIT bit of Cortex System Control Register */
  549. CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  550. }
  551. /**
  552. * @brief Enables CORTEX M0+ SEVONPEND bit.
  553. * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
  554. * WFE to wake up when an interrupt moves from inactive to pended.
  555. * @retval None
  556. */
  557. void HAL_PWR_EnableSEVOnPend(void)
  558. {
  559. /* Set SEVONPEND bit of Cortex System Control Register */
  560. SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  561. }
  562. /**
  563. * @brief Disables CORTEX M0+ SEVONPEND bit.
  564. * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
  565. * WFE to wake up when an interrupt moves from inactive to pended.
  566. * @retval None
  567. */
  568. void HAL_PWR_DisableSEVOnPend(void)
  569. {
  570. /* Clear SEVONPEND bit of Cortex System Control Register */
  571. CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  572. }
  573. #if defined(PWR_PVD_SUPPORT)
  574. /**
  575. * @brief This function handles the PWR PVD interrupt request.
  576. * @note This API should be called under the PVD_IRQHandler().
  577. * @retval None
  578. */
  579. void HAL_PWR_PVD_IRQHandler(void)
  580. {
  581. /* Check PWR exti flag */
  582. if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
  583. {
  584. /* PWR PVD interrupt user callback */
  585. HAL_PWR_PVDCallback();
  586. /* Clear PWR Exti pending bit */
  587. __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
  588. }
  589. }
  590. /**
  591. * @brief PWR PVD interrupt callback
  592. * @retval None
  593. */
  594. __weak void HAL_PWR_PVDCallback(void)
  595. {
  596. /* NOTE : This function Should not be modified, when the callback is needed,
  597. the HAL_PWR_PVDCallback could be implemented in the user file
  598. */
  599. }
  600. #endif /* PWR_PVD_SUPPORT */
  601. /**
  602. * @}
  603. */
  604. /**
  605. * @}
  606. */
  607. #endif /* HAL_PWR_MODULE_ENABLED */
  608. /**
  609. * @}
  610. */
  611. /**
  612. * @}
  613. */
  614. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/