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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_cryp_ex.c
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief CRYPEx HAL module driver.
  8. * This file provides firmware functions to manage the extended
  9. * functionalities of the Cryptography (CRYP) peripheral.
  10. *
  11. ******************************************************************************
  12. * @attention
  13. *
  14. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  15. *
  16. * Redistribution and use in source and binary forms, with or without modification,
  17. * are permitted provided that the following conditions are met:
  18. * 1. Redistributions of source code must retain the above copyright notice,
  19. * this list of conditions and the following disclaimer.
  20. * 2. Redistributions in binary form must reproduce the above copyright notice,
  21. * this list of conditions and the following disclaimer in the documentation
  22. * and/or other materials provided with the distribution.
  23. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  24. * may be used to endorse or promote products derived from this software
  25. * without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  28. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  29. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  31. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  33. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  34. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. *
  38. ******************************************************************************
  39. */
  40. /* Includes ------------------------------------------------------------------*/
  41. #include "stm32l4xx_hal.h"
  42. #ifdef HAL_CRYP_MODULE_ENABLED
  43. #if defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L462xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L4A6xx)
  44. /** @addtogroup STM32L4xx_HAL_Driver
  45. * @{
  46. */
  47. /** @defgroup CRYPEx CRYPEx
  48. * @brief CRYP Extended HAL module driver
  49. * @{
  50. */
  51. /* Private typedef -----------------------------------------------------------*/
  52. /* Private define ------------------------------------------------------------*/
  53. /** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants
  54. * @{
  55. */
  56. #define CRYP_CCF_TIMEOUTVALUE 22000 /*!< CCF flag raising time-out value */
  57. #define CRYP_BUSY_TIMEOUTVALUE 22000 /*!< BUSY flag reset time-out value */
  58. #define CRYP_POLLING_OFF 0x0 /*!< No polling when padding */
  59. #define CRYP_POLLING_ON 0x1 /*!< Polling when padding */
  60. #if defined(AES_CR_NPBLB)
  61. #define AES_POSITION_CR_NPBLB (uint32_t)POSITION_VAL(AES_CR_NPBLB) /*!< Required left shift to set background CLUT size */
  62. #endif
  63. /**
  64. * @}
  65. */
  66. /* Private macro -------------------------------------------------------------*/
  67. /* Private variables ---------------------------------------------------------*/
  68. /* Private function prototypes -----------------------------------------------*/
  69. /** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions
  70. * @{
  71. */
  72. static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
  73. static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t Timeout);
  74. static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
  75. static void CRYP_Authentication_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
  76. static void CRYP_Authentication_DMAInCplt(DMA_HandleTypeDef *hdma);
  77. static void CRYP_Authentication_DMAError(DMA_HandleTypeDef *hdma);
  78. static void CRYP_Authentication_DMAOutCplt(DMA_HandleTypeDef *hdma);
  79. static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  80. static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
  81. static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
  82. static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
  83. static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
  84. static void CRYP_Padding(CRYP_HandleTypeDef *hcryp, uint32_t difflength, uint32_t polling);
  85. /**
  86. * @}
  87. */
  88. /* Exported functions ---------------------------------------------------------*/
  89. /** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
  90. * @{
  91. */
  92. /** @defgroup CRYPEx_Exported_Functions_Group1 Extended callback function
  93. * @brief Extended callback functions.
  94. *
  95. @verbatim
  96. ===============================================================================
  97. ##### Extended callback functions #####
  98. ===============================================================================
  99. [..] This section provides callback function:
  100. (+) Computation completed.
  101. @endverbatim
  102. * @{
  103. */
  104. /**
  105. * @brief Computation completed callbacks.
  106. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  107. * the configuration information for CRYP module
  108. * @retval None
  109. */
  110. __weak void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp)
  111. {
  112. /* Prevent unused argument(s) compilation warning */
  113. UNUSED(hcryp);
  114. /* NOTE : This function should not be modified; when the callback is needed,
  115. the HAL_CRYPEx_ComputationCpltCallback can be implemented in the user file
  116. */
  117. }
  118. /**
  119. * @}
  120. */
  121. /** @defgroup CRYPEx_Exported_Functions_Group2 AES extended processing functions
  122. * @brief Extended processing functions.
  123. *
  124. @verbatim
  125. ==============================================================================
  126. ##### AES extended processing functions #####
  127. ==============================================================================
  128. [..] This section provides functions allowing to:
  129. (+) Encrypt plaintext or decrypt cipher text using AES algorithm in different chaining modes.
  130. Functions are generic (handles ECB, CBC and CTR and all modes) and are only differentiated
  131. based on the processing type. Three processing types are available:
  132. (++) Polling mode
  133. (++) Interrupt mode
  134. (++) DMA mode
  135. (+) Generate and authentication tag in addition to encrypt/decrypt a plain/cipher text using AES
  136. algorithm in different chaining modes.
  137. Functions are generic (handles GCM, GMAC, CMAC and CCM when applicable) and process only one phase
  138. so that steps can be skipped if so required. Functions are only differentiated based on the processing type.
  139. Three processing types are available:
  140. (++) Polling mode
  141. (++) Interrupt mode
  142. (++) DMA mode
  143. @endverbatim
  144. * @{
  145. */
  146. /**
  147. * @brief Carry out in polling mode the ciphering or deciphering operation according to
  148. * hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and
  149. * chaining modes ECB, CBC and CTR are managed by this function in polling mode.
  150. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  151. * the configuration information for CRYP module
  152. * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
  153. * or key derivation+decryption.
  154. * Parameter is meaningless in case of key derivation.
  155. * @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
  156. * Parameter is meaningless in case of key derivation.
  157. * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
  158. * decryption/key derivation+decryption, or pointer to the derivative keys in
  159. * case of key derivation only.
  160. * @param Timeout: Specify Timeout value
  161. * @retval HAL status
  162. */
  163. HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout)
  164. {
  165. if (hcryp->State == HAL_CRYP_STATE_READY)
  166. {
  167. /* Check parameters setting */
  168. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
  169. {
  170. /* Enable IP at this point, since not enabled in HAL_CRYP_Init() */
  171. __HAL_CRYP_ENABLE(hcryp);
  172. if (pOutputData == NULL)
  173. {
  174. return HAL_ERROR;
  175. }
  176. }
  177. else
  178. {
  179. if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0))
  180. {
  181. return HAL_ERROR;
  182. }
  183. }
  184. /* Process Locked */
  185. __HAL_LOCK(hcryp);
  186. /* Change the CRYP state */
  187. hcryp->State = HAL_CRYP_STATE_BUSY;
  188. /* Call CRYP_ReadKey() API if the operating mode is set to
  189. key derivation, CRYP_ProcessData() otherwise */
  190. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
  191. {
  192. if(CRYP_ReadKey(hcryp, pOutputData, Timeout) != HAL_OK)
  193. {
  194. return HAL_TIMEOUT;
  195. }
  196. }
  197. else
  198. {
  199. if(CRYP_ProcessData(hcryp, pInputData, Size, pOutputData, Timeout) != HAL_OK)
  200. {
  201. return HAL_TIMEOUT;
  202. }
  203. }
  204. /* If the state has not been set to SUSPENDED, set it to
  205. READY, otherwise keep it as it is */
  206. if (hcryp->State != HAL_CRYP_STATE_SUSPENDED)
  207. {
  208. hcryp->State = HAL_CRYP_STATE_READY;
  209. }
  210. /* Process Unlocked */
  211. __HAL_UNLOCK(hcryp);
  212. return HAL_OK;
  213. }
  214. else
  215. {
  216. return HAL_BUSY;
  217. }
  218. }
  219. /**
  220. * @brief Carry out in interrupt mode the ciphering or deciphering operation according to
  221. * hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and
  222. * chaining modes ECB, CBC and CTR are managed by this function in interrupt mode.
  223. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  224. * the configuration information for CRYP module
  225. * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
  226. * or key derivation+decryption.
  227. * Parameter is meaningless in case of key derivation.
  228. * @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
  229. * Parameter is meaningless in case of key derivation.
  230. * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
  231. * decryption/key derivation+decryption, or pointer to the derivative keys in
  232. * case of key derivation only.
  233. * @retval HAL status
  234. */
  235. HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData)
  236. {
  237. uint32_t inputaddr = 0;
  238. if(hcryp->State == HAL_CRYP_STATE_READY)
  239. {
  240. /* Check parameters setting */
  241. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
  242. {
  243. if (pOutputData == NULL)
  244. {
  245. return HAL_ERROR;
  246. }
  247. }
  248. else
  249. {
  250. if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0))
  251. {
  252. return HAL_ERROR;
  253. }
  254. }
  255. /* Process Locked */
  256. __HAL_LOCK(hcryp);
  257. /* If operating mode is not limited to key derivation only,
  258. get the buffers addresses and sizes */
  259. if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
  260. {
  261. hcryp->CrypInCount = Size;
  262. hcryp->pCrypInBuffPtr = pInputData;
  263. hcryp->pCrypOutBuffPtr = pOutputData;
  264. hcryp->CrypOutCount = Size;
  265. }
  266. else
  267. {
  268. /* For key derivation, set output buffer only
  269. (will point at derivated key) */
  270. hcryp->pCrypOutBuffPtr = pOutputData;
  271. }
  272. /* Change the CRYP state */
  273. hcryp->State = HAL_CRYP_STATE_BUSY;
  274. /* Process Unlocked */
  275. __HAL_UNLOCK(hcryp);
  276. if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
  277. {
  278. /* Enable Computation Complete Flag and Error Interrupts */
  279. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  280. }
  281. else
  282. {
  283. /* In the case of Key derivation, enable the IP at the same time as the interruptions */
  284. SET_BIT(hcryp->Instance->CR, CRYP_IT_CCFIE|CRYP_IT_ERRIE|AES_CR_EN);
  285. }
  286. /* If operating mode is key derivation only, the input data have
  287. already been entered during the initialization process. For
  288. the other operating modes, they are fed to the CRYP hardware
  289. block at this point. */
  290. if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
  291. {
  292. /* Initiate the processing under interrupt in entering
  293. the first input data */
  294. inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  295. /* Increment/decrement instance pointer/counter */
  296. hcryp->pCrypInBuffPtr += 16;
  297. hcryp->CrypInCount -= 16;
  298. /* Write the first input block in the Data Input register */
  299. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  300. inputaddr+=4;
  301. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  302. inputaddr+=4;
  303. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  304. inputaddr+=4;
  305. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  306. }
  307. /* Return function status */
  308. return HAL_OK;
  309. }
  310. else
  311. {
  312. return HAL_BUSY;
  313. }
  314. }
  315. /**
  316. * @brief Carry out in DMA mode the ciphering or deciphering operation according to
  317. * hcryp->Init structure fields.
  318. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  319. * the configuration information for CRYP module
  320. * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
  321. * or key derivation+decryption.
  322. * @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
  323. * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
  324. * decryption/key derivation+decryption.
  325. * @note Chaining modes ECB, CBC and CTR are managed by this function in DMA mode.
  326. * @note Supported operating modes are encryption, decryption and key derivation with decryption.
  327. * @note No DMA channel is provided for key derivation only and therefore, access to AES_KEYRx
  328. * registers must be done by software.
  329. * @note This API is not applicable to key derivation only; for such a mode, access to AES_KEYRx
  330. * registers must be done by software thru HAL_CRYPEx_AES() or HAL_CRYPEx_AES_IT() APIs.
  331. * @note pInputData and pOutputData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
  332. * @retval HAL status
  333. */
  334. HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData)
  335. {
  336. uint32_t inputaddr = 0;
  337. uint32_t outputaddr = 0;
  338. if (hcryp->State == HAL_CRYP_STATE_READY)
  339. {
  340. /* Check parameters setting */
  341. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
  342. {
  343. /* no DMA channel is provided for key derivation operating mode,
  344. access to AES_KEYRx registers must be done by software */
  345. return HAL_ERROR;
  346. }
  347. else
  348. {
  349. if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0))
  350. {
  351. return HAL_ERROR;
  352. }
  353. }
  354. /* Process Locked */
  355. __HAL_LOCK(hcryp);
  356. inputaddr = (uint32_t)pInputData;
  357. outputaddr = (uint32_t)pOutputData;
  358. /* Change the CRYP state */
  359. hcryp->State = HAL_CRYP_STATE_BUSY;
  360. /* Set the input and output addresses and start DMA transfer */
  361. CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
  362. /* Process Unlocked */
  363. __HAL_UNLOCK(hcryp);
  364. /* Return function status */
  365. return HAL_OK;
  366. }
  367. else
  368. {
  369. return HAL_BUSY;
  370. }
  371. }
  372. /**
  373. * @brief Carry out in polling mode the authentication tag generation as well as the ciphering or deciphering
  374. * operation according to hcryp->Init structure fields.
  375. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  376. * the configuration information for CRYP module
  377. * @param pInputData:
  378. * - pointer to payload data in GCM or CCM payload phase,
  379. * - pointer to B0 block in CMAC header phase,
  380. * - pointer to C block in CMAC final phase.
  381. * - Parameter is meaningless in case of GCM/GMAC/CCM init, header and final phases.
  382. * @param Size:
  383. * - length of the input payload data buffer in bytes in GCM or CCM payload phase,
  384. * - length of B0 block (in bytes) in CMAC header phase,
  385. * - length of C block (in bytes) in CMAC final phase.
  386. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  387. * - Parameter is meaningless in case of CCM final phase.
  388. * - Parameter is message length in bytes in case of GCM final phase.
  389. * - Parameter must be set to zero in case of GMAC final phase.
  390. * @param pOutputData:
  391. * - pointer to plain or cipher text in GCM/CCM payload phase,
  392. * - pointer to authentication tag in GCM/GMAC/CCM/CMAC final phase.
  393. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  394. * - Parameter is meaningless in case of CMAC header phase.
  395. * @param Timeout: Specify Timeout value
  396. * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC, CMAC and CCM when the latter is applicable.
  397. * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes
  398. * can be skipped by the user if so required.
  399. * @retval HAL status
  400. */
  401. HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout)
  402. {
  403. uint32_t index = 0;
  404. uint32_t inputaddr = 0;
  405. uint32_t outputaddr = 0;
  406. uint32_t tagaddr = 0;
  407. uint64_t headerlength = 0;
  408. uint64_t inputlength = 0;
  409. uint64_t payloadlength = 0;
  410. uint32_t difflength = 0;
  411. uint32_t addhoc_process = 0;
  412. if (hcryp->State == HAL_CRYP_STATE_READY)
  413. {
  414. /* input/output parameters check */
  415. if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  416. {
  417. if (((hcryp->Init.Header != NULL) && (hcryp->Init.HeaderSize == 0)) ||
  418. ((hcryp->Init.Header == NULL) && (hcryp->Init.HeaderSize != 0)))
  419. {
  420. return HAL_ERROR;
  421. }
  422. #if defined(AES_CR_NPBLB)
  423. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  424. #else
  425. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  426. #endif
  427. {
  428. /* In case of CMAC or CCM (when applicable) header phase resumption, we can have pInputData = NULL and Size = 0 */
  429. if (((pInputData != NULL) && (Size == 0)) || ((pInputData == NULL) && (Size != 0)))
  430. {
  431. return HAL_ERROR;
  432. }
  433. }
  434. }
  435. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  436. {
  437. if (((pInputData == NULL) && (Size != 0)) || \
  438. ((pInputData != NULL) && (Size == 0)) || \
  439. ((pInputData != NULL) && (Size != 0) && (pOutputData == NULL)))
  440. {
  441. return HAL_ERROR;
  442. }
  443. }
  444. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  445. {
  446. if (pOutputData == NULL)
  447. {
  448. return HAL_ERROR;
  449. }
  450. #if !defined(AES_CR_NPBLB)
  451. if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL))
  452. {
  453. return HAL_ERROR;
  454. }
  455. #endif
  456. }
  457. /* Process Locked */
  458. __HAL_LOCK(hcryp);
  459. /* Change the CRYP state */
  460. hcryp->State = HAL_CRYP_STATE_BUSY;
  461. /*==============================================*/
  462. /* GCM/GMAC (or CCM when applicable) init phase */
  463. /*==============================================*/
  464. /* In case of init phase, the input data (Key and Initialization Vector) have
  465. already been entered during the initialization process. Therefore, the
  466. API just waits for the CCF flag to be set. */
  467. if (hcryp->Init.GCMCMACPhase == CRYP_INIT_PHASE)
  468. {
  469. /* just wait for hash computation */
  470. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  471. {
  472. hcryp->State = HAL_CRYP_STATE_READY;
  473. __HAL_UNLOCK(hcryp);
  474. return HAL_TIMEOUT;
  475. }
  476. /* Clear CCF Flag */
  477. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  478. /* Mark that the initialization phase is over */
  479. hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER;
  480. }
  481. /*=======================================================*/
  482. /* GCM/GMAC or (CCM / CMAC when applicable) header phase */
  483. /*=======================================================*/
  484. else if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  485. {
  486. #if !defined(AES_CR_NPBLB)
  487. /* Set header phase; for GCM or GMAC, set data-byte at this point */
  488. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  489. {
  490. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_HEADER_PHASE|hcryp->Init.DataType);
  491. }
  492. else
  493. #endif
  494. {
  495. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_HEADER_PHASE);
  496. }
  497. /* Enable the Peripheral */
  498. __HAL_CRYP_ENABLE(hcryp);
  499. #if !defined(AES_CR_NPBLB)
  500. /* in case of CMAC, enter B0 block in header phase, before the header itself. */
  501. /* If Size = 0 (possible case of resumption after CMAC header phase suspension),
  502. skip these steps and go directly to header buffer feeding to the HW */
  503. if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (Size != 0))
  504. {
  505. inputaddr = (uint32_t)pInputData;
  506. for( ; (index < Size); index += 16)
  507. {
  508. /* Write the Input block in the Data Input register */
  509. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  510. inputaddr+=4;
  511. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  512. inputaddr+=4;
  513. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  514. inputaddr+=4;
  515. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  516. inputaddr+=4;
  517. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  518. {
  519. hcryp->State = HAL_CRYP_STATE_READY;
  520. __HAL_UNLOCK(hcryp);
  521. return HAL_TIMEOUT;
  522. }
  523. /* Clear CCF Flag */
  524. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  525. /* If the suspension flag has been raised and if the processing is not about
  526. to end, suspend processing */
  527. if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < Size))
  528. {
  529. /* reset SuspendRequest */
  530. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  531. /* Change the CRYP state */
  532. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  533. /* Mark that the header phase is over */
  534. hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED;
  535. /* Save current reading and writing locations of Input and Output buffers */
  536. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  537. /* Save the total number of bytes (B blocks + header) that remain to be
  538. processed at this point */
  539. hcryp->CrypInCount = hcryp->Init.HeaderSize + Size - (index+16);
  540. /* Process Unlocked */
  541. __HAL_UNLOCK(hcryp);
  542. return HAL_OK;
  543. }
  544. } /* for(index=0; (index < Size); index += 16) */
  545. }
  546. #endif /* !defined(AES_CR_NPBLB) */
  547. /* Enter header */
  548. inputaddr = (uint32_t)hcryp->Init.Header;
  549. /* Local variable headerlength is a number of bytes multiple of 128 bits,
  550. remaining header data (if any) are handled after this loop */
  551. headerlength = (((hcryp->Init.HeaderSize)/16)*16) ;
  552. if ((hcryp->Init.HeaderSize % 16) != 0)
  553. {
  554. difflength = (uint32_t) (hcryp->Init.HeaderSize - headerlength);
  555. }
  556. for(index=0; index < headerlength; index += 16)
  557. {
  558. /* Write the Input block in the Data Input register */
  559. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  560. inputaddr+=4;
  561. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  562. inputaddr+=4;
  563. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  564. inputaddr+=4;
  565. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  566. inputaddr+=4;
  567. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  568. {
  569. hcryp->State = HAL_CRYP_STATE_READY;
  570. __HAL_UNLOCK(hcryp);
  571. return HAL_TIMEOUT;
  572. }
  573. /* Clear CCF Flag */
  574. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  575. /* If the suspension flag has been raised and if the processing is not about
  576. to end, suspend processing */
  577. if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < headerlength))
  578. {
  579. /* reset SuspendRequest */
  580. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  581. /* Change the CRYP state */
  582. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  583. /* Mark that the header phase is over */
  584. hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED;
  585. /* Save current reading and writing locations of Input and Output buffers */
  586. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  587. /* Save the total number of bytes that remain to be processed at this point */
  588. hcryp->CrypInCount = hcryp->Init.HeaderSize - (index+16);
  589. /* Process Unlocked */
  590. __HAL_UNLOCK(hcryp);
  591. return HAL_OK;
  592. }
  593. }
  594. /* Case header length is not a multiple of 16 bytes */
  595. if (difflength != 0)
  596. {
  597. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  598. CRYP_Padding(hcryp, difflength, CRYP_POLLING_ON);
  599. }
  600. /* Mark that the header phase is over */
  601. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  602. }
  603. /*============================================*/
  604. /* GCM (or CCM when applicable) payload phase */
  605. /*============================================*/
  606. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  607. {
  608. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PAYLOAD_PHASE);
  609. /* if the header phase has been bypassed, AES must be enabled again */
  610. if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER)
  611. {
  612. __HAL_CRYP_ENABLE(hcryp);
  613. }
  614. inputaddr = (uint32_t)pInputData;
  615. outputaddr = (uint32_t)pOutputData;
  616. /* Enter payload */
  617. /* Specific handling to manage payload last block size less than 128 bits */
  618. if ((Size % 16) != 0)
  619. {
  620. payloadlength = (Size/16) * 16;
  621. difflength = (uint32_t) (Size - payloadlength);
  622. addhoc_process = 1;
  623. }
  624. else
  625. {
  626. payloadlength = Size;
  627. }
  628. /* Feed payload */
  629. for( ; index < payloadlength; index += 16)
  630. {
  631. /* Write the Input block in the Data Input register */
  632. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  633. inputaddr+=4;
  634. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  635. inputaddr+=4;
  636. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  637. inputaddr+=4;
  638. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  639. inputaddr+=4;
  640. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  641. {
  642. hcryp->State = HAL_CRYP_STATE_READY;
  643. __HAL_UNLOCK(hcryp);
  644. return HAL_TIMEOUT;
  645. }
  646. /* Clear CCF Flag */
  647. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  648. /* Retrieve output data: read the output block
  649. from the Data Output Register */
  650. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  651. outputaddr+=4;
  652. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  653. outputaddr+=4;
  654. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  655. outputaddr+=4;
  656. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  657. outputaddr+=4;
  658. /* If the suspension flag has been raised and if the processing is not about
  659. to end, suspend processing */
  660. if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < payloadlength))
  661. {
  662. /* no flag waiting under IRQ handling */
  663. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT)
  664. {
  665. /* Ensure that Busy flag is reset */
  666. if(CRYP_WaitOnBusyFlagReset(hcryp, CRYP_BUSY_TIMEOUTVALUE) != HAL_OK)
  667. {
  668. hcryp->State = HAL_CRYP_STATE_READY;
  669. __HAL_UNLOCK(hcryp);
  670. return HAL_TIMEOUT;
  671. }
  672. }
  673. /* reset SuspendRequest */
  674. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  675. /* Change the CRYP state */
  676. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  677. /* Mark that the header phase is over */
  678. hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED;
  679. /* Save current reading and writing locations of Input and Output buffers */
  680. hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr;
  681. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  682. /* Save the number of bytes that remain to be processed at this point */
  683. hcryp->CrypInCount = Size - (index+16);
  684. /* Process Unlocked */
  685. __HAL_UNLOCK(hcryp);
  686. return HAL_OK;
  687. }
  688. }
  689. /* Additional processing to manage GCM(/CCM) encryption and decryption cases when
  690. payload last block size less than 128 bits */
  691. if (addhoc_process == 1)
  692. {
  693. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  694. hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr;
  695. CRYP_Padding(hcryp, difflength, CRYP_POLLING_ON);
  696. } /* (addhoc_process == 1) */
  697. /* Mark that the payload phase is over */
  698. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  699. }
  700. /*==================================*/
  701. /* GCM/GMAC/CCM or CMAC final phase */
  702. /*==================================*/
  703. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  704. {
  705. tagaddr = (uint32_t)pOutputData;
  706. #if defined(AES_CR_NPBLB)
  707. /* By default, clear NPBLB field */
  708. CLEAR_BIT(hcryp->Instance->CR, AES_CR_NPBLB);
  709. #endif
  710. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_FINAL_PHASE);
  711. /* if the header and payload phases have been bypassed, AES must be enabled again */
  712. if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER)
  713. {
  714. __HAL_CRYP_ENABLE(hcryp);
  715. }
  716. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  717. {
  718. headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
  719. inputlength = Size * 8; /* input length in bits */
  720. #if !defined(AES_CR_NPBLB)
  721. if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  722. {
  723. hcryp->Instance->DINR = __RBIT((headerlength)>>32);
  724. hcryp->Instance->DINR = __RBIT(headerlength);
  725. hcryp->Instance->DINR = __RBIT((inputlength)>>32);
  726. hcryp->Instance->DINR = __RBIT(inputlength);
  727. }
  728. else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  729. {
  730. hcryp->Instance->DINR = __REV((headerlength)>>32);
  731. hcryp->Instance->DINR = __REV(headerlength);
  732. hcryp->Instance->DINR = __REV((inputlength)>>32);
  733. hcryp->Instance->DINR = __REV(inputlength);
  734. }
  735. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  736. {
  737. hcryp->Instance->DINR = __ROR((headerlength)>>32, 16);
  738. hcryp->Instance->DINR = __ROR(headerlength, 16);
  739. hcryp->Instance->DINR = __ROR((inputlength)>>32, 16);
  740. hcryp->Instance->DINR = __ROR(inputlength, 16);
  741. }
  742. else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
  743. {
  744. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  745. hcryp->Instance->DINR = (uint32_t)(headerlength);
  746. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  747. hcryp->Instance->DINR = (uint32_t)(inputlength);
  748. }
  749. #else
  750. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  751. hcryp->Instance->DINR = (uint32_t)(headerlength);
  752. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  753. hcryp->Instance->DINR = (uint32_t)(inputlength);
  754. #endif
  755. }
  756. #if !defined(AES_CR_NPBLB)
  757. else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  758. {
  759. inputaddr = (uint32_t)pInputData;
  760. /* Enter the last block made of a 128-bit value formatted
  761. from the original B0 packet. */
  762. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  763. inputaddr+=4;
  764. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  765. inputaddr+=4;
  766. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  767. inputaddr+=4;
  768. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  769. }
  770. #endif
  771. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  772. {
  773. hcryp->State = HAL_CRYP_STATE_READY;
  774. __HAL_UNLOCK(hcryp);
  775. return HAL_TIMEOUT;
  776. }
  777. /* Read the Auth TAG in the Data Out register */
  778. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  779. tagaddr+=4;
  780. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  781. tagaddr+=4;
  782. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  783. tagaddr+=4;
  784. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  785. /* Clear CCF Flag */
  786. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  787. /* Mark that the final phase is over */
  788. hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER;
  789. /* Disable the Peripheral */
  790. __HAL_CRYP_DISABLE(hcryp);
  791. }
  792. /*=================================================*/
  793. /* case incorrect hcryp->Init.GCMCMACPhase setting */
  794. /*=================================================*/
  795. else
  796. {
  797. hcryp->State = HAL_CRYP_STATE_ERROR;
  798. __HAL_UNLOCK(hcryp);
  799. return HAL_ERROR;
  800. }
  801. /* Change the CRYP state */
  802. hcryp->State = HAL_CRYP_STATE_READY;
  803. /* Process Unlocked */
  804. __HAL_UNLOCK(hcryp);
  805. return HAL_OK;
  806. }
  807. else
  808. {
  809. return HAL_BUSY;
  810. }
  811. }
  812. /**
  813. * @brief Carry out in interrupt mode the authentication tag generation as well as the ciphering or deciphering
  814. * operation according to hcryp->Init structure fields.
  815. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  816. * the configuration information for CRYP module
  817. * @param pInputData:
  818. * - pointer to payload data in GCM or CCM payload phase,
  819. * - pointer to B0 block in CMAC header phase,
  820. * - pointer to C block in CMAC final phase.
  821. * - Parameter is meaningless in case of GCM/GMAC/CCM init, header and final phases.
  822. * @param Size:
  823. * - length of the input payload data buffer in bytes in GCM or CCM payload phase,
  824. * - length of B0 block (in bytes) in CMAC header phase,
  825. * - length of C block (in bytes) in CMAC final phase.
  826. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  827. * - Parameter is meaningless in case of CCM final phase.
  828. * - Parameter is message length in bytes in case of GCM final phase.
  829. * - Parameter must be set to zero in case of GMAC final phase.
  830. * @param pOutputData:
  831. * - pointer to plain or cipher text in GCM/CCM payload phase,
  832. * - pointer to authentication tag in GCM/GMAC/CCM/CMAC final phase.
  833. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  834. * - Parameter is meaningless in case of CMAC header phase.
  835. * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC and CMAC.
  836. * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes
  837. * can be skipped by the user if so required.
  838. * @retval HAL status
  839. */
  840. HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData)
  841. {
  842. uint32_t inputaddr = 0;
  843. uint64_t headerlength = 0;
  844. uint64_t inputlength = 0;
  845. uint32_t index = 0;
  846. uint32_t addhoc_process = 0;
  847. uint32_t difflength = 0;
  848. uint32_t difflengthmod4 = 0;
  849. uint32_t mask[4][3] = { {0xFF000000, 0xFFFF0000, 0xFFFFFF00}, /* 32-bit data */
  850. {0x0000FF00, 0x0000FFFF, 0xFF00FFFF}, /* 16-bit data */
  851. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}, /* 8-bit data */
  852. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}}; /* Bit data */
  853. uint32_t mask_index = hcryp->Init.DataType >> AES_CR_DATATYPE_Pos;
  854. if (hcryp->State == HAL_CRYP_STATE_READY)
  855. {
  856. /* input/output parameters check */
  857. if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  858. {
  859. if (((hcryp->Init.Header != NULL) && (hcryp->Init.HeaderSize == 0)) ||
  860. ((hcryp->Init.Header == NULL) && (hcryp->Init.HeaderSize != 0)))
  861. {
  862. return HAL_ERROR;
  863. }
  864. #if defined(AES_CR_NPBLB)
  865. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  866. #else
  867. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  868. #endif
  869. {
  870. /* In case of CMAC or CCM header phase resumption, we can have pInputData = NULL and Size = 0 */
  871. if (((pInputData != NULL) && (Size == 0)) || ((pInputData == NULL) && (Size != 0)))
  872. {
  873. return HAL_ERROR;
  874. }
  875. }
  876. }
  877. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  878. {
  879. if ((pInputData != NULL) && (Size != 0) && (pOutputData == NULL))
  880. {
  881. return HAL_ERROR;
  882. }
  883. }
  884. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  885. {
  886. if (pOutputData == NULL)
  887. {
  888. return HAL_ERROR;
  889. }
  890. #if !defined(AES_CR_NPBLB)
  891. if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL))
  892. {
  893. return HAL_ERROR;
  894. }
  895. #endif
  896. }
  897. /* Process Locked */
  898. __HAL_LOCK(hcryp);
  899. /* Change the CRYP state */
  900. hcryp->State = HAL_CRYP_STATE_BUSY;
  901. /* Process Unlocked */
  902. __HAL_UNLOCK(hcryp);
  903. /* Enable Computation Complete Flag and Error Interrupts */
  904. __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  905. /*==============================================*/
  906. /* GCM/GMAC (or CCM when applicable) init phase */
  907. /*==============================================*/
  908. if (hcryp->Init.GCMCMACPhase == CRYP_INIT_PHASE)
  909. {
  910. /* In case of init phase, the input data (Key and Initialization Vector) have
  911. already been entered during the initialization process. Therefore, the
  912. software just waits for the CCF interrupt to be raised and which will
  913. be handled by CRYP_AES_Auth_IT() API. */
  914. }
  915. /*===================================*/
  916. /* GCM/GMAC/CCM or CMAC header phase */
  917. /*===================================*/
  918. else if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  919. {
  920. #if defined(AES_CR_NPBLB)
  921. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  922. #else
  923. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  924. #endif
  925. {
  926. /* In case of CMAC, B blocks are first entered, before the header.
  927. Therefore, B blocks and the header are entered back-to-back
  928. as if it was only one single block.
  929. However, in case of resumption after suspension, if all the
  930. B blocks have been entered (in that case, Size = 0), only the
  931. remainder of the non-processed header bytes are entered. */
  932. if (Size != 0)
  933. {
  934. hcryp->CrypInCount = Size + hcryp->Init.HeaderSize;
  935. hcryp->pCrypInBuffPtr = pInputData;
  936. }
  937. else
  938. {
  939. hcryp->CrypInCount = hcryp->Init.HeaderSize;
  940. hcryp->pCrypInBuffPtr = hcryp->Init.Header;
  941. }
  942. }
  943. else
  944. {
  945. /* Get the header addresses and sizes */
  946. hcryp->CrypInCount = hcryp->Init.HeaderSize;
  947. hcryp->pCrypInBuffPtr = hcryp->Init.Header;
  948. }
  949. inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  950. #if !defined(AES_CR_NPBLB)
  951. /* Set header phase; for GCM or GMAC, set data-byte at this point */
  952. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  953. {
  954. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_HEADER_PHASE|hcryp->Init.DataType);
  955. }
  956. else
  957. #endif
  958. {
  959. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_HEADER_PHASE);
  960. }
  961. /* Enable the Peripheral */
  962. __HAL_CRYP_ENABLE(hcryp);
  963. /* Increment/decrement instance pointer/counter */
  964. if (hcryp->CrypInCount == 0)
  965. {
  966. /* Case of no header */
  967. hcryp->State = HAL_CRYP_STATE_READY;
  968. /* Mark that the header phase is over */
  969. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  970. return HAL_OK;
  971. }
  972. else if (hcryp->CrypInCount < 16)
  973. {
  974. hcryp->CrypInCount = 0;
  975. addhoc_process = 1;
  976. difflength = (uint32_t) (hcryp->Init.HeaderSize);
  977. difflengthmod4 = difflength%4;
  978. }
  979. else
  980. {
  981. hcryp->pCrypInBuffPtr += 16;
  982. hcryp->CrypInCount -= 16;
  983. }
  984. #if defined(AES_CR_NPBLB)
  985. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  986. #else
  987. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  988. #endif
  989. {
  990. if (hcryp->CrypInCount == hcryp->Init.HeaderSize)
  991. {
  992. /* All B blocks will have been entered after the next
  993. four DINR writing, so point at header buffer for
  994. the next iteration */
  995. hcryp->pCrypInBuffPtr = hcryp->Init.Header;
  996. }
  997. }
  998. /* Enter header first block to initiate the process
  999. in the Data Input register */
  1000. if (addhoc_process == 0)
  1001. {
  1002. /* Header has size equal or larger than 128 bits */
  1003. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1004. inputaddr+=4;
  1005. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1006. inputaddr+=4;
  1007. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1008. inputaddr+=4;
  1009. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1010. }
  1011. else
  1012. {
  1013. /* Header has size less than 128 bits */
  1014. /* Enter complete words when possible */
  1015. for( ; index < (difflength/4); index ++)
  1016. {
  1017. /* Write the Input block in the Data Input register */
  1018. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1019. inputaddr+=4;
  1020. }
  1021. /* Enter incomplete word padded with zeroes if applicable
  1022. (case of header length not a multiple of 32-bits) */
  1023. if (difflengthmod4 != 0)
  1024. {
  1025. hcryp->Instance->DINR = ((*(uint32_t*)(inputaddr)) & mask[mask_index][difflengthmod4-1]);
  1026. }
  1027. /* Pad with zero-words to reach 128-bit long block and wrap-up header feeding to the IP */
  1028. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  1029. {
  1030. hcryp->Instance->DINR = 0;
  1031. }
  1032. }
  1033. }
  1034. /*============================================*/
  1035. /* GCM (or CCM when applicable) payload phase */
  1036. /*============================================*/
  1037. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  1038. {
  1039. /* Get the buffer addresses and sizes */
  1040. hcryp->CrypInCount = Size;
  1041. hcryp->pCrypInBuffPtr = pInputData;
  1042. hcryp->pCrypOutBuffPtr = pOutputData;
  1043. hcryp->CrypOutCount = Size;
  1044. inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  1045. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PAYLOAD_PHASE);
  1046. /* if the header phase has been bypassed, AES must be enabled again */
  1047. if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER)
  1048. {
  1049. __HAL_CRYP_ENABLE(hcryp);
  1050. }
  1051. /* No payload case */
  1052. if (pInputData == NULL)
  1053. {
  1054. hcryp->State = HAL_CRYP_STATE_READY;
  1055. /* Mark that the header phase is over */
  1056. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  1057. /* Process Unlocked */
  1058. __HAL_UNLOCK(hcryp);
  1059. return HAL_OK;
  1060. }
  1061. /* Specific handling to manage payload size less than 128 bits */
  1062. if (Size < 16)
  1063. {
  1064. difflength = (uint32_t) (Size);
  1065. #if defined(AES_CR_NPBLB)
  1066. /* In case of GCM encryption or CCM decryption, specify the number of padding
  1067. bytes in last block of payload */
  1068. if (READ_BIT(hcryp->Instance->CR, AES_CR_GCMPH) == CRYP_PAYLOAD_PHASE)
  1069. {
  1070. if (((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_GCM_GMAC)
  1071. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_ENCRYPT))
  1072. || ((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_CCM)
  1073. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_DECRYPT)))
  1074. {
  1075. /* Set NPBLB field in writing the number of padding bytes
  1076. for the last block of payload */
  1077. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, (16 - difflength) << AES_POSITION_CR_NPBLB);
  1078. }
  1079. }
  1080. #else
  1081. /* Software workaround applied to GCM encryption only */
  1082. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT)
  1083. {
  1084. /* Change the mode configured in CHMOD bits of CR register to select CTR mode */
  1085. __HAL_CRYP_SET_CHAININGMODE(hcryp, CRYP_CHAINMODE_AES_CTR);
  1086. }
  1087. #endif
  1088. /* Set hcryp->CrypInCount to 0 (no more data to enter) */
  1089. hcryp->CrypInCount = 0;
  1090. /* Insert the last block (which size is inferior to 128 bits) padded with zeroes,
  1091. to have a complete block of 128 bits */
  1092. difflengthmod4 = difflength%4;
  1093. /* Insert the last block (which size is inferior to 128 bits) padded with zeroes
  1094. to have a complete block of 128 bits */
  1095. for(index=0; index < (difflength/4); index ++)
  1096. {
  1097. /* Write the Input block in the Data Input register */
  1098. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1099. inputaddr+=4;
  1100. }
  1101. /* If required, manage input data size not multiple of 32 bits */
  1102. if (difflengthmod4 != 0)
  1103. {
  1104. hcryp->Instance->DINR = ((*(uint32_t*)(inputaddr)) & mask[mask_index][difflengthmod4-1]);
  1105. }
  1106. /* Wrap-up in padding with zero-words if applicable */
  1107. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  1108. {
  1109. hcryp->Instance->DINR = 0;
  1110. }
  1111. }
  1112. else
  1113. {
  1114. /* Increment/decrement instance pointer/counter */
  1115. hcryp->pCrypInBuffPtr += 16;
  1116. hcryp->CrypInCount -= 16;
  1117. /* Enter payload first block to initiate the process
  1118. in the Data Input register */
  1119. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1120. inputaddr+=4;
  1121. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1122. inputaddr+=4;
  1123. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1124. inputaddr+=4;
  1125. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1126. }
  1127. }
  1128. /*==================================*/
  1129. /* GCM/GMAC/CCM or CMAC final phase */
  1130. /*==================================*/
  1131. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  1132. {
  1133. hcryp->pCrypOutBuffPtr = pOutputData;
  1134. #if defined(AES_CR_NPBLB)
  1135. /* By default, clear NPBLB field */
  1136. CLEAR_BIT(hcryp->Instance->CR, AES_CR_NPBLB);
  1137. #endif
  1138. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_FINAL_PHASE);
  1139. /* if the header and payload phases have been bypassed, AES must be enabled again */
  1140. if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER)
  1141. {
  1142. __HAL_CRYP_ENABLE(hcryp);
  1143. }
  1144. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  1145. {
  1146. headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
  1147. inputlength = Size * 8; /* Input length in bits */
  1148. /* Write the number of bits in the header on 64 bits followed by the number
  1149. of bits in the payload on 64 bits as well */
  1150. #if !defined(AES_CR_NPBLB)
  1151. if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  1152. {
  1153. hcryp->Instance->DINR = __RBIT((headerlength)>>32);
  1154. hcryp->Instance->DINR = __RBIT(headerlength);
  1155. hcryp->Instance->DINR = __RBIT((inputlength)>>32);
  1156. hcryp->Instance->DINR = __RBIT(inputlength);
  1157. }
  1158. else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  1159. {
  1160. hcryp->Instance->DINR = __REV((headerlength)>>32);
  1161. hcryp->Instance->DINR = __REV(headerlength);
  1162. hcryp->Instance->DINR = __REV((inputlength)>>32);
  1163. hcryp->Instance->DINR = __REV(inputlength);
  1164. }
  1165. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  1166. {
  1167. hcryp->Instance->DINR = __ROR((headerlength)>>32, 16);
  1168. hcryp->Instance->DINR = __ROR(headerlength, 16);
  1169. hcryp->Instance->DINR = __ROR((inputlength)>>32, 16);
  1170. hcryp->Instance->DINR = __ROR(inputlength, 16);
  1171. }
  1172. else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
  1173. {
  1174. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  1175. hcryp->Instance->DINR = (uint32_t)(headerlength);
  1176. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  1177. hcryp->Instance->DINR = (uint32_t)(inputlength);
  1178. }
  1179. #else
  1180. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  1181. hcryp->Instance->DINR = (uint32_t)(headerlength);
  1182. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  1183. hcryp->Instance->DINR = (uint32_t)(inputlength);
  1184. #endif
  1185. }
  1186. #if !defined(AES_CR_NPBLB)
  1187. else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  1188. {
  1189. inputaddr = (uint32_t)pInputData;
  1190. /* Enter the last block made of a 128-bit value formatted
  1191. from the original B0 packet. */
  1192. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1193. inputaddr+=4;
  1194. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1195. inputaddr+=4;
  1196. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1197. inputaddr+=4;
  1198. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1199. }
  1200. #endif
  1201. }
  1202. /*=================================================*/
  1203. /* case incorrect hcryp->Init.GCMCMACPhase setting */
  1204. /*=================================================*/
  1205. else
  1206. {
  1207. hcryp->State = HAL_CRYP_STATE_ERROR;
  1208. return HAL_ERROR;
  1209. }
  1210. return HAL_OK;
  1211. }
  1212. else
  1213. {
  1214. return HAL_BUSY;
  1215. }
  1216. }
  1217. /**
  1218. * @brief Carry out in DMA mode the authentication tag generation as well as the ciphering or deciphering
  1219. * operation according to hcryp->Init structure fields.
  1220. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1221. * the configuration information for CRYP module
  1222. * @param pInputData:
  1223. * - pointer to payload data in GCM or CCM payload phase,
  1224. * - pointer to B0 block in CMAC header phase,
  1225. * - pointer to C block in CMAC final phase.
  1226. * - Parameter is meaningless in case of GCM/GMAC/CCM init, header and final phases.
  1227. * @param Size:
  1228. * - length of the input payload data buffer in bytes in GCM or CCM payload phase,
  1229. * - length of B0 block (in bytes) in CMAC header phase,
  1230. * - length of C block (in bytes) in CMAC final phase.
  1231. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  1232. * - Parameter is meaningless in case of CCM final phase.
  1233. * - Parameter is message length in bytes in case of GCM final phase.
  1234. * - Parameter must be set to zero in case of GMAC final phase.
  1235. * @param pOutputData:
  1236. * - pointer to plain or cipher text in GCM/CCM payload phase,
  1237. * - pointer to authentication tag in GCM/GMAC/CCM/CMAC final phase.
  1238. * - Parameter is meaningless in case of GCM/GMAC/CCM init and header phases.
  1239. * - Parameter is meaningless in case of CMAC header phase.
  1240. * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC and CMAC.
  1241. * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes
  1242. * can be skipped by the user if so required.
  1243. * @note pInputData and pOutputData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
  1244. * @retval HAL status
  1245. */
  1246. HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData)
  1247. {
  1248. uint32_t inputaddr = 0;
  1249. uint32_t outputaddr = 0;
  1250. uint32_t tagaddr = 0;
  1251. uint64_t headerlength = 0;
  1252. uint64_t inputlength = 0;
  1253. uint64_t payloadlength = 0;
  1254. if (hcryp->State == HAL_CRYP_STATE_READY)
  1255. {
  1256. /* input/output parameters check */
  1257. if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  1258. {
  1259. if ((hcryp->Init.Header != NULL) && (hcryp->Init.HeaderSize == 0))
  1260. {
  1261. return HAL_ERROR;
  1262. }
  1263. #if defined(AES_CR_NPBLB)
  1264. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  1265. {
  1266. /* In case of CMAC or CCM header phase resumption, we can have pInputData = NULL and Size = 0 */
  1267. if (((pInputData != NULL) && (Size == 0)) || ((pInputData == NULL) && (Size != 0)))
  1268. {
  1269. return HAL_ERROR;
  1270. }
  1271. }
  1272. #else
  1273. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  1274. {
  1275. if ((pInputData == NULL) || (Size == 0))
  1276. {
  1277. return HAL_ERROR;
  1278. }
  1279. }
  1280. #endif
  1281. }
  1282. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  1283. {
  1284. if ((pInputData != NULL) && (Size != 0) && (pOutputData == NULL))
  1285. {
  1286. return HAL_ERROR;
  1287. }
  1288. }
  1289. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  1290. {
  1291. if (pOutputData == NULL)
  1292. {
  1293. return HAL_ERROR;
  1294. }
  1295. #if !defined(AES_CR_NPBLB)
  1296. if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL))
  1297. {
  1298. return HAL_ERROR;
  1299. }
  1300. #endif
  1301. }
  1302. /* Process Locked */
  1303. __HAL_LOCK(hcryp);
  1304. /* Change the CRYP state */
  1305. hcryp->State = HAL_CRYP_STATE_BUSY;
  1306. /*==============================================*/
  1307. /* GCM/GMAC (or CCM when applicable) init phase */
  1308. /*==============================================*/
  1309. /* In case of init phase, the input data (Key and Initialization Vector) have
  1310. already been entered during the initialization process. No DMA transfer is
  1311. required at that point therefore, the software just waits for the CCF flag
  1312. to be raised. */
  1313. if (hcryp->Init.GCMCMACPhase == CRYP_INIT_PHASE)
  1314. {
  1315. /* just wait for hash computation */
  1316. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  1317. {
  1318. hcryp->State = HAL_CRYP_STATE_READY;
  1319. __HAL_UNLOCK(hcryp);
  1320. return HAL_TIMEOUT;
  1321. }
  1322. /* Clear CCF Flag */
  1323. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1324. /* Mark that the initialization phase is over */
  1325. hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER;
  1326. hcryp->State = HAL_CRYP_STATE_READY;
  1327. }
  1328. /*====================================*/
  1329. /* GCM/GMAC/ CCM or CMAC header phase */
  1330. /*====================================*/
  1331. else if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  1332. {
  1333. #if !defined(AES_CR_NPBLB)
  1334. /* Set header phase; for GCM or GMAC, set data-byte at this point */
  1335. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  1336. {
  1337. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_HEADER_PHASE|hcryp->Init.DataType);
  1338. }
  1339. else
  1340. #endif
  1341. {
  1342. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_HEADER_PHASE);
  1343. }
  1344. /* Enable the CRYP peripheral */
  1345. __HAL_CRYP_ENABLE(hcryp);
  1346. #if !defined(AES_CR_NPBLB)
  1347. /* enter first B0 block in polling mode (no DMA transfer for B0) */
  1348. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  1349. {
  1350. inputaddr = (uint32_t)pInputData;
  1351. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1352. inputaddr+=4;
  1353. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1354. inputaddr+=4;
  1355. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1356. inputaddr+=4;
  1357. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1358. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  1359. {
  1360. hcryp->State = HAL_CRYP_STATE_READY;
  1361. __HAL_UNLOCK(hcryp);
  1362. return HAL_TIMEOUT;
  1363. }
  1364. /* Clear CCF Flag */
  1365. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1366. }
  1367. #endif
  1368. /* No header case */
  1369. if (hcryp->Init.Header == NULL)
  1370. {
  1371. hcryp->State = HAL_CRYP_STATE_READY;
  1372. /* Mark that the header phase is over */
  1373. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  1374. /* Process Unlocked */
  1375. __HAL_UNLOCK(hcryp);
  1376. return HAL_OK;
  1377. }
  1378. inputaddr = (uint32_t)hcryp->Init.Header;
  1379. if ((hcryp->Init.HeaderSize % 16) != 0)
  1380. {
  1381. if (hcryp->Init.HeaderSize < 16)
  1382. {
  1383. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  1384. CRYP_Padding(hcryp, (uint32_t) (hcryp->Init.HeaderSize), CRYP_POLLING_OFF);
  1385. hcryp->State = HAL_CRYP_STATE_READY;
  1386. /* Mark that the header phase is over */
  1387. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  1388. /* CCF flag indicating header phase AES processing completion
  1389. will be checked at the start of the next phase:
  1390. - payload phase (GCM / CCM when applicable)
  1391. - final phase (GMAC or CMAC when applicable). */
  1392. }
  1393. else
  1394. {
  1395. /* Local variable headerlength is a number of bytes multiple of 128 bits,
  1396. remaining header data (if any) are handled after this loop */
  1397. headerlength = (((hcryp->Init.HeaderSize)/16)*16) ;
  1398. /* Store the ending transfer point */
  1399. hcryp->pCrypInBuffPtr = hcryp->Init.Header + headerlength;
  1400. hcryp->CrypInCount = (uint32_t)(hcryp->Init.HeaderSize - headerlength); /* remainder */
  1401. /* Set the input and output addresses and start DMA transfer */
  1402. /* (incomplete DMA transfer, will be wrapped up after completion of
  1403. the first one (initiated here) with data padding */
  1404. CRYP_Authentication_SetDMAConfig(hcryp, inputaddr, headerlength, 0);
  1405. }
  1406. }
  1407. else
  1408. {
  1409. hcryp->CrypInCount = 0;
  1410. /* Set the input address and start DMA transfer */
  1411. CRYP_Authentication_SetDMAConfig(hcryp, inputaddr, hcryp->Init.HeaderSize, 0);
  1412. }
  1413. }
  1414. /*============================================*/
  1415. /* GCM (or CCM when applicable) payload phase */
  1416. /*============================================*/
  1417. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  1418. {
  1419. /* Coming from header phase, wait for CCF flag to be raised
  1420. if header present and fed to the IP in the previous phase */
  1421. if (hcryp->Init.Header != NULL)
  1422. {
  1423. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  1424. {
  1425. hcryp->State = HAL_CRYP_STATE_READY;
  1426. __HAL_UNLOCK(hcryp);
  1427. return HAL_TIMEOUT;
  1428. }
  1429. }
  1430. else
  1431. {
  1432. /* Enable the Peripheral since wasn't in header phase (no header case) */
  1433. __HAL_CRYP_ENABLE(hcryp);
  1434. }
  1435. /* Clear CCF Flag */
  1436. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1437. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PAYLOAD_PHASE);
  1438. /* No payload case */
  1439. if (pInputData == NULL)
  1440. {
  1441. hcryp->State = HAL_CRYP_STATE_READY;
  1442. /* Mark that the header phase is over */
  1443. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  1444. /* Process Unlocked */
  1445. __HAL_UNLOCK(hcryp);
  1446. return HAL_OK;
  1447. }
  1448. /* Specific handling to manage payload size less than 128 bits */
  1449. if ((Size % 16) != 0)
  1450. {
  1451. inputaddr = (uint32_t)pInputData;
  1452. outputaddr = (uint32_t)pOutputData;
  1453. if (Size < 16)
  1454. {
  1455. /* Block is now entered in polling mode, no actual gain in resorting to DMA */
  1456. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  1457. hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr;
  1458. CRYP_Padding(hcryp, (uint32_t)Size, CRYP_POLLING_ON);
  1459. /* Change the CRYP state to ready */
  1460. hcryp->State = HAL_CRYP_STATE_READY;
  1461. /* Mark that the payload phase is over */
  1462. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  1463. /* Call output data transfer complete callback */
  1464. HAL_CRYP_OutCpltCallback(hcryp);
  1465. }
  1466. else
  1467. {
  1468. payloadlength = (Size/16) * 16;
  1469. /* Store the ending transfer points */
  1470. hcryp->pCrypInBuffPtr = pInputData + payloadlength;
  1471. hcryp->pCrypOutBuffPtr = pOutputData + payloadlength;
  1472. hcryp->CrypInCount = (uint32_t)(Size - payloadlength); /* remainder */
  1473. /* Set the input and output addresses and start DMA transfer */
  1474. /* (incomplete DMA transfer, will be wrapped up with data padding
  1475. after completion of the one initiated here) */
  1476. CRYP_Authentication_SetDMAConfig(hcryp, inputaddr, payloadlength, outputaddr);
  1477. }
  1478. }
  1479. else
  1480. {
  1481. hcryp->CrypInCount = 0;
  1482. inputaddr = (uint32_t)pInputData;
  1483. outputaddr = (uint32_t)pOutputData;
  1484. /* Set the input and output addresses and start DMA transfer */
  1485. CRYP_Authentication_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
  1486. }
  1487. }
  1488. /*==================================*/
  1489. /* GCM/GMAC/CCM or CMAC final phase */
  1490. /*==================================*/
  1491. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  1492. {
  1493. /* If coming from header phase (GMAC or CMAC case when applicable),
  1494. wait for CCF flag to be raised */
  1495. if (READ_BIT(hcryp->Instance->CR, AES_CR_GCMPH) == CRYP_HEADER_PHASE)
  1496. {
  1497. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  1498. {
  1499. hcryp->State = HAL_CRYP_STATE_READY;
  1500. __HAL_UNLOCK(hcryp);
  1501. return HAL_TIMEOUT;
  1502. }
  1503. /* Clear CCF Flag */
  1504. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1505. }
  1506. tagaddr = (uint32_t)pOutputData;
  1507. #if defined(AES_CR_NPBLB)
  1508. /* By default, clear NPBLB field */
  1509. CLEAR_BIT(hcryp->Instance->CR, AES_CR_NPBLB);
  1510. #endif
  1511. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_FINAL_PHASE);
  1512. /* if the header and payload phases have been bypassed, AES must be enabled again */
  1513. if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER)
  1514. {
  1515. __HAL_CRYP_ENABLE(hcryp);
  1516. }
  1517. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
  1518. {
  1519. headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
  1520. inputlength = Size * 8; /* input length in bits */
  1521. /* Write the number of bits in the header on 64 bits followed by the number
  1522. of bits in the payload on 64 bits as well */
  1523. #if !defined(AES_CR_NPBLB)
  1524. if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
  1525. {
  1526. hcryp->Instance->DINR = __RBIT((headerlength)>>32);
  1527. hcryp->Instance->DINR = __RBIT(headerlength);
  1528. hcryp->Instance->DINR = __RBIT((inputlength)>>32);
  1529. hcryp->Instance->DINR = __RBIT(inputlength);
  1530. }
  1531. else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
  1532. {
  1533. hcryp->Instance->DINR = __REV((headerlength)>>32);
  1534. hcryp->Instance->DINR = __REV(headerlength);
  1535. hcryp->Instance->DINR = __REV((inputlength)>>32);
  1536. hcryp->Instance->DINR = __REV(inputlength);
  1537. }
  1538. else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
  1539. {
  1540. hcryp->Instance->DINR = __ROR((headerlength)>>32, 16);
  1541. hcryp->Instance->DINR = __ROR(headerlength, 16);
  1542. hcryp->Instance->DINR = __ROR((inputlength)>>32, 16);
  1543. hcryp->Instance->DINR = __ROR(inputlength, 16);
  1544. }
  1545. else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
  1546. {
  1547. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  1548. hcryp->Instance->DINR = (uint32_t)(headerlength);
  1549. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  1550. hcryp->Instance->DINR = (uint32_t)(inputlength);
  1551. }
  1552. #else
  1553. hcryp->Instance->DINR = (uint32_t)(headerlength>>32);
  1554. hcryp->Instance->DINR = (uint32_t)(headerlength);
  1555. hcryp->Instance->DINR = (uint32_t)(inputlength>>32);
  1556. hcryp->Instance->DINR = (uint32_t)(inputlength);
  1557. #endif
  1558. }
  1559. #if !defined(AES_CR_NPBLB)
  1560. else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  1561. {
  1562. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1563. inputaddr = (uint32_t)pInputData;
  1564. /* Enter the last block made of a 128-bit value formatted
  1565. from the original B0 packet. */
  1566. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1567. inputaddr+=4;
  1568. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1569. inputaddr+=4;
  1570. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1571. inputaddr+=4;
  1572. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  1573. }
  1574. #endif
  1575. /* No DMA transfer is required at that point therefore, the software
  1576. just waits for the CCF flag to be raised. */
  1577. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  1578. {
  1579. hcryp->State = HAL_CRYP_STATE_READY;
  1580. __HAL_UNLOCK(hcryp);
  1581. return HAL_TIMEOUT;
  1582. }
  1583. /* Read the Auth TAG in the IN FIFO */
  1584. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  1585. tagaddr+=4;
  1586. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  1587. tagaddr+=4;
  1588. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  1589. tagaddr+=4;
  1590. *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR;
  1591. /* Clear CCF Flag */
  1592. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1593. /* Mark that the final phase is over */
  1594. hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER;
  1595. hcryp->State = HAL_CRYP_STATE_READY;
  1596. /* Disable the Peripheral */
  1597. __HAL_CRYP_DISABLE(hcryp);
  1598. }
  1599. /*=================================================*/
  1600. /* case incorrect hcryp->Init.GCMCMACPhase setting */
  1601. /*=================================================*/
  1602. else
  1603. {
  1604. hcryp->State = HAL_CRYP_STATE_ERROR;
  1605. __HAL_UNLOCK(hcryp);
  1606. return HAL_ERROR;
  1607. }
  1608. /* Process Unlocked */
  1609. __HAL_UNLOCK(hcryp);
  1610. return HAL_OK;
  1611. }
  1612. else
  1613. {
  1614. return HAL_BUSY;
  1615. }
  1616. }
  1617. /**
  1618. * @}
  1619. */
  1620. /** @defgroup CRYPEx_Exported_Functions_Group3 AES suspension/resumption functions
  1621. * @brief Extended processing functions.
  1622. *
  1623. @verbatim
  1624. ==============================================================================
  1625. ##### AES extended suspension and resumption functions #####
  1626. ==============================================================================
  1627. [..] This section provides functions allowing to:
  1628. (+) save in memory the Initialization Vector, the Key registers, the Control register or
  1629. the Suspend registers when a process is suspended by a higher priority message
  1630. (+) write back in CRYP hardware block the saved values listed above when the suspended
  1631. lower priority message processing is resumed.
  1632. @endverbatim
  1633. * @{
  1634. */
  1635. /**
  1636. * @brief In case of message processing suspension, read the Initialization Vector.
  1637. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1638. * the configuration information for CRYP module.
  1639. * @param Output: Pointer to the buffer containing the saved Initialization Vector.
  1640. * @note This value has to be stored for reuse by writing the AES_IVRx registers
  1641. * as soon as the interrupted processing has to be resumed.
  1642. * Applicable to all chaining modes.
  1643. * @note AES must be disabled when reading or resetting the IV values.
  1644. * @retval None
  1645. */
  1646. void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output)
  1647. {
  1648. uint32_t outputaddr = (uint32_t)Output;
  1649. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR3);
  1650. outputaddr+=4;
  1651. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR2);
  1652. outputaddr+=4;
  1653. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR1);
  1654. outputaddr+=4;
  1655. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR0);
  1656. }
  1657. /**
  1658. * @brief In case of message processing resumption, rewrite the Initialization
  1659. * Vector in the AES_IVRx registers.
  1660. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1661. * the configuration information for CRYP module.
  1662. * @param Input: Pointer to the buffer containing the saved Initialization Vector to
  1663. * write back in the CRYP hardware block.
  1664. * @note Applicable to all chaining modes.
  1665. * @note AES must be disabled when reading or resetting the IV values.
  1666. * @retval None
  1667. */
  1668. void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input)
  1669. {
  1670. uint32_t ivaddr = (uint32_t)Input;
  1671. hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
  1672. ivaddr+=4;
  1673. hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
  1674. ivaddr+=4;
  1675. hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
  1676. ivaddr+=4;
  1677. hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
  1678. }
  1679. /**
  1680. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing suspension,
  1681. * read the Suspend Registers.
  1682. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1683. * the configuration information for CRYP module.
  1684. * @param Output: Pointer to the buffer containing the saved Suspend Registers.
  1685. * @note These values have to be stored for reuse by writing back the AES_SUSPxR registers
  1686. * as soon as the interrupted processing has to be resumed.
  1687. * @retval None
  1688. */
  1689. void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output)
  1690. {
  1691. uint32_t outputaddr = (uint32_t)Output;
  1692. /* In case of GCM payload phase encryption, check that suspension can be carried out */
  1693. if (READ_BIT(hcryp->Instance->CR, (AES_CR_GCMPH|AES_CR_MODE)) == (CRYP_PAYLOAD_PHASE|CRYP_ALGOMODE_ENCRYPT))
  1694. {
  1695. /* Ensure that Busy flag is reset */
  1696. if(CRYP_WaitOnBusyFlagReset(hcryp, CRYP_BUSY_TIMEOUTVALUE) != HAL_OK)
  1697. {
  1698. hcryp->ErrorCode |= HAL_CRYP_BUSY_ERROR;
  1699. hcryp->State = HAL_CRYP_STATE_ERROR;
  1700. /* Process Unlocked */
  1701. __HAL_UNLOCK(hcryp);
  1702. HAL_CRYP_ErrorCallback(hcryp);
  1703. return ;
  1704. }
  1705. }
  1706. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP7R);
  1707. outputaddr+=4;
  1708. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP6R);
  1709. outputaddr+=4;
  1710. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP5R);
  1711. outputaddr+=4;
  1712. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP4R);
  1713. outputaddr+=4;
  1714. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP3R);
  1715. outputaddr+=4;
  1716. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP2R);
  1717. outputaddr+=4;
  1718. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP1R);
  1719. outputaddr+=4;
  1720. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP0R);
  1721. }
  1722. /**
  1723. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing resumption, rewrite the Suspend
  1724. * Registers in the AES_SUSPxR registers.
  1725. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1726. * the configuration information for CRYP module.
  1727. * @param Input: Pointer to the buffer containing the saved suspend registers to
  1728. * write back in the CRYP hardware block.
  1729. * @retval None
  1730. */
  1731. void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input)
  1732. {
  1733. uint32_t ivaddr = (uint32_t)Input;
  1734. hcryp->Instance->SUSP7R = __REV(*(uint32_t*)(ivaddr));
  1735. ivaddr+=4;
  1736. hcryp->Instance->SUSP6R = __REV(*(uint32_t*)(ivaddr));
  1737. ivaddr+=4;
  1738. hcryp->Instance->SUSP5R = __REV(*(uint32_t*)(ivaddr));
  1739. ivaddr+=4;
  1740. hcryp->Instance->SUSP4R = __REV(*(uint32_t*)(ivaddr));
  1741. ivaddr+=4;
  1742. hcryp->Instance->SUSP3R = __REV(*(uint32_t*)(ivaddr));
  1743. ivaddr+=4;
  1744. hcryp->Instance->SUSP2R = __REV(*(uint32_t*)(ivaddr));
  1745. ivaddr+=4;
  1746. hcryp->Instance->SUSP1R = __REV(*(uint32_t*)(ivaddr));
  1747. ivaddr+=4;
  1748. hcryp->Instance->SUSP0R = __REV(*(uint32_t*)(ivaddr));
  1749. }
  1750. /**
  1751. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing suspension, read the Key Registers.
  1752. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1753. * the configuration information for CRYP module.
  1754. * @param Output: Pointer to the buffer containing the saved Key Registers.
  1755. * @param KeySize: Indicates the key size (128 or 256 bits).
  1756. * @note These values have to be stored for reuse by writing back the AES_KEYRx registers
  1757. * as soon as the interrupted processing has to be resumed.
  1758. * @retval None
  1759. */
  1760. void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize)
  1761. {
  1762. uint32_t keyaddr = (uint32_t)Output;
  1763. if (KeySize == CRYP_KEYSIZE_256B)
  1764. {
  1765. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR7);
  1766. keyaddr+=4;
  1767. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR6);
  1768. keyaddr+=4;
  1769. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR5);
  1770. keyaddr+=4;
  1771. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR4);
  1772. keyaddr+=4;
  1773. }
  1774. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR3);
  1775. keyaddr+=4;
  1776. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR2);
  1777. keyaddr+=4;
  1778. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR1);
  1779. keyaddr+=4;
  1780. *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR0);
  1781. }
  1782. /**
  1783. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing resumption, rewrite the Key
  1784. * Registers in the AES_KEYRx registers.
  1785. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1786. * the configuration information for CRYP module.
  1787. * @param Input: Pointer to the buffer containing the saved key registers to
  1788. * write back in the CRYP hardware block.
  1789. * @param KeySize: Indicates the key size (128 or 256 bits)
  1790. * @retval None
  1791. */
  1792. void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize)
  1793. {
  1794. uint32_t keyaddr = (uint32_t)Input;
  1795. if (KeySize == CRYP_KEYSIZE_256B)
  1796. {
  1797. hcryp->Instance->KEYR7 = __REV(*(uint32_t*)(keyaddr));
  1798. keyaddr+=4;
  1799. hcryp->Instance->KEYR6 = __REV(*(uint32_t*)(keyaddr));
  1800. keyaddr+=4;
  1801. hcryp->Instance->KEYR5 = __REV(*(uint32_t*)(keyaddr));
  1802. keyaddr+=4;
  1803. hcryp->Instance->KEYR4 = __REV(*(uint32_t*)(keyaddr));
  1804. keyaddr+=4;
  1805. }
  1806. hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
  1807. keyaddr+=4;
  1808. hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
  1809. keyaddr+=4;
  1810. hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
  1811. keyaddr+=4;
  1812. hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
  1813. }
  1814. /**
  1815. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing suspension, read the Control Register.
  1816. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1817. * the configuration information for CRYP module.
  1818. * @param Output: Pointer to the buffer containing the saved Control Register.
  1819. * @note This values has to be stored for reuse by writing back the AES_CR register
  1820. * as soon as the interrupted processing has to be resumed.
  1821. * @retval None
  1822. */
  1823. void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output)
  1824. {
  1825. *(uint32_t*)(Output) = hcryp->Instance->CR;
  1826. }
  1827. /**
  1828. * @brief In case of message GCM/GMAC (CCM/CMAC when applicable) processing resumption, rewrite the Control
  1829. * Registers in the AES_CR register.
  1830. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1831. * the configuration information for CRYP module.
  1832. * @param Input: Pointer to the buffer containing the saved Control Register to
  1833. * write back in the CRYP hardware block.
  1834. * @retval None
  1835. */
  1836. void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input)
  1837. {
  1838. hcryp->Instance->CR = *(uint32_t*)(Input);
  1839. /* At the same time, set handle state back to READY to be able to resume the AES calculations
  1840. without the processing APIs returning HAL_BUSY when called. */
  1841. hcryp->State = HAL_CRYP_STATE_READY;
  1842. }
  1843. /**
  1844. * @brief Request CRYP processing suspension when in polling or interruption mode.
  1845. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1846. * the configuration information for CRYP module.
  1847. * @note Set the handle field SuspendRequest to the appropriate value so that
  1848. * the on-going CRYP processing is suspended as soon as the required
  1849. * conditions are met.
  1850. * @note It is advised not to suspend the CRYP processing when the DMA controller
  1851. * is managing the data transfer
  1852. * @retval None
  1853. */
  1854. void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp)
  1855. {
  1856. /* Set Handle Suspend Request field */
  1857. hcryp->SuspendRequest = HAL_CRYP_SUSPEND;
  1858. }
  1859. /**
  1860. * @}
  1861. */
  1862. /**
  1863. * @}
  1864. */
  1865. /** @addtogroup CRYPEx_Private_Functions
  1866. * @{
  1867. */
  1868. /**
  1869. * @brief DMA CRYP Input Data process complete callback
  1870. * for GCM, GMAC, CCM or CMAC chaining modes.
  1871. * @note Specific setting of hcryp fields are required only
  1872. * in the case of header phase where no output data DMA
  1873. * transfer is on-going (only input data transfer is enabled
  1874. * in such a case).
  1875. * @param hdma: DMA handle.
  1876. * @retval None
  1877. */
  1878. static void CRYP_Authentication_DMAInCplt(DMA_HandleTypeDef *hdma)
  1879. {
  1880. uint32_t difflength = 0;
  1881. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1882. /* Disable the DMA transfer for input request */
  1883. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
  1884. if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  1885. {
  1886. if (hcryp->CrypInCount != 0)
  1887. {
  1888. /* Last block is now entered in polling mode, no actual gain in resorting to DMA */
  1889. difflength = hcryp->CrypInCount;
  1890. hcryp->CrypInCount = 0;
  1891. CRYP_Padding(hcryp, difflength, CRYP_POLLING_OFF);
  1892. }
  1893. hcryp->State = HAL_CRYP_STATE_READY;
  1894. /* Mark that the header phase is over */
  1895. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  1896. }
  1897. /* CCF flag indicating header phase AES processing completion
  1898. will be checked at the start of the next phase:
  1899. - payload phase (GCM or CCM when applicable)
  1900. - final phase (GMAC or CMAC).
  1901. This allows to avoid the Wait on Flag within the IRQ handling. */
  1902. /* Call input data transfer complete callback */
  1903. HAL_CRYP_InCpltCallback(hcryp);
  1904. }
  1905. /**
  1906. * @brief DMA CRYP Output Data process complete callback
  1907. * for GCM, GMAC, CCM or CMAC chaining modes.
  1908. * @note This callback is called only in the payload phase.
  1909. * @param hdma: DMA handle.
  1910. * @retval None
  1911. */
  1912. static void CRYP_Authentication_DMAOutCplt(DMA_HandleTypeDef *hdma)
  1913. {
  1914. uint32_t difflength = 0;
  1915. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1916. /* Disable the DMA transfer for output request */
  1917. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
  1918. /* Clear CCF Flag */
  1919. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1920. /* Initiate additional transfer to wrap-up data feeding to the IP */
  1921. if (hcryp->CrypInCount != 0)
  1922. {
  1923. /* Last block is now entered in polling mode, no actual gain in resorting to DMA */
  1924. difflength = hcryp->CrypInCount;
  1925. hcryp->CrypInCount = 0;
  1926. CRYP_Padding(hcryp, difflength, CRYP_POLLING_ON);
  1927. }
  1928. /* Change the CRYP state to ready */
  1929. hcryp->State = HAL_CRYP_STATE_READY;
  1930. /* Mark that the payload phase is over */
  1931. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  1932. /* Call output data transfer complete callback */
  1933. HAL_CRYP_OutCpltCallback(hcryp);
  1934. }
  1935. /**
  1936. * @brief DMA CRYP communication error callback
  1937. * for GCM, GMAC, CCM or CMAC chaining modes.
  1938. * @param hdma: DMA handle
  1939. * @retval None
  1940. */
  1941. static void CRYP_Authentication_DMAError(DMA_HandleTypeDef *hdma)
  1942. {
  1943. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1944. hcryp->State= HAL_CRYP_STATE_ERROR;
  1945. hcryp->ErrorCode |= HAL_CRYP_DMA_ERROR;
  1946. HAL_CRYP_ErrorCallback(hcryp);
  1947. /* Clear Error Flag */
  1948. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_ERR_CLEAR);
  1949. }
  1950. /**
  1951. * @brief Handle CRYP block input/output data handling under interruption
  1952. * for GCM, GMAC, CCM or CMAC chaining modes.
  1953. * @note The function is called under interruption only, once
  1954. * interruptions have been enabled by HAL_CRYPEx_AES_Auth_IT().
  1955. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  1956. * the configuration information for CRYP module
  1957. * @retval HAL status
  1958. */
  1959. HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp)
  1960. {
  1961. uint32_t inputaddr = 0x0;
  1962. uint32_t outputaddr = 0x0;
  1963. uint32_t index = 0x0;
  1964. uint32_t addhoc_process = 0;
  1965. uint32_t difflength = 0;
  1966. uint32_t difflengthmod4 = 0;
  1967. uint32_t mask[4][3] = { {0xFF000000, 0xFFFF0000, 0xFFFFFF00}, /* 32-bit data */
  1968. {0x0000FF00, 0x0000FFFF, 0xFF00FFFF}, /* 16-bit data */
  1969. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}, /* 8-bit data */
  1970. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}}; /* Bit data */
  1971. uint32_t mask_index = hcryp->Init.DataType >> AES_CR_DATATYPE_Pos;
  1972. uint32_t intermediate_data[4] = {0};
  1973. if(hcryp->State == HAL_CRYP_STATE_BUSY)
  1974. {
  1975. /*===========================*/
  1976. /* GCM/GMAC(/CCM) init phase */
  1977. /*===========================*/
  1978. if (hcryp->Init.GCMCMACPhase == CRYP_INIT_PHASE)
  1979. {
  1980. /* Clear Computation Complete Flag */
  1981. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  1982. /* Disable Computation Complete Flag and Errors Interrupts */
  1983. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  1984. /* Change the CRYP state */
  1985. hcryp->State = HAL_CRYP_STATE_READY;
  1986. /* Mark that the initialization phase is over */
  1987. hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER;
  1988. /* Process Unlocked */
  1989. __HAL_UNLOCK(hcryp);
  1990. /* Call computation complete callback */
  1991. HAL_CRYPEx_ComputationCpltCallback(hcryp);
  1992. return HAL_OK;
  1993. }
  1994. /*========================================*/
  1995. /* GCM/GMAC (or CCM or CMAC) header phase */
  1996. /*========================================*/
  1997. else if (hcryp->Init.GCMCMACPhase == CRYP_HEADER_PHASE)
  1998. {
  1999. /* Check if all input header data have been entered */
  2000. if (hcryp->CrypInCount == 0)
  2001. {
  2002. /* Clear Computation Complete Flag */
  2003. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2004. /* Disable Computation Complete Flag and Errors Interrupts */
  2005. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2006. /* Change the CRYP state */
  2007. hcryp->State = HAL_CRYP_STATE_READY;
  2008. /* Mark that the header phase is over */
  2009. hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER;
  2010. /* Process Unlocked */
  2011. __HAL_UNLOCK(hcryp);
  2012. /* Call computation complete callback */
  2013. HAL_CRYPEx_ComputationCpltCallback(hcryp);
  2014. return HAL_OK;
  2015. }
  2016. /* If suspension flag has been raised, suspend processing */
  2017. else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
  2018. {
  2019. /* Clear CCF Flag */
  2020. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2021. /* reset SuspendRequest */
  2022. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  2023. /* Disable Computation Complete Flag and Errors Interrupts */
  2024. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2025. /* Change the CRYP state */
  2026. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  2027. /* Mark that the header phase is suspended */
  2028. hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED;
  2029. /* Process Unlocked */
  2030. __HAL_UNLOCK(hcryp);
  2031. return HAL_OK;
  2032. }
  2033. else /* Carry on feeding input data to the CRYP hardware block */
  2034. {
  2035. /* Clear Computation Complete Flag */
  2036. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2037. /* Get the last Input data address */
  2038. inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  2039. /* Increment/decrement instance pointer/counter */
  2040. if (hcryp->CrypInCount < 16)
  2041. {
  2042. difflength = hcryp->CrypInCount;
  2043. hcryp->CrypInCount = 0;
  2044. addhoc_process = 1;
  2045. difflengthmod4 = difflength%4;
  2046. }
  2047. else
  2048. {
  2049. hcryp->pCrypInBuffPtr += 16;
  2050. hcryp->CrypInCount -= 16;
  2051. }
  2052. #if defined(AES_CR_NPBLB)
  2053. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM)
  2054. #else
  2055. if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
  2056. #endif
  2057. {
  2058. if (hcryp->CrypInCount == hcryp->Init.HeaderSize)
  2059. {
  2060. /* All B blocks will have been entered after the next
  2061. four DINR writing, so point at header buffer for
  2062. the next iteration */
  2063. hcryp->pCrypInBuffPtr = hcryp->Init.Header;
  2064. }
  2065. }
  2066. /* Write the Input block in the Data Input register */
  2067. if (addhoc_process == 0)
  2068. {
  2069. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2070. inputaddr+=4;
  2071. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2072. inputaddr+=4;
  2073. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2074. inputaddr+=4;
  2075. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2076. }
  2077. else
  2078. {
  2079. /* Header remainder has size less than 128 bits */
  2080. /* Enter complete words when possible */
  2081. for( ; index < (difflength/4); index ++)
  2082. {
  2083. /* Write the Input block in the Data Input register */
  2084. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2085. inputaddr+=4;
  2086. }
  2087. /* Enter incomplete word padded with zeroes if applicable
  2088. (case of header length not a multiple of 32-bits) */
  2089. if (difflengthmod4 != 0)
  2090. {
  2091. hcryp->Instance->DINR = ((*(uint32_t*)(inputaddr)) & mask[mask_index][difflengthmod4-1]);
  2092. }
  2093. /* Pad with zero-words to reach 128-bit long block and wrap-up header feeding to the IP */
  2094. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  2095. {
  2096. hcryp->Instance->DINR = 0;
  2097. }
  2098. }
  2099. return HAL_OK;
  2100. }
  2101. }
  2102. /*=======================*/
  2103. /* GCM/CCM payload phase */
  2104. /*=======================*/
  2105. else if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  2106. {
  2107. /* Get the last output data address */
  2108. outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
  2109. /* Specific handling to manage payload size less than 128 bits
  2110. when GCM (or CCM when applicable) encryption or decryption is selected.
  2111. Check here if the last block output data are read */
  2112. #if defined(AES_CR_NPBLB)
  2113. if ((hcryp->CrypOutCount < 16) && \
  2114. (hcryp->CrypOutCount > 0))
  2115. #else
  2116. if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) && \
  2117. (hcryp->CrypOutCount < 16) && \
  2118. (hcryp->CrypOutCount > 0))
  2119. #endif
  2120. {
  2121. addhoc_process = 1;
  2122. difflength = hcryp->CrypOutCount;
  2123. difflengthmod4 = difflength%4;
  2124. hcryp->CrypOutCount = 0; /* mark that no more output data will be needed */
  2125. /* Retrieve intermediate data */
  2126. for(index=0; index < 4; index ++)
  2127. {
  2128. intermediate_data[index] = hcryp->Instance->DOUTR;
  2129. }
  2130. /* Retrieve last words of cyphered data */
  2131. /* First, retrieve complete output words */
  2132. for(index=0; index < (difflength/4); index ++)
  2133. {
  2134. *(uint32_t*)(outputaddr) = intermediate_data[index];
  2135. outputaddr+=4;
  2136. }
  2137. /* Next, retrieve partial output word if applicable;
  2138. at the same time, start masking intermediate data
  2139. with a mask of zeros of same size than the padding
  2140. applied to the last block of payload */
  2141. if (difflengthmod4 != 0)
  2142. {
  2143. intermediate_data[difflength/4] &= mask[mask_index][difflengthmod4-1];
  2144. *(uint32_t*)(outputaddr) = intermediate_data[difflength/4];
  2145. }
  2146. #if !defined(AES_CR_NPBLB)
  2147. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT)
  2148. {
  2149. /* Change again CHMOD configuration to GCM mode */
  2150. __HAL_CRYP_SET_CHAININGMODE(hcryp, CRYP_CHAINMODE_AES_GCM_GMAC);
  2151. /* Select FINAL phase */
  2152. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_FINAL_PHASE);
  2153. /* Before inserting the intermediate data, carry on masking operation
  2154. with a mask of zeros of same size than the padding applied to the last block of payload */
  2155. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  2156. {
  2157. intermediate_data[(difflength+3)/4+index] = 0;
  2158. }
  2159. /* Insert intermediate data to trigger an additional DOUTR reading round */
  2160. /* Clear Computation Complete Flag before entering new block */
  2161. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2162. for(index=0; index < 4; index ++)
  2163. {
  2164. hcryp->Instance->DINR = intermediate_data[index];
  2165. }
  2166. }
  2167. else
  2168. #endif
  2169. {
  2170. /* Payload phase is now over */
  2171. /* Clear Computation Complete Flag */
  2172. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2173. /* Disable Computation Complete Flag and Errors Interrupts */
  2174. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2175. /* Change the CRYP state */
  2176. hcryp->State = HAL_CRYP_STATE_READY;
  2177. /* Mark that the payload phase is over */
  2178. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  2179. /* Process Unlocked */
  2180. __HAL_UNLOCK(hcryp);
  2181. /* Call computation complete callback */
  2182. HAL_CRYPEx_ComputationCpltCallback(hcryp);
  2183. }
  2184. return HAL_OK;
  2185. }
  2186. else
  2187. {
  2188. if (hcryp->CrypOutCount != 0)
  2189. {
  2190. /* Usual case (different than GCM/CCM last block < 128 bits ciphering) */
  2191. /* Retrieve the last block available from the CRYP hardware block:
  2192. read the output block from the Data Output Register */
  2193. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2194. outputaddr+=4;
  2195. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2196. outputaddr+=4;
  2197. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2198. outputaddr+=4;
  2199. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2200. /* Increment/decrement instance pointer/counter */
  2201. hcryp->pCrypOutBuffPtr += 16;
  2202. hcryp->CrypOutCount -= 16;
  2203. }
  2204. #if !defined(AES_CR_NPBLB)
  2205. else
  2206. {
  2207. /* Software work-around: additional DOUTR reading round to discard the data */
  2208. for(index=0; index < 4; index ++)
  2209. {
  2210. intermediate_data[index] = hcryp->Instance->DOUTR;
  2211. }
  2212. }
  2213. #endif
  2214. }
  2215. /* Check if all output text has been retrieved */
  2216. if (hcryp->CrypOutCount == 0)
  2217. {
  2218. /* Clear Computation Complete Flag */
  2219. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2220. /* Disable Computation Complete Flag and Errors Interrupts */
  2221. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2222. /* Change the CRYP state */
  2223. hcryp->State = HAL_CRYP_STATE_READY;
  2224. /* Mark that the payload phase is over */
  2225. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER;
  2226. /* Process Unlocked */
  2227. __HAL_UNLOCK(hcryp);
  2228. /* Call computation complete callback */
  2229. HAL_CRYPEx_ComputationCpltCallback(hcryp);
  2230. return HAL_OK;
  2231. }
  2232. /* If suspension flag has been raised, suspend processing */
  2233. else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
  2234. {
  2235. /* Clear CCF Flag */
  2236. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2237. /* reset SuspendRequest */
  2238. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  2239. /* Disable Computation Complete Flag and Errors Interrupts */
  2240. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2241. /* Change the CRYP state */
  2242. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  2243. /* Mark that the payload phase is suspended */
  2244. hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_SUSPENDED;
  2245. /* Process Unlocked */
  2246. __HAL_UNLOCK(hcryp);
  2247. return HAL_OK;
  2248. }
  2249. else /* Output data are still expected, carry on feeding the CRYP
  2250. hardware block with input data */
  2251. {
  2252. /* Clear Computation Complete Flag */
  2253. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2254. /* Get the last Input data address */
  2255. inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  2256. /* Usual input data feeding case */
  2257. if (hcryp->CrypInCount < 16)
  2258. {
  2259. difflength = (uint32_t) (hcryp->CrypInCount);
  2260. difflengthmod4 = difflength%4;
  2261. hcryp->CrypInCount = 0;
  2262. #if defined(AES_CR_NPBLB)
  2263. /* In case of GCM encryption or CCM decryption, specify the number of padding
  2264. bytes in last block of payload */
  2265. if (((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_GCM_GMAC)
  2266. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_ENCRYPT))
  2267. || ((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_CCM)
  2268. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_DECRYPT)))
  2269. {
  2270. /* Set NPBLB field in writing the number of padding bytes
  2271. for the last block of payload */
  2272. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, (16 - difflength) << AES_POSITION_CR_NPBLB);
  2273. }
  2274. #else
  2275. /* Software workaround applied to GCM encryption only */
  2276. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT)
  2277. {
  2278. /* Change the mode configured in CHMOD bits of CR register to select CTR mode */
  2279. __HAL_CRYP_SET_CHAININGMODE(hcryp, CRYP_CHAINMODE_AES_CTR);
  2280. }
  2281. #endif
  2282. /* Insert the last block (which size is inferior to 128 bits) padded with zeroes
  2283. to have a complete block of 128 bits */
  2284. for(index=0; index < (difflength/4); index ++)
  2285. {
  2286. /* Write the Input block in the Data Input register */
  2287. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2288. inputaddr+=4;
  2289. }
  2290. /* If required, manage input data size not multiple of 32 bits */
  2291. if (difflengthmod4 != 0)
  2292. {
  2293. hcryp->Instance->DINR = ((*(uint32_t*)(inputaddr)) & mask[mask_index][difflengthmod4-1]);
  2294. }
  2295. /* Wrap-up in padding with zero-words if applicable */
  2296. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  2297. {
  2298. hcryp->Instance->DINR = 0;
  2299. }
  2300. }
  2301. else
  2302. {
  2303. hcryp->pCrypInBuffPtr += 16;
  2304. hcryp->CrypInCount -= 16;
  2305. /* Write the Input block in the Data Input register */
  2306. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2307. inputaddr+=4;
  2308. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2309. inputaddr+=4;
  2310. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2311. inputaddr+=4;
  2312. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2313. }
  2314. return HAL_OK;
  2315. }
  2316. }
  2317. /*=======================================*/
  2318. /* GCM/GMAC (or CCM or CMAC) final phase */
  2319. /*=======================================*/
  2320. else if (hcryp->Init.GCMCMACPhase == CRYP_FINAL_PHASE)
  2321. {
  2322. /* Clear Computation Complete Flag */
  2323. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2324. /* Get the last output data address */
  2325. outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
  2326. /* Retrieve the last expected data from the CRYP hardware block:
  2327. read the output block from the Data Output Register */
  2328. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2329. outputaddr+=4;
  2330. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2331. outputaddr+=4;
  2332. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2333. outputaddr+=4;
  2334. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2335. /* Disable Computation Complete Flag and Errors Interrupts */
  2336. __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CCFIE|CRYP_IT_ERRIE);
  2337. /* Change the CRYP state */
  2338. hcryp->State = HAL_CRYP_STATE_READY;
  2339. /* Mark that the header phase is over */
  2340. hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER;
  2341. /* Disable the Peripheral */
  2342. __HAL_CRYP_DISABLE(hcryp);
  2343. /* Process Unlocked */
  2344. __HAL_UNLOCK(hcryp);
  2345. /* Call computation complete callback */
  2346. HAL_CRYPEx_ComputationCpltCallback(hcryp);
  2347. return HAL_OK;
  2348. }
  2349. else
  2350. {
  2351. /* Clear Computation Complete Flag */
  2352. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2353. hcryp->State = HAL_CRYP_STATE_ERROR;
  2354. __HAL_UNLOCK(hcryp);
  2355. return HAL_ERROR;
  2356. }
  2357. }
  2358. else
  2359. {
  2360. return HAL_BUSY;
  2361. }
  2362. }
  2363. /**
  2364. * @brief Set the DMA configuration and start the DMA transfer
  2365. * for GCM, GMAC, CCM or CMAC chaining modes.
  2366. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2367. * the configuration information for CRYP module.
  2368. * @param inputaddr: Address of the Input buffer.
  2369. * @param Size: Size of the Input buffer un bytes, must be a multiple of 16.
  2370. * @param outputaddr: Address of the Output buffer, null pointer when no output DMA stream
  2371. * has to be configured.
  2372. * @retval None
  2373. */
  2374. static void CRYP_Authentication_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
  2375. {
  2376. /* Set the input CRYP DMA transfer complete callback */
  2377. hcryp->hdmain->XferCpltCallback = CRYP_Authentication_DMAInCplt;
  2378. /* Set the DMA error callback */
  2379. hcryp->hdmain->XferErrorCallback = CRYP_Authentication_DMAError;
  2380. if (outputaddr != 0)
  2381. {
  2382. /* Set the output CRYP DMA transfer complete callback */
  2383. hcryp->hdmaout->XferCpltCallback = CRYP_Authentication_DMAOutCplt;
  2384. /* Set the DMA error callback */
  2385. hcryp->hdmaout->XferErrorCallback = CRYP_Authentication_DMAError;
  2386. }
  2387. /* Enable the CRYP peripheral */
  2388. __HAL_CRYP_ENABLE(hcryp);
  2389. /* Enable the DMA input stream */
  2390. HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
  2391. /* Enable the DMA input request */
  2392. SET_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
  2393. if (outputaddr != 0)
  2394. {
  2395. /* Enable the DMA output stream */
  2396. HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
  2397. /* Enable the DMA output request */
  2398. SET_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
  2399. }
  2400. }
  2401. /**
  2402. * @brief Write/read input/output data in polling mode.
  2403. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2404. * the configuration information for CRYP module.
  2405. * @param Input: Pointer to the Input buffer.
  2406. * @param Ilength: Length of the Input buffer in bytes, must be a multiple of 16.
  2407. * @param Output: Pointer to the returned buffer.
  2408. * @param Timeout: Specify Timeout value.
  2409. * @retval HAL status
  2410. */
  2411. static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
  2412. {
  2413. uint32_t index = 0;
  2414. uint32_t inputaddr = (uint32_t)Input;
  2415. uint32_t outputaddr = (uint32_t)Output;
  2416. for(index=0; (index < Ilength); index += 16)
  2417. {
  2418. /* Write the Input block in the Data Input register */
  2419. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2420. inputaddr+=4;
  2421. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2422. inputaddr+=4;
  2423. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2424. inputaddr+=4;
  2425. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2426. inputaddr+=4;
  2427. /* Wait for CCF flag to be raised */
  2428. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  2429. {
  2430. hcryp->State = HAL_CRYP_STATE_READY;
  2431. __HAL_UNLOCK(hcryp);
  2432. return HAL_TIMEOUT;
  2433. }
  2434. /* Clear CCF Flag */
  2435. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2436. /* Read the Output block from the Data Output Register */
  2437. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2438. outputaddr+=4;
  2439. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2440. outputaddr+=4;
  2441. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2442. outputaddr+=4;
  2443. *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
  2444. outputaddr+=4;
  2445. /* If the suspension flag has been raised and if the processing is not about
  2446. to end, suspend processing */
  2447. if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < Ilength))
  2448. {
  2449. /* Reset SuspendRequest */
  2450. hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
  2451. /* Save current reading and writing locations of Input and Output buffers */
  2452. hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr;
  2453. hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr;
  2454. /* Save the number of bytes that remain to be processed at this point */
  2455. hcryp->CrypInCount = Ilength - (index+16);
  2456. /* Change the CRYP state */
  2457. hcryp->State = HAL_CRYP_STATE_SUSPENDED;
  2458. return HAL_OK;
  2459. }
  2460. }
  2461. /* Return function status */
  2462. return HAL_OK;
  2463. }
  2464. /**
  2465. * @brief Read derivative key in polling mode when CRYP hardware block is set
  2466. * in key derivation operating mode (mode 2).
  2467. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2468. * the configuration information for CRYP module.
  2469. * @param Output: Pointer to the returned buffer.
  2470. * @param Timeout: Specify Timeout value.
  2471. * @retval HAL status
  2472. */
  2473. static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t Timeout)
  2474. {
  2475. uint32_t outputaddr = (uint32_t)Output;
  2476. /* Wait for CCF flag to be raised */
  2477. if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK)
  2478. {
  2479. hcryp->State = HAL_CRYP_STATE_READY;
  2480. __HAL_UNLOCK(hcryp);
  2481. return HAL_TIMEOUT;
  2482. }
  2483. /* Clear CCF Flag */
  2484. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2485. /* Read the derivative key from the AES_KEYRx registers */
  2486. if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B)
  2487. {
  2488. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR7);
  2489. outputaddr+=4;
  2490. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR6);
  2491. outputaddr+=4;
  2492. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR5);
  2493. outputaddr+=4;
  2494. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR4);
  2495. outputaddr+=4;
  2496. }
  2497. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR3);
  2498. outputaddr+=4;
  2499. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR2);
  2500. outputaddr+=4;
  2501. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR1);
  2502. outputaddr+=4;
  2503. *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR0);
  2504. /* Return function status */
  2505. return HAL_OK;
  2506. }
  2507. /**
  2508. * @brief Set the DMA configuration and start the DMA transfer.
  2509. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2510. * the configuration information for CRYP module.
  2511. * @param inputaddr: Address of the Input buffer.
  2512. * @param Size: Size of the Input buffer in bytes, must be a multiple of 16.
  2513. * @param outputaddr: Address of the Output buffer.
  2514. * @retval None
  2515. */
  2516. static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
  2517. {
  2518. /* Set the CRYP DMA transfer complete callback */
  2519. hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
  2520. /* Set the DMA error callback */
  2521. hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
  2522. /* Set the CRYP DMA transfer complete callback */
  2523. hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
  2524. /* Set the DMA error callback */
  2525. hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
  2526. /* Enable the DMA input stream */
  2527. HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
  2528. /* Enable the DMA output stream */
  2529. HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
  2530. /* Enable In and Out DMA requests */
  2531. SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
  2532. /* Enable the CRYP peripheral */
  2533. __HAL_CRYP_ENABLE(hcryp);
  2534. }
  2535. /**
  2536. * @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised.
  2537. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2538. * the configuration information for CRYP module.
  2539. * @param Timeout: Timeout duration.
  2540. * @retval HAL status
  2541. */
  2542. static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  2543. {
  2544. uint32_t tickstart = 0;
  2545. /* Get timeout */
  2546. tickstart = HAL_GetTick();
  2547. while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
  2548. {
  2549. /* Check for the Timeout */
  2550. if(Timeout != HAL_MAX_DELAY)
  2551. {
  2552. if((HAL_GetTick() - tickstart ) > Timeout)
  2553. {
  2554. return HAL_TIMEOUT;
  2555. }
  2556. }
  2557. }
  2558. return HAL_OK;
  2559. }
  2560. /**
  2561. * @brief Wait for Busy Flag to be reset during a GCM payload encryption process suspension.
  2562. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2563. * the configuration information for CRYP module.
  2564. * @param Timeout: Timeout duration.
  2565. * @retval HAL status
  2566. */
  2567. static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
  2568. {
  2569. uint32_t tickstart = 0;
  2570. /* Get timeout */
  2571. tickstart = HAL_GetTick();
  2572. while(HAL_IS_BIT_SET(hcryp->Instance->SR, AES_SR_BUSY))
  2573. {
  2574. /* Check for the Timeout */
  2575. if(Timeout != HAL_MAX_DELAY)
  2576. {
  2577. if((HAL_GetTick() - tickstart ) > Timeout)
  2578. {
  2579. return HAL_TIMEOUT;
  2580. }
  2581. }
  2582. }
  2583. return HAL_OK;
  2584. }
  2585. /**
  2586. * @brief DMA CRYP Input Data process complete callback.
  2587. * @param hdma: DMA handle.
  2588. * @retval None
  2589. */
  2590. static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
  2591. {
  2592. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2593. /* Disable the DMA transfer for input request */
  2594. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
  2595. /* Call input data transfer complete callback */
  2596. HAL_CRYP_InCpltCallback(hcryp);
  2597. }
  2598. /**
  2599. * @brief DMA CRYP Output Data process complete callback.
  2600. * @param hdma: DMA handle.
  2601. * @retval None
  2602. */
  2603. static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
  2604. {
  2605. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2606. /* Disable the DMA transfer for output request */
  2607. CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
  2608. /* Clear CCF Flag */
  2609. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2610. /* Disable CRYP */
  2611. __HAL_CRYP_DISABLE(hcryp);
  2612. /* Change the CRYP state to ready */
  2613. hcryp->State = HAL_CRYP_STATE_READY;
  2614. /* Call output data transfer complete callback */
  2615. HAL_CRYP_OutCpltCallback(hcryp);
  2616. }
  2617. /**
  2618. * @brief DMA CRYP communication error callback.
  2619. * @param hdma: DMA handle.
  2620. * @retval None
  2621. */
  2622. static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
  2623. {
  2624. CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  2625. hcryp->State= HAL_CRYP_STATE_ERROR;
  2626. hcryp->ErrorCode |= HAL_CRYP_DMA_ERROR;
  2627. HAL_CRYP_ErrorCallback(hcryp);
  2628. /* Clear Error Flag */
  2629. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_ERR_CLEAR);
  2630. }
  2631. /**
  2632. * @brief Last header or payload block padding when size is not a multiple of 128 bits.
  2633. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
  2634. * the configuration information for CRYP module.
  2635. * @param difflength: size remainder after having fed all complete 128-bit blocks.
  2636. * @param polling: specifies whether or not polling on CCF must be done after having
  2637. * entered a complete block.
  2638. * @retval None
  2639. */
  2640. static void CRYP_Padding(CRYP_HandleTypeDef *hcryp, uint32_t difflength, uint32_t polling)
  2641. {
  2642. uint32_t index = 0;
  2643. uint32_t difflengthmod4 = difflength%4;
  2644. uint32_t inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
  2645. uint32_t outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
  2646. uint32_t mask[4][3] = { {0xFF000000, 0xFFFF0000, 0xFFFFFF00}, /* 32-bit data */
  2647. {0x0000FF00, 0x0000FFFF, 0xFF00FFFF}, /* 16-bit data */
  2648. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}, /* 8-bit data */
  2649. {0x000000FF, 0x0000FFFF, 0x00FFFFFF}}; /* Bit data */
  2650. uint32_t mask_index = hcryp->Init.DataType >> AES_CR_DATATYPE_Pos;
  2651. uint32_t intermediate_data[4] = {0};
  2652. #if defined(AES_CR_NPBLB)
  2653. /* In case of GCM encryption or CCM decryption, specify the number of padding
  2654. bytes in last block of payload */
  2655. if (READ_BIT(hcryp->Instance->CR,AES_CR_GCMPH) == CRYP_PAYLOAD_PHASE)
  2656. {
  2657. if (((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_GCM_GMAC)
  2658. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_ENCRYPT))
  2659. || ((READ_BIT(hcryp->Instance->CR, AES_CR_CHMOD) == CRYP_CHAINMODE_AES_CCM)
  2660. && (READ_BIT(hcryp->Instance->CR, AES_CR_MODE) == CRYP_ALGOMODE_DECRYPT)))
  2661. {
  2662. /* Set NPBLB field in writing the number of padding bytes
  2663. for the last block of payload */
  2664. MODIFY_REG(hcryp->Instance->CR, AES_CR_NPBLB, (16 - difflength) << AES_POSITION_CR_NPBLB);
  2665. }
  2666. }
  2667. #else
  2668. /* Software workaround applied to GCM encryption only */
  2669. if ((hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE) &&
  2670. (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT))
  2671. {
  2672. /* Change the mode configured in CHMOD bits of CR register to select CTR mode */
  2673. __HAL_CRYP_SET_CHAININGMODE(hcryp, CRYP_CHAINMODE_AES_CTR);
  2674. }
  2675. #endif
  2676. /* Wrap-up entering header or payload data */
  2677. /* Enter complete words when possible */
  2678. for(index=0; index < (difflength/4); index ++)
  2679. {
  2680. /* Write the Input block in the Data Input register */
  2681. hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
  2682. inputaddr+=4;
  2683. }
  2684. /* Enter incomplete word padded with zeroes if applicable
  2685. (case of header length not a multiple of 32-bits) */
  2686. if (difflengthmod4 != 0)
  2687. {
  2688. hcryp->Instance->DINR = ((*(uint32_t*)(inputaddr)) & mask[mask_index][difflengthmod4-1]);
  2689. }
  2690. /* Pad with zero-words to reach 128-bit long block and wrap-up header feeding to the IP */
  2691. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  2692. {
  2693. hcryp->Instance->DINR = 0;
  2694. }
  2695. if (polling == CRYP_POLLING_ON)
  2696. {
  2697. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  2698. {
  2699. hcryp->State = HAL_CRYP_STATE_READY;
  2700. __HAL_UNLOCK(hcryp);
  2701. HAL_CRYP_ErrorCallback(hcryp);
  2702. }
  2703. /* Clear CCF Flag */
  2704. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2705. }
  2706. /* if payload */
  2707. if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE)
  2708. {
  2709. /* Retrieve intermediate data */
  2710. for(index=0; index < 4; index ++)
  2711. {
  2712. intermediate_data[index] = hcryp->Instance->DOUTR;
  2713. }
  2714. /* Retrieve last words of cyphered data */
  2715. /* First, retrieve complete output words */
  2716. for(index=0; index < (difflength/4); index ++)
  2717. {
  2718. *(uint32_t*)(outputaddr) = intermediate_data[index];
  2719. outputaddr+=4;
  2720. }
  2721. /* Next, retrieve partial output word if applicable;
  2722. at the same time, start masking intermediate data
  2723. with a mask of zeros of same size than the padding
  2724. applied to the last block of payload */
  2725. if (difflengthmod4 != 0)
  2726. {
  2727. intermediate_data[difflength/4] &= mask[mask_index][difflengthmod4-1];
  2728. *(uint32_t*)(outputaddr) = intermediate_data[difflength/4];
  2729. }
  2730. #if !defined(AES_CR_NPBLB)
  2731. /* Software workaround applied to GCM encryption only,
  2732. applicable for AES IP v2 version (where NPBLB is not defined) */
  2733. if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT)
  2734. {
  2735. /* Change again CHMOD configuration to GCM mode */
  2736. __HAL_CRYP_SET_CHAININGMODE(hcryp, CRYP_CHAINMODE_AES_GCM_GMAC);
  2737. /* Select FINAL phase */
  2738. MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_FINAL_PHASE);
  2739. /* Before inserting the intermediate data, carry on masking operation
  2740. with a mask of zeros of same size than the padding applied to the last block of payload */
  2741. for(index=0; index < (4 - ((difflength+3)/4)); index ++)
  2742. {
  2743. intermediate_data[(difflength+3)/4+index] = 0;
  2744. }
  2745. /* Insert intermediate data */
  2746. for(index=0; index < 4; index ++)
  2747. {
  2748. hcryp->Instance->DINR = intermediate_data[index];
  2749. }
  2750. /* Wait for completion, and read data on DOUT. This data is to discard. */
  2751. if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK)
  2752. {
  2753. hcryp->State = HAL_CRYP_STATE_READY;
  2754. __HAL_UNLOCK(hcryp);
  2755. HAL_CRYP_ErrorCallback(hcryp);
  2756. }
  2757. /* Read data to discard */
  2758. /* Clear CCF Flag */
  2759. __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
  2760. for(index=0; index < 4; index ++)
  2761. {
  2762. intermediate_data[index] = hcryp->Instance->DOUTR;
  2763. }
  2764. } /* if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT) */
  2765. #endif /* !defined(AES_CR_NPBLB) */
  2766. } /* if (hcryp->Init.GCMCMACPhase == CRYP_PAYLOAD_PHASE) */
  2767. }
  2768. /**
  2769. * @}
  2770. */
  2771. /**
  2772. * @}
  2773. */
  2774. /**
  2775. * @}
  2776. */
  2777. #endif /* defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L462xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L4A6xx) */
  2778. #endif /* HAL_CRYP_MODULE_ENABLED */
  2779. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/