You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 

1378 lines
50 KiB

  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_lptim.h
  4. * @author MCD Application Team
  5. * @version V1.7.1
  6. * @date 14-April-2017
  7. * @brief Header file of LPTIM LL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_LL_LPTIM_H
  39. #define __STM32F4xx_LL_LPTIM_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx.h"
  45. /** @addtogroup STM32F4xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (LPTIM1)
  49. /** @defgroup LPTIM_LL LPTIM
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /* Private macros ------------------------------------------------------------*/
  56. #if defined(USE_FULL_LL_DRIVER)
  57. /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. #endif /*USE_FULL_LL_DRIVER*/
  64. /* Exported types ------------------------------------------------------------*/
  65. #if defined(USE_FULL_LL_DRIVER)
  66. /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
  67. * @{
  68. */
  69. /**
  70. * @brief LPTIM Init structure definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
  75. This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
  76. This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
  77. uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
  78. This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
  79. This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
  80. uint32_t Waveform; /*!< Specifies the waveform shape.
  81. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
  82. This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
  83. uint32_t Polarity; /*!< Specifies waveform polarity.
  84. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
  85. This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
  86. } LL_LPTIM_InitTypeDef;
  87. /**
  88. * @}
  89. */
  90. #endif /* USE_FULL_LL_DRIVER */
  91. /* Exported constants --------------------------------------------------------*/
  92. /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
  93. * @{
  94. */
  95. /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
  96. * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
  97. * @{
  98. */
  99. #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
  100. #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
  101. #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
  102. #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
  103. #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
  104. #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
  105. #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
  106. /**
  107. * @}
  108. */
  109. /** @defgroup LPTIM_LL_EC_IT IT Defines
  110. * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
  111. * @{
  112. */
  113. #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
  114. #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
  115. #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
  116. #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
  117. #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
  118. #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
  119. #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
  120. /**
  121. * @}
  122. */
  123. /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
  124. * @{
  125. */
  126. #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
  127. #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
  128. /**
  129. * @}
  130. */
  131. /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
  132. * @{
  133. */
  134. #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
  135. #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
  136. /**
  137. * @}
  138. */
  139. /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
  140. * @{
  141. */
  142. #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
  143. #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
  144. /**
  145. * @}
  146. */
  147. /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
  148. * @{
  149. */
  150. #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
  151. #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
  152. /**
  153. * @}
  154. */
  155. /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
  156. * @{
  157. */
  158. #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
  159. #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
  160. /**
  161. * @}
  162. */
  163. /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
  164. * @{
  165. */
  166. #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
  167. #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
  168. #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
  169. #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
  170. #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
  171. #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
  172. #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
  173. #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
  174. /**
  175. * @}
  176. */
  177. /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
  178. * @{
  179. */
  180. #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
  181. #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
  182. #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
  183. #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
  184. #define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/
  185. #define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/
  186. /**
  187. * @}
  188. */
  189. /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
  190. * @{
  191. */
  192. #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
  193. #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
  194. #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
  195. #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
  196. /**
  197. * @}
  198. */
  199. /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
  200. * @{
  201. */
  202. #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
  203. #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
  204. #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
  205. /**
  206. * @}
  207. */
  208. /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
  209. * @{
  210. */
  211. #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
  212. #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
  213. /**
  214. * @}
  215. */
  216. /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
  217. * @{
  218. */
  219. #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
  220. #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
  221. #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
  222. #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
  223. /**
  224. * @}
  225. */
  226. /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
  227. * @{
  228. */
  229. #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
  230. #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
  231. #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
  232. /**
  233. * @}
  234. */
  235. /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
  236. * @{
  237. */
  238. #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
  239. #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
  240. #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
  241. /**
  242. * @}
  243. */
  244. /**
  245. * @}
  246. */
  247. /* Exported macro ------------------------------------------------------------*/
  248. /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
  249. * @{
  250. */
  251. /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
  252. * @{
  253. */
  254. /**
  255. * @brief Write a value in LPTIM register
  256. * @param __INSTANCE__ LPTIM Instance
  257. * @param __REG__ Register to be written
  258. * @param __VALUE__ Value to be written in the register
  259. * @retval None
  260. */
  261. #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  262. /**
  263. * @brief Read a value in LPTIM register
  264. * @param __INSTANCE__ LPTIM Instance
  265. * @param __REG__ Register to be read
  266. * @retval Register value
  267. */
  268. #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  269. /**
  270. * @}
  271. */
  272. /**
  273. * @}
  274. */
  275. /* Exported functions --------------------------------------------------------*/
  276. /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
  277. * @{
  278. */
  279. /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
  280. * @{
  281. */
  282. /**
  283. * @brief Enable the LPTIM instance
  284. * @note After setting the ENABLE bit, a delay of two counter clock is needed
  285. * before the LPTIM instance is actually enabled.
  286. * @rmtoll CR ENABLE LL_LPTIM_Enable
  287. * @param LPTIMx Low-Power Timer instance
  288. * @retval None
  289. */
  290. __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
  291. {
  292. SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
  293. }
  294. /**
  295. * @brief Disable the LPTIM instance
  296. * @rmtoll CR ENABLE LL_LPTIM_Disable
  297. * @param LPTIMx Low-Power Timer instance
  298. * @retval None
  299. */
  300. __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
  301. {
  302. CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
  303. }
  304. /**
  305. * @brief Indicates whether the LPTIM instance is enabled.
  306. * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
  307. * @param LPTIMx Low-Power Timer instance
  308. * @retval State of bit (1 or 0).
  309. */
  310. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
  311. {
  312. return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
  313. }
  314. /**
  315. * @brief Starts the LPTIM counter in the desired mode.
  316. * @note LPTIM instance must be enabled before starting the counter.
  317. * @note It is possible to change on the fly from One Shot mode to
  318. * Continuous mode.
  319. * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
  320. * CR SNGSTRT LL_LPTIM_StartCounter
  321. * @param LPTIMx Low-Power Timer instance
  322. * @param OperatingMode This parameter can be one of the following values:
  323. * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
  324. * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
  325. * @retval None
  326. */
  327. __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
  328. {
  329. MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
  330. }
  331. /**
  332. * @brief Set the LPTIM registers update mode (enable/disable register preload)
  333. * @note This function must be called when the LPTIM instance is disabled.
  334. * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
  335. * @param LPTIMx Low-Power Timer instance
  336. * @param UpdateMode This parameter can be one of the following values:
  337. * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
  338. * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
  339. * @retval None
  340. */
  341. __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
  342. {
  343. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
  344. }
  345. /**
  346. * @brief Get the LPTIM registers update mode
  347. * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
  348. * @param LPTIMx Low-Power Timer instance
  349. * @retval Returned value can be one of the following values:
  350. * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
  351. * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
  352. */
  353. __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
  354. {
  355. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
  356. }
  357. /**
  358. * @brief Set the auto reload value
  359. * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
  360. * @note After a write to the LPTIMx_ARR register a new write operation to the
  361. * same register can only be performed when the previous write operation
  362. * is completed. Any successive write before the ARROK flag be set, will
  363. * lead to unpredictable results.
  364. * @note autoreload value be strictly greater than the compare value.
  365. * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
  366. * @param LPTIMx Low-Power Timer instance
  367. * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
  368. * @retval None
  369. */
  370. __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
  371. {
  372. MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
  373. }
  374. /**
  375. * @brief Get actual auto reload value
  376. * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
  377. * @param LPTIMx Low-Power Timer instance
  378. * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
  379. */
  380. __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
  381. {
  382. return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
  383. }
  384. /**
  385. * @brief Set the compare value
  386. * @note After a write to the LPTIMx_CMP register a new write operation to the
  387. * same register can only be performed when the previous write operation
  388. * is completed. Any successive write before the CMPOK flag be set, will
  389. * lead to unpredictable results.
  390. * @rmtoll CMP CMP LL_LPTIM_SetCompare
  391. * @param LPTIMx Low-Power Timer instance
  392. * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
  393. * @retval None
  394. */
  395. __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
  396. {
  397. MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
  398. }
  399. /**
  400. * @brief Get actual compare value
  401. * @rmtoll CMP CMP LL_LPTIM_GetCompare
  402. * @param LPTIMx Low-Power Timer instance
  403. * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
  404. */
  405. __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
  406. {
  407. return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
  408. }
  409. /**
  410. * @brief Get actual counter value
  411. * @note When the LPTIM instance is running with an asynchronous clock, reading
  412. * the LPTIMx_CNT register may return unreliable values. So in this case
  413. * it is necessary to perform two consecutive read accesses and verify
  414. * that the two returned values are identical.
  415. * @rmtoll CNT CNT LL_LPTIM_GetCounter
  416. * @param LPTIMx Low-Power Timer instance
  417. * @retval Counter value
  418. */
  419. __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
  420. {
  421. return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
  422. }
  423. /**
  424. * @brief Set the counter mode (selection of the LPTIM counter clock source).
  425. * @note The counter mode can be set only when the LPTIM instance is disabled.
  426. * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
  427. * @param LPTIMx Low-Power Timer instance
  428. * @param CounterMode This parameter can be one of the following values:
  429. * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
  430. * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
  431. * @retval None
  432. */
  433. __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
  434. {
  435. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
  436. }
  437. /**
  438. * @brief Get the counter mode
  439. * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
  440. * @param LPTIMx Low-Power Timer instance
  441. * @retval Returned value can be one of the following values:
  442. * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
  443. * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
  444. */
  445. __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
  446. {
  447. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
  448. }
  449. /**
  450. * @brief Configure the LPTIM instance output (LPTIMx_OUT)
  451. * @note This function must be called when the LPTIM instance is disabled.
  452. * @note Regarding the LPTIM output polarity the change takes effect
  453. * immediately, so the output default value will change immediately after
  454. * the polarity is re-configured, even before the timer is enabled.
  455. * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
  456. * CFGR WAVPOL LL_LPTIM_ConfigOutput
  457. * @param LPTIMx Low-Power Timer instance
  458. * @param Waveform This parameter can be one of the following values:
  459. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  460. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  461. * @param Polarity This parameter can be one of the following values:
  462. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  463. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  464. * @retval None
  465. */
  466. __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
  467. {
  468. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
  469. }
  470. /**
  471. * @brief Set waveform shape
  472. * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
  473. * @param LPTIMx Low-Power Timer instance
  474. * @param Waveform This parameter can be one of the following values:
  475. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  476. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
  480. {
  481. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
  482. }
  483. /**
  484. * @brief Get actual waveform shape
  485. * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
  486. * @param LPTIMx Low-Power Timer instance
  487. * @retval Returned value can be one of the following values:
  488. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  489. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  490. */
  491. __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
  492. {
  493. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
  494. }
  495. /**
  496. * @brief Set output polarity
  497. * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
  498. * @param LPTIMx Low-Power Timer instance
  499. * @param Polarity This parameter can be one of the following values:
  500. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  501. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  502. * @retval None
  503. */
  504. __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
  505. {
  506. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
  507. }
  508. /**
  509. * @brief Get actual output polarity
  510. * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
  511. * @param LPTIMx Low-Power Timer instance
  512. * @retval Returned value can be one of the following values:
  513. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  514. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  515. */
  516. __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
  517. {
  518. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
  519. }
  520. /**
  521. * @brief Set actual prescaler division ratio.
  522. * @note This function must be called when the LPTIM instance is disabled.
  523. * @note When the LPTIM is configured to be clocked by an internal clock source
  524. * and the LPTIM counter is configured to be updated by active edges
  525. * detected on the LPTIM external Input1, the internal clock provided to
  526. * the LPTIM must be not be prescaled.
  527. * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
  528. * @param LPTIMx Low-Power Timer instance
  529. * @param Prescaler This parameter can be one of the following values:
  530. * @arg @ref LL_LPTIM_PRESCALER_DIV1
  531. * @arg @ref LL_LPTIM_PRESCALER_DIV2
  532. * @arg @ref LL_LPTIM_PRESCALER_DIV4
  533. * @arg @ref LL_LPTIM_PRESCALER_DIV8
  534. * @arg @ref LL_LPTIM_PRESCALER_DIV16
  535. * @arg @ref LL_LPTIM_PRESCALER_DIV32
  536. * @arg @ref LL_LPTIM_PRESCALER_DIV64
  537. * @arg @ref LL_LPTIM_PRESCALER_DIV128
  538. * @retval None
  539. */
  540. __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
  541. {
  542. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
  543. }
  544. /**
  545. * @brief Get actual prescaler division ratio.
  546. * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
  547. * @param LPTIMx Low-Power Timer instance
  548. * @retval Returned value can be one of the following values:
  549. * @arg @ref LL_LPTIM_PRESCALER_DIV1
  550. * @arg @ref LL_LPTIM_PRESCALER_DIV2
  551. * @arg @ref LL_LPTIM_PRESCALER_DIV4
  552. * @arg @ref LL_LPTIM_PRESCALER_DIV8
  553. * @arg @ref LL_LPTIM_PRESCALER_DIV16
  554. * @arg @ref LL_LPTIM_PRESCALER_DIV32
  555. * @arg @ref LL_LPTIM_PRESCALER_DIV64
  556. * @arg @ref LL_LPTIM_PRESCALER_DIV128
  557. */
  558. __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
  559. {
  560. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
  561. }
  562. /**
  563. * @}
  564. */
  565. /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
  566. * @{
  567. */
  568. /**
  569. * @brief Enable the timeout function
  570. * @note This function must be called when the LPTIM instance is disabled.
  571. * @note The first trigger event will start the timer, any successive trigger
  572. * event will reset the counter and the timer will restart.
  573. * @note The timeout value corresponds to the compare value; if no trigger
  574. * occurs within the expected time frame, the MCU is waked-up by the
  575. * compare match event.
  576. * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
  577. * @param LPTIMx Low-Power Timer instance
  578. * @retval None
  579. */
  580. __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
  581. {
  582. SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
  583. }
  584. /**
  585. * @brief Disable the timeout function
  586. * @note This function must be called when the LPTIM instance is disabled.
  587. * @note A trigger event arriving when the timer is already started will be
  588. * ignored.
  589. * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
  590. * @param LPTIMx Low-Power Timer instance
  591. * @retval None
  592. */
  593. __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
  594. {
  595. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
  596. }
  597. /**
  598. * @brief Indicate whether the timeout function is enabled.
  599. * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
  600. * @param LPTIMx Low-Power Timer instance
  601. * @retval State of bit (1 or 0).
  602. */
  603. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
  604. {
  605. return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
  606. }
  607. /**
  608. * @brief Start the LPTIM counter
  609. * @note This function must be called when the LPTIM instance is disabled.
  610. * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
  611. * @param LPTIMx Low-Power Timer instance
  612. * @retval None
  613. */
  614. __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
  615. {
  616. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
  617. }
  618. /**
  619. * @brief Configure the external trigger used as a trigger event for the LPTIM.
  620. * @note This function must be called when the LPTIM instance is disabled.
  621. * @note An internal clock source must be present when a digital filter is
  622. * required for the trigger.
  623. * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
  624. * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
  625. * CFGR TRIGEN LL_LPTIM_ConfigTrigger
  626. * @param LPTIMx Low-Power Timer instance
  627. * @param Source This parameter can be one of the following values:
  628. * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
  629. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
  630. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
  631. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
  632. * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
  633. * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
  634. * @param Filter This parameter can be one of the following values:
  635. * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
  636. * @arg @ref LL_LPTIM_TRIG_FILTER_2
  637. * @arg @ref LL_LPTIM_TRIG_FILTER_4
  638. * @arg @ref LL_LPTIM_TRIG_FILTER_8
  639. * @param Polarity This parameter can be one of the following values:
  640. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
  641. * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
  642. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
  643. * (*) value not defined in all devices.
  644. * @retval None
  645. */
  646. __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
  647. {
  648. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
  649. }
  650. /**
  651. * @brief Get actual external trigger source.
  652. * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
  653. * @param LPTIMx Low-Power Timer instance
  654. * @retval Returned value can be one of the following values:
  655. * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
  656. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
  657. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
  658. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
  659. * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
  660. * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
  661. */
  662. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
  663. {
  664. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
  665. }
  666. /**
  667. * @brief Get actual external trigger filter.
  668. * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
  669. * @param LPTIMx Low-Power Timer instance
  670. * @retval Returned value can be one of the following values:
  671. * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
  672. * @arg @ref LL_LPTIM_TRIG_FILTER_2
  673. * @arg @ref LL_LPTIM_TRIG_FILTER_4
  674. * @arg @ref LL_LPTIM_TRIG_FILTER_8
  675. */
  676. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
  677. {
  678. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
  679. }
  680. /**
  681. * @brief Get actual external trigger polarity.
  682. * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
  683. * @param LPTIMx Low-Power Timer instance
  684. * @retval Returned value can be one of the following values:
  685. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
  686. * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
  687. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
  688. */
  689. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
  690. {
  691. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
  692. }
  693. /**
  694. * @}
  695. */
  696. /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
  697. * @{
  698. */
  699. /**
  700. * @brief Set the source of the clock used by the LPTIM instance.
  701. * @note This function must be called when the LPTIM instance is disabled.
  702. * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
  703. * @param LPTIMx Low-Power Timer instance
  704. * @param ClockSource This parameter can be one of the following values:
  705. * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
  706. * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
  707. * @retval None
  708. */
  709. __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
  710. {
  711. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
  712. }
  713. /**
  714. * @brief Get actual LPTIM instance clock source.
  715. * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
  716. * @param LPTIMx Low-Power Timer instance
  717. * @retval Returned value can be one of the following values:
  718. * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
  719. * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
  720. */
  721. __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
  722. {
  723. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
  724. }
  725. /**
  726. * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
  727. * @note This function must be called when the LPTIM instance is disabled.
  728. * @note When both external clock signal edges are considered active ones,
  729. * the LPTIM must also be clocked by an internal clock source with a
  730. * frequency equal to at least four times the external clock frequency.
  731. * @note An internal clock source must be present when a digital filter is
  732. * required for external clock.
  733. * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
  734. * CFGR CKPOL LL_LPTIM_ConfigClock
  735. * @param LPTIMx Low-Power Timer instance
  736. * @param ClockFilter This parameter can be one of the following values:
  737. * @arg @ref LL_LPTIM_CLK_FILTER_NONE
  738. * @arg @ref LL_LPTIM_CLK_FILTER_2
  739. * @arg @ref LL_LPTIM_CLK_FILTER_4
  740. * @arg @ref LL_LPTIM_CLK_FILTER_8
  741. * @param ClockPolarity This parameter can be one of the following values:
  742. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
  743. * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
  744. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
  745. * @retval None
  746. */
  747. __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
  748. {
  749. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
  750. }
  751. /**
  752. * @brief Get actual clock polarity
  753. * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
  754. * @param LPTIMx Low-Power Timer instance
  755. * @retval Returned value can be one of the following values:
  756. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
  757. * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
  758. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
  759. */
  760. __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
  761. {
  762. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
  763. }
  764. /**
  765. * @brief Get actual clock digital filter
  766. * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
  767. * @param LPTIMx Low-Power Timer instance
  768. * @retval Returned value can be one of the following values:
  769. * @arg @ref LL_LPTIM_CLK_FILTER_NONE
  770. * @arg @ref LL_LPTIM_CLK_FILTER_2
  771. * @arg @ref LL_LPTIM_CLK_FILTER_4
  772. * @arg @ref LL_LPTIM_CLK_FILTER_8
  773. */
  774. __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
  775. {
  776. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
  777. }
  778. /**
  779. * @}
  780. */
  781. /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
  782. * @{
  783. */
  784. /**
  785. * @brief Configure the encoder mode.
  786. * @note This function must be called when the LPTIM instance is disabled.
  787. * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
  788. * @param LPTIMx Low-Power Timer instance
  789. * @param EncoderMode This parameter can be one of the following values:
  790. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
  791. * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
  792. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
  793. * @retval None
  794. */
  795. __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
  796. {
  797. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
  798. }
  799. /**
  800. * @brief Get actual encoder mode.
  801. * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
  802. * @param LPTIMx Low-Power Timer instance
  803. * @retval Returned value can be one of the following values:
  804. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
  805. * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
  806. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
  807. */
  808. __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
  809. {
  810. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
  811. }
  812. /**
  813. * @brief Enable the encoder mode
  814. * @note This function must be called when the LPTIM instance is disabled.
  815. * @note In this mode the LPTIM instance must be clocked by an internal clock
  816. * source. Also, the prescaler division ratio must be equal to 1.
  817. * @note LPTIM instance must be configured in continuous mode prior enabling
  818. * the encoder mode.
  819. * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
  820. * @param LPTIMx Low-Power Timer instance
  821. * @retval None
  822. */
  823. __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
  824. {
  825. SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
  826. }
  827. /**
  828. * @brief Disable the encoder mode
  829. * @note This function must be called when the LPTIM instance is disabled.
  830. * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
  831. * @param LPTIMx Low-Power Timer instance
  832. * @retval None
  833. */
  834. __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
  835. {
  836. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
  837. }
  838. /**
  839. * @brief Indicates whether the LPTIM operates in encoder mode.
  840. * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
  841. * @param LPTIMx Low-Power Timer instance
  842. * @retval State of bit (1 or 0).
  843. */
  844. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
  845. {
  846. return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
  847. }
  848. /**
  849. * @}
  850. */
  851. /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
  852. * @{
  853. */
  854. /**
  855. * @brief Clear the compare match flag (CMPMCF)
  856. * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
  857. * @param LPTIMx Low-Power Timer instance
  858. * @retval None
  859. */
  860. __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
  861. {
  862. SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
  863. }
  864. /**
  865. * @brief Inform application whether a compare match interrupt has occurred.
  866. * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
  867. * @param LPTIMx Low-Power Timer instance
  868. * @retval State of bit (1 or 0).
  869. */
  870. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
  871. {
  872. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
  873. }
  874. /**
  875. * @brief Clear the autoreload match flag (ARRMCF)
  876. * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
  877. * @param LPTIMx Low-Power Timer instance
  878. * @retval None
  879. */
  880. __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
  881. {
  882. SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
  883. }
  884. /**
  885. * @brief Inform application whether a autoreload match interrupt has occured.
  886. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
  887. * @param LPTIMx Low-Power Timer instance
  888. * @retval State of bit (1 or 0).
  889. */
  890. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
  891. {
  892. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
  893. }
  894. /**
  895. * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
  896. * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
  897. * @param LPTIMx Low-Power Timer instance
  898. * @retval None
  899. */
  900. __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  901. {
  902. SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
  903. }
  904. /**
  905. * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
  906. * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
  907. * @param LPTIMx Low-Power Timer instance
  908. * @retval State of bit (1 or 0).
  909. */
  910. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  911. {
  912. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
  913. }
  914. /**
  915. * @brief Clear the compare register update interrupt flag (CMPOKCF).
  916. * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
  917. * @param LPTIMx Low-Power Timer instance
  918. * @retval None
  919. */
  920. __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
  921. {
  922. SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
  923. }
  924. /**
  925. * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
  926. * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
  927. * @param LPTIMx Low-Power Timer instance
  928. * @retval State of bit (1 or 0).
  929. */
  930. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
  931. {
  932. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
  933. }
  934. /**
  935. * @brief Clear the autoreload register update interrupt flag (ARROKCF).
  936. * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
  937. * @param LPTIMx Low-Power Timer instance
  938. * @retval None
  939. */
  940. __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
  941. {
  942. SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
  943. }
  944. /**
  945. * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
  946. * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
  947. * @param LPTIMx Low-Power Timer instance
  948. * @retval State of bit (1 or 0).
  949. */
  950. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
  951. {
  952. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
  953. }
  954. /**
  955. * @brief Clear the counter direction change to up interrupt flag (UPCF).
  956. * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
  957. * @param LPTIMx Low-Power Timer instance
  958. * @retval None
  959. */
  960. __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
  961. {
  962. SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
  963. }
  964. /**
  965. * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
  966. * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
  967. * @param LPTIMx Low-Power Timer instance
  968. * @retval State of bit (1 or 0).
  969. */
  970. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
  971. {
  972. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
  973. }
  974. /**
  975. * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
  976. * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
  977. * @param LPTIMx Low-Power Timer instance
  978. * @retval None
  979. */
  980. __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
  981. {
  982. SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
  983. }
  984. /**
  985. * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
  986. * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
  987. * @param LPTIMx Low-Power Timer instance
  988. * @retval State of bit (1 or 0).
  989. */
  990. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
  991. {
  992. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
  993. }
  994. /**
  995. * @}
  996. */
  997. /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
  998. * @{
  999. */
  1000. /**
  1001. * @brief Enable compare match interrupt (CMPMIE).
  1002. * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
  1003. * @param LPTIMx Low-Power Timer instance
  1004. * @retval None
  1005. */
  1006. __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1007. {
  1008. SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
  1009. }
  1010. /**
  1011. * @brief Disable compare match interrupt (CMPMIE).
  1012. * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
  1013. * @param LPTIMx Low-Power Timer instance
  1014. * @retval None
  1015. */
  1016. __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1017. {
  1018. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
  1019. }
  1020. /**
  1021. * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
  1022. * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
  1023. * @param LPTIMx Low-Power Timer instance
  1024. * @retval State of bit (1 or 0).
  1025. */
  1026. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1027. {
  1028. return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
  1029. }
  1030. /**
  1031. * @brief Enable autoreload match interrupt (ARRMIE).
  1032. * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
  1033. * @param LPTIMx Low-Power Timer instance
  1034. * @retval None
  1035. */
  1036. __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1037. {
  1038. SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
  1039. }
  1040. /**
  1041. * @brief Disable autoreload match interrupt (ARRMIE).
  1042. * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
  1043. * @param LPTIMx Low-Power Timer instance
  1044. * @retval None
  1045. */
  1046. __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1047. {
  1048. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
  1049. }
  1050. /**
  1051. * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
  1052. * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
  1053. * @param LPTIMx Low-Power Timer instance
  1054. * @retval State of bit (1 or 0).
  1055. */
  1056. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1057. {
  1058. return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
  1059. }
  1060. /**
  1061. * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
  1062. * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
  1063. * @param LPTIMx Low-Power Timer instance
  1064. * @retval None
  1065. */
  1066. __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1067. {
  1068. SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
  1069. }
  1070. /**
  1071. * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
  1072. * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
  1073. * @param LPTIMx Low-Power Timer instance
  1074. * @retval None
  1075. */
  1076. __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1077. {
  1078. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
  1079. }
  1080. /**
  1081. * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
  1082. * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
  1083. * @param LPTIMx Low-Power Timer instance
  1084. * @retval State of bit (1 or 0).
  1085. */
  1086. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1087. {
  1088. return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
  1089. }
  1090. /**
  1091. * @brief Enable compare register write completed interrupt (CMPOKIE).
  1092. * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
  1093. * @param LPTIMx Low-Power Timer instance
  1094. * @retval None
  1095. */
  1096. __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1097. {
  1098. SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
  1099. }
  1100. /**
  1101. * @brief Disable compare register write completed interrupt (CMPOKIE).
  1102. * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
  1103. * @param LPTIMx Low-Power Timer instance
  1104. * @retval None
  1105. */
  1106. __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1107. {
  1108. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
  1109. }
  1110. /**
  1111. * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
  1112. * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
  1113. * @param LPTIMx Low-Power Timer instance
  1114. * @retval State of bit (1 or 0).
  1115. */
  1116. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1117. {
  1118. return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
  1119. }
  1120. /**
  1121. * @brief Enable autoreload register write completed interrupt (ARROKIE).
  1122. * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
  1123. * @param LPTIMx Low-Power Timer instance
  1124. * @retval None
  1125. */
  1126. __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1127. {
  1128. SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
  1129. }
  1130. /**
  1131. * @brief Disable autoreload register write completed interrupt (ARROKIE).
  1132. * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
  1133. * @param LPTIMx Low-Power Timer instance
  1134. * @retval None
  1135. */
  1136. __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1137. {
  1138. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
  1139. }
  1140. /**
  1141. * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
  1142. * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
  1143. * @param LPTIMx Low-Power Timer instance
  1144. * @retval State of bit (1 or 0).
  1145. */
  1146. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1147. {
  1148. return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
  1149. }
  1150. /**
  1151. * @brief Enable direction change to up interrupt (UPIE).
  1152. * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
  1153. * @param LPTIMx Low-Power Timer instance
  1154. * @retval None
  1155. */
  1156. __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
  1157. {
  1158. SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
  1159. }
  1160. /**
  1161. * @brief Disable direction change to up interrupt (UPIE).
  1162. * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
  1163. * @param LPTIMx Low-Power Timer instance
  1164. * @retval None
  1165. */
  1166. __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
  1167. {
  1168. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
  1169. }
  1170. /**
  1171. * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
  1172. * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
  1173. * @param LPTIMx Low-Power Timer instance
  1174. * @retval State of bit (1 or 0).
  1175. */
  1176. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
  1177. {
  1178. return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
  1179. }
  1180. /**
  1181. * @brief Enable direction change to down interrupt (DOWNIE).
  1182. * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
  1183. * @param LPTIMx Low-Power Timer instance
  1184. * @retval None
  1185. */
  1186. __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1187. {
  1188. SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
  1189. }
  1190. /**
  1191. * @brief Disable direction change to down interrupt (DOWNIE).
  1192. * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
  1193. * @param LPTIMx Low-Power Timer instance
  1194. * @retval None
  1195. */
  1196. __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1197. {
  1198. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
  1199. }
  1200. /**
  1201. * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
  1202. * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
  1203. * @param LPTIMx Low-Power Timer instance
  1204. * @retval State of bit (1 or 0).
  1205. */
  1206. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1207. {
  1208. return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
  1209. }
  1210. /**
  1211. * @}
  1212. */
  1213. #if defined(USE_FULL_LL_DRIVER)
  1214. /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
  1215. * @{
  1216. */
  1217. ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
  1218. void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
  1219. ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
  1220. /**
  1221. * @}
  1222. */
  1223. #endif /* USE_FULL_LL_DRIVER */
  1224. /**
  1225. * @}
  1226. */
  1227. /**
  1228. * @}
  1229. */
  1230. #endif /* LPTIM1 */
  1231. /**
  1232. * @}
  1233. */
  1234. #ifdef __cplusplus
  1235. }
  1236. #endif
  1237. #endif /* __STM32F4xx_LL_LPTIM_H */
  1238. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/