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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_hash.h
  4. * @author MCD Application Team
  5. * @version V1.1.0
  6. * @date 19-June-2014
  7. * @brief Header file of HASH HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_HASH_H
  39. #define __STM32F4xx_HAL_HASH_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
  44. /* Includes ------------------------------------------------------------------*/
  45. #include "stm32f4xx_hal_def.h"
  46. /** @addtogroup STM32F4xx_HAL_Driver
  47. * @{
  48. */
  49. /** @addtogroup HASH
  50. * @{
  51. */
  52. /* Exported types ------------------------------------------------------------*/
  53. /**
  54. * @brief HASH Configuration Structure definition
  55. */
  56. typedef struct
  57. {
  58. uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
  59. This parameter can be a value of @ref HASH_Data_Type */
  60. uint32_t KeySize; /*!< The key size is used only in HMAC operation */
  61. uint8_t* pKey; /*!< The key is used only in HMAC operation */
  62. }HASH_InitTypeDef;
  63. /**
  64. * @brief HAL State structures definition
  65. */
  66. typedef enum
  67. {
  68. HAL_HASH_STATE_RESET = 0x00, /*!< HASH not yet initialized or disabled */
  69. HAL_HASH_STATE_READY = 0x01, /*!< HASH initialized and ready for use */
  70. HAL_HASH_STATE_BUSY = 0x02, /*!< HASH internal process is ongoing */
  71. HAL_HASH_STATE_TIMEOUT = 0x03, /*!< HASH timeout state */
  72. HAL_HASH_STATE_ERROR = 0x04 /*!< HASH error state */
  73. }HAL_HASH_STATETypeDef;
  74. /**
  75. * @brief HAL phase structures definition
  76. */
  77. typedef enum
  78. {
  79. HAL_HASH_PHASE_READY = 0x01, /*!< HASH peripheral is ready for initialization */
  80. HAL_HASH_PHASE_PROCESS = 0x02, /*!< HASH peripheral is in processing phase */
  81. }HAL_HASHPhaseTypeDef;
  82. /**
  83. * @brief HASH Handle Structure definition
  84. */
  85. typedef struct
  86. {
  87. HASH_InitTypeDef Init; /*!< HASH required parameters */
  88. uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */
  89. uint8_t *pHashOutBuffPtr; /*!< Pointer to input buffer */
  90. __IO uint32_t HashBuffSize; /*!< Size of buffer to be processed */
  91. __IO uint32_t HashInCount; /*!< Counter of inputed data */
  92. __IO uint32_t HashITCounter; /*!< Counter of issued interrupts */
  93. HAL_StatusTypeDef Status; /*!< HASH peripheral status */
  94. HAL_HASHPhaseTypeDef Phase; /*!< HASH peripheral phase */
  95. DMA_HandleTypeDef *hdmain; /*!< HASH In DMA handle parameters */
  96. HAL_LockTypeDef Lock; /*!< HASH locking object */
  97. __IO HAL_HASH_STATETypeDef State; /*!< HASH peripheral state */
  98. } HASH_HandleTypeDef;
  99. /* Exported constants --------------------------------------------------------*/
  100. /** @defgroup HASH_Exported_Constants
  101. * @{
  102. */
  103. /** @defgroup HASH_Algo_Selection
  104. * @{
  105. */
  106. #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
  107. #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
  108. #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
  109. #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
  110. #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
  111. ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
  112. ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
  113. ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
  114. /**
  115. * @}
  116. */
  117. /** @defgroup HASH_Algorithm_Mode
  118. * @{
  119. */
  120. #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
  121. #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
  122. #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
  123. ((ALGOMODE) == HASH_AlgoMode_HMAC))
  124. /**
  125. * @}
  126. */
  127. /** @defgroup HASH_Data_Type
  128. * @{
  129. */
  130. #define HASH_DATATYPE_32B ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
  131. #define HASH_DATATYPE_16B HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
  132. #define HASH_DATATYPE_8B HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
  133. #define HASH_DATATYPE_1B HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
  134. #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DATATYPE_32B)|| \
  135. ((DATATYPE) == HASH_DATATYPE_16B)|| \
  136. ((DATATYPE) == HASH_DATATYPE_8B) || \
  137. ((DATATYPE) == HASH_DATATYPE_1B))
  138. /**
  139. * @}
  140. */
  141. /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode
  142. * @{
  143. */
  144. #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
  145. #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
  146. #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
  147. ((KEYTYPE) == HASH_HMACKeyType_LongKey))
  148. /**
  149. * @}
  150. */
  151. /** @defgroup HASH_flags_definition
  152. * @{
  153. */
  154. #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
  155. #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
  156. #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
  157. #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
  158. #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
  159. /**
  160. * @}
  161. */
  162. /** @defgroup HASH_interrupts_definition
  163. * @{
  164. */
  165. #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */
  166. #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */
  167. /**
  168. * @}
  169. */
  170. /**
  171. * @}
  172. */
  173. /* Exported macro ------------------------------------------------------------*/
  174. /** @brief Reset HASH handle state
  175. * @param __HANDLE__: specifies the HASH handle.
  176. * @retval None
  177. */
  178. #define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
  179. /** @brief Check whether the specified HASH flag is set or not.
  180. * @param __FLAG__: specifies the flag to check.
  181. * This parameter can be one of the following values:
  182. * @arg HASH_FLAG_DINIS: A new block can be entered into the input buffer.
  183. * @arg HASH_FLAG_DCIS: Digest calculation complete
  184. * @arg HASH_FLAG_DMAS: DMA interface is enabled (DMAE=1) or a transfer is ongoing
  185. * @arg HASH_FLAG_BUSY: The hash core is Busy : processing a block of data
  186. * @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data
  187. * @retval The new state of __FLAG__ (TRUE or FALSE).
  188. */
  189. #define __HAL_HASH_GET_FLAG(__FLAG__) ((HASH->SR & (__FLAG__)) == (__FLAG__))
  190. /**
  191. * @brief Macros for HMAC finish.
  192. * @param None
  193. * @retval None
  194. */
  195. #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
  196. #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
  197. #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
  198. #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
  199. /**
  200. * @brief Enable the multiple DMA mode.
  201. * This feature is available only in STM32F429x and STM32F439x devices.
  202. * @param None
  203. * @retval None
  204. */
  205. #define __HAL_HASH_SET_MDMAT() HASH->CR |= HASH_CR_MDMAT
  206. /**
  207. * @brief Disable the multiple DMA mode.
  208. * @param None
  209. * @retval None
  210. */
  211. #define __HAL_HASH_RESET_MDMAT() HASH->CR &= (uint32_t)(~HASH_CR_MDMAT)
  212. /**
  213. * @brief Start the digest computation
  214. * @param None
  215. * @retval None
  216. */
  217. #define __HAL_HASH_START_DIGEST() HASH->STR |= HASH_STR_DCAL
  218. /**
  219. * @brief Set the number of valid bits in last word written in Data register
  220. * @param SIZE: size in byte of last data written in Data register.
  221. * @retval None
  222. */
  223. #define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\
  224. HASH->STR |= 8 * ((SIZE) % 4);\
  225. }while(0)
  226. /* Include HASH HAL Extension module */
  227. #include "stm32f4xx_hal_hash_ex.h"
  228. /* Exported functions --------------------------------------------------------*/
  229. /* Initialization and de-initialization functions **********************************/
  230. HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash);
  231. HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash);
  232. /* HASH processing using polling *********************************************/
  233. HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
  234. HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
  235. HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  236. HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  237. /* HASH-MAC processing using polling *****************************************/
  238. HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
  239. HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
  240. /* HASH processing using interrupt *******************************************/
  241. HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
  242. HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
  243. /* HASH processing using DMA *************************************************/
  244. HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  245. HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
  246. HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  247. HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
  248. /* HASH-HMAC processing using DMA ********************************************/
  249. HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  250. HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
  251. /* Processing functions ******************************************************/
  252. void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash);
  253. /* Peripheral State functions ************************************************/
  254. HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash);
  255. void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash);
  256. void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash);
  257. void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash);
  258. void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash);
  259. void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
  260. #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
  261. /**
  262. * @}
  263. */
  264. /**
  265. * @}
  266. */
  267. #ifdef __cplusplus
  268. }
  269. #endif
  270. #endif /* __STM32F4xx_HAL_HASH_H */
  271. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/