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  1. ;/******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f410rx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V2.6.1
  5. ;* Date : 14-February-2017
  6. ;* Description : STM32F410Rx devices vector table for EWARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == _iar_program_start,
  10. ;* - Set the vector table entries with the exceptions ISR
  11. ;* address.
  12. ;* - Configure the system clock
  13. ;* - Branches to main in the C library (which eventually
  14. ;* calls main()).
  15. ;* After Reset the Cortex-M4 processor is in Thread mode,
  16. ;* priority is Privileged, and the Stack is set to Main.
  17. ;********************************************************************************
  18. ;*
  19. ;* Redistribution and use in source and binary forms, with or without modification,
  20. ;* are permitted provided that the following conditions are met:
  21. ;* 1. Redistributions of source code must retain the above copyright notice,
  22. ;* this list of conditions and the following disclaimer.
  23. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  24. ;* this list of conditions and the following disclaimer in the documentation
  25. ;* and/or other materials provided with the distribution.
  26. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  27. ;* may be used to endorse or promote products derived from this software
  28. ;* without specific prior written permission.
  29. ;*
  30. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  34. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  35. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  36. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  37. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  38. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. ;*
  41. ;*******************************************************************************
  42. ;
  43. ;
  44. ; The modules in this file are included in the libraries, and may be replaced
  45. ; by any user-defined modules that define the PUBLIC symbol _program_start or
  46. ; a user defined start symbol.
  47. ; To override the cstartup defined in the library, simply add your modified
  48. ; version to the workbench project.
  49. ;
  50. ; The vector table is normally located at address 0.
  51. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  52. ; The name "__vector_table" has special meaning for C-SPY:
  53. ; it is where the SP start value is found, and the NVIC vector
  54. ; table register (VTOR) is initialized to this address if != 0.
  55. ;
  56. ; Cortex-M version
  57. ;
  58. MODULE ?cstartup
  59. ;; Forward declaration of sections.
  60. SECTION CSTACK:DATA:NOROOT(3)
  61. SECTION .intvec:CODE:NOROOT(2)
  62. EXTERN __iar_program_start
  63. EXTERN SystemInit
  64. PUBLIC __vector_table
  65. DATA
  66. __vector_table
  67. DCD sfe(CSTACK)
  68. DCD Reset_Handler ; Reset Handler
  69. DCD NMI_Handler ; NMI Handler
  70. DCD HardFault_Handler ; Hard Fault Handler
  71. DCD MemManage_Handler ; MPU Fault Handler
  72. DCD BusFault_Handler ; Bus Fault Handler
  73. DCD UsageFault_Handler ; Usage Fault Handler
  74. DCD 0 ; Reserved
  75. DCD 0 ; Reserved
  76. DCD 0 ; Reserved
  77. DCD 0 ; Reserved
  78. DCD SVC_Handler ; SVCall Handler
  79. DCD DebugMon_Handler ; Debug Monitor Handler
  80. DCD 0 ; Reserved
  81. DCD PendSV_Handler ; PendSV Handler
  82. DCD SysTick_Handler ; SysTick Handler
  83. ; External Interrupts
  84. DCD WWDG_IRQHandler ; Window WatchDog
  85. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  86. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  87. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  88. DCD FLASH_IRQHandler ; FLASH
  89. DCD RCC_IRQHandler ; RCC
  90. DCD EXTI0_IRQHandler ; EXTI Line0
  91. DCD EXTI1_IRQHandler ; EXTI Line1
  92. DCD EXTI2_IRQHandler ; EXTI Line2
  93. DCD EXTI3_IRQHandler ; EXTI Line3
  94. DCD EXTI4_IRQHandler ; EXTI Line4
  95. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  96. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  97. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  98. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  99. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  100. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  101. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  102. DCD ADC_IRQHandler ; ADC1
  103. DCD 0 ; Reserved
  104. DCD 0 ; Reserved
  105. DCD 0 ; Reserved
  106. DCD 0 ; Reserved
  107. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  108. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  109. DCD TIM1_UP_IRQHandler ; TIM1 Update
  110. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  111. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  112. DCD 0 ; Reserved
  113. DCD 0 ; Reserved
  114. DCD 0 ; Reserved
  115. DCD I2C1_EV_IRQHandler ; I2C1 Event
  116. DCD I2C1_ER_IRQHandler ; I2C1 Error
  117. DCD I2C2_EV_IRQHandler ; I2C2 Event
  118. DCD I2C2_ER_IRQHandler ; I2C2 Error
  119. DCD SPI1_IRQHandler ; SPI1
  120. DCD SPI2_IRQHandler ; SPI2
  121. DCD USART1_IRQHandler ; USART1
  122. DCD USART2_IRQHandler ; USART2
  123. DCD 0 ; Reserved
  124. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  125. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  126. DCD 0 ; Reserved
  127. DCD 0 ; Reserved
  128. DCD 0 ; Reserved
  129. DCD 0 ; Reserved
  130. DCD 0 ; Reserved
  131. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  132. DCD 0 ; Reserved
  133. DCD 0 ; Reserved
  134. DCD TIM5_IRQHandler ; TIM5
  135. DCD 0 ; Reserved
  136. DCD 0 ; Reserved
  137. DCD 0 ; Reserved
  138. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
  139. DCD 0 ; Reserved
  140. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  141. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  142. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  143. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  144. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  145. DCD 0 ; Reserved
  146. DCD 0 ; Reserved
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD 0 ; Reserved
  150. DCD 0 ; Reserved
  151. DCD 0 ; Reserved
  152. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  153. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  154. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  155. DCD USART6_IRQHandler ; USART6
  156. DCD 0 ; Reserved
  157. DCD 0 ; Reserved
  158. DCD 0 ; Reserved
  159. DCD 0 ; Reserved
  160. DCD 0 ; Reserved
  161. DCD 0 ; Reserved
  162. DCD 0 ; Reserved
  163. DCD 0 ; Reserved
  164. DCD RNG_IRQHandler ; RNG
  165. DCD FPU_IRQHandler ; FPU
  166. DCD 0 ; Reserved
  167. DCD 0 ; Reserved
  168. DCD 0 ; Reserved
  169. DCD SPI5_IRQHandler ; SPI5
  170. DCD 0 ; Reserved
  171. DCD 0 ; Reserved
  172. DCD 0 ; Reserved
  173. DCD 0 ; Reserved
  174. DCD 0 ; Reserved
  175. DCD 0 ; Reserved
  176. DCD 0 ; Reserved
  177. DCD 0 ; Reserved
  178. DCD 0 ; Reserved
  179. DCD FMPI2C1_EV_IRQHandler ; FMPI2C1 Event
  180. DCD FMPI2C1_ER_IRQHandler ; FMPI2C1 Error
  181. DCD LPTIM1_IRQHandler ; LP TIM1
  182. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  183. ;;
  184. ;; Default interrupt handlers.
  185. ;;
  186. THUMB
  187. PUBWEAK Reset_Handler
  188. SECTION .text:CODE:REORDER:NOROOT(2)
  189. Reset_Handler
  190. LDR R0, =SystemInit
  191. BLX R0
  192. LDR R0, =__iar_program_start
  193. BX R0
  194. PUBWEAK NMI_Handler
  195. SECTION .text:CODE:REORDER:NOROOT(1)
  196. NMI_Handler
  197. B NMI_Handler
  198. PUBWEAK HardFault_Handler
  199. SECTION .text:CODE:REORDER:NOROOT(1)
  200. HardFault_Handler
  201. B HardFault_Handler
  202. PUBWEAK MemManage_Handler
  203. SECTION .text:CODE:REORDER:NOROOT(1)
  204. MemManage_Handler
  205. B MemManage_Handler
  206. PUBWEAK BusFault_Handler
  207. SECTION .text:CODE:REORDER:NOROOT(1)
  208. BusFault_Handler
  209. B BusFault_Handler
  210. PUBWEAK UsageFault_Handler
  211. SECTION .text:CODE:REORDER:NOROOT(1)
  212. UsageFault_Handler
  213. B UsageFault_Handler
  214. PUBWEAK SVC_Handler
  215. SECTION .text:CODE:REORDER:NOROOT(1)
  216. SVC_Handler
  217. B SVC_Handler
  218. PUBWEAK DebugMon_Handler
  219. SECTION .text:CODE:REORDER:NOROOT(1)
  220. DebugMon_Handler
  221. B DebugMon_Handler
  222. PUBWEAK PendSV_Handler
  223. SECTION .text:CODE:REORDER:NOROOT(1)
  224. PendSV_Handler
  225. B PendSV_Handler
  226. PUBWEAK SysTick_Handler
  227. SECTION .text:CODE:REORDER:NOROOT(1)
  228. SysTick_Handler
  229. B SysTick_Handler
  230. PUBWEAK WWDG_IRQHandler
  231. SECTION .text:CODE:REORDER:NOROOT(1)
  232. WWDG_IRQHandler
  233. B WWDG_IRQHandler
  234. PUBWEAK PVD_IRQHandler
  235. SECTION .text:CODE:REORDER:NOROOT(1)
  236. PVD_IRQHandler
  237. B PVD_IRQHandler
  238. PUBWEAK TAMP_STAMP_IRQHandler
  239. SECTION .text:CODE:REORDER:NOROOT(1)
  240. TAMP_STAMP_IRQHandler
  241. B TAMP_STAMP_IRQHandler
  242. PUBWEAK RTC_WKUP_IRQHandler
  243. SECTION .text:CODE:REORDER:NOROOT(1)
  244. RTC_WKUP_IRQHandler
  245. B RTC_WKUP_IRQHandler
  246. PUBWEAK FLASH_IRQHandler
  247. SECTION .text:CODE:REORDER:NOROOT(1)
  248. FLASH_IRQHandler
  249. B FLASH_IRQHandler
  250. PUBWEAK RCC_IRQHandler
  251. SECTION .text:CODE:REORDER:NOROOT(1)
  252. RCC_IRQHandler
  253. B RCC_IRQHandler
  254. PUBWEAK EXTI0_IRQHandler
  255. SECTION .text:CODE:REORDER:NOROOT(1)
  256. EXTI0_IRQHandler
  257. B EXTI0_IRQHandler
  258. PUBWEAK EXTI1_IRQHandler
  259. SECTION .text:CODE:REORDER:NOROOT(1)
  260. EXTI1_IRQHandler
  261. B EXTI1_IRQHandler
  262. PUBWEAK EXTI2_IRQHandler
  263. SECTION .text:CODE:REORDER:NOROOT(1)
  264. EXTI2_IRQHandler
  265. B EXTI2_IRQHandler
  266. PUBWEAK EXTI3_IRQHandler
  267. SECTION .text:CODE:REORDER:NOROOT(1)
  268. EXTI3_IRQHandler
  269. B EXTI3_IRQHandler
  270. PUBWEAK EXTI4_IRQHandler
  271. SECTION .text:CODE:REORDER:NOROOT(1)
  272. EXTI4_IRQHandler
  273. B EXTI4_IRQHandler
  274. PUBWEAK DMA1_Stream0_IRQHandler
  275. SECTION .text:CODE:REORDER:NOROOT(1)
  276. DMA1_Stream0_IRQHandler
  277. B DMA1_Stream0_IRQHandler
  278. PUBWEAK DMA1_Stream1_IRQHandler
  279. SECTION .text:CODE:REORDER:NOROOT(1)
  280. DMA1_Stream1_IRQHandler
  281. B DMA1_Stream1_IRQHandler
  282. PUBWEAK DMA1_Stream2_IRQHandler
  283. SECTION .text:CODE:REORDER:NOROOT(1)
  284. DMA1_Stream2_IRQHandler
  285. B DMA1_Stream2_IRQHandler
  286. PUBWEAK DMA1_Stream3_IRQHandler
  287. SECTION .text:CODE:REORDER:NOROOT(1)
  288. DMA1_Stream3_IRQHandler
  289. B DMA1_Stream3_IRQHandler
  290. PUBWEAK DMA1_Stream4_IRQHandler
  291. SECTION .text:CODE:REORDER:NOROOT(1)
  292. DMA1_Stream4_IRQHandler
  293. B DMA1_Stream4_IRQHandler
  294. PUBWEAK DMA1_Stream5_IRQHandler
  295. SECTION .text:CODE:REORDER:NOROOT(1)
  296. DMA1_Stream5_IRQHandler
  297. B DMA1_Stream5_IRQHandler
  298. PUBWEAK DMA1_Stream6_IRQHandler
  299. SECTION .text:CODE:REORDER:NOROOT(1)
  300. DMA1_Stream6_IRQHandler
  301. B DMA1_Stream6_IRQHandler
  302. PUBWEAK ADC_IRQHandler
  303. SECTION .text:CODE:REORDER:NOROOT(1)
  304. ADC_IRQHandler
  305. B ADC_IRQHandler
  306. PUBWEAK EXTI9_5_IRQHandler
  307. SECTION .text:CODE:REORDER:NOROOT(1)
  308. EXTI9_5_IRQHandler
  309. B EXTI9_5_IRQHandler
  310. PUBWEAK TIM1_BRK_TIM9_IRQHandler
  311. SECTION .text:CODE:REORDER:NOROOT(1)
  312. TIM1_BRK_TIM9_IRQHandler
  313. B TIM1_BRK_TIM9_IRQHandler
  314. PUBWEAK TIM1_UP_IRQHandler
  315. SECTION .text:CODE:REORDER:NOROOT(1)
  316. TIM1_UP_IRQHandler
  317. B TIM1_UP_IRQHandler
  318. PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
  319. SECTION .text:CODE:REORDER:NOROOT(1)
  320. TIM1_TRG_COM_TIM11_IRQHandler
  321. B TIM1_TRG_COM_TIM11_IRQHandler
  322. PUBWEAK TIM1_CC_IRQHandler
  323. SECTION .text:CODE:REORDER:NOROOT(1)
  324. TIM1_CC_IRQHandler
  325. B TIM1_CC_IRQHandler
  326. PUBWEAK I2C1_EV_IRQHandler
  327. SECTION .text:CODE:REORDER:NOROOT(1)
  328. I2C1_EV_IRQHandler
  329. B I2C1_EV_IRQHandler
  330. PUBWEAK I2C1_ER_IRQHandler
  331. SECTION .text:CODE:REORDER:NOROOT(1)
  332. I2C1_ER_IRQHandler
  333. B I2C1_ER_IRQHandler
  334. PUBWEAK I2C2_EV_IRQHandler
  335. SECTION .text:CODE:REORDER:NOROOT(1)
  336. I2C2_EV_IRQHandler
  337. B I2C2_EV_IRQHandler
  338. PUBWEAK I2C2_ER_IRQHandler
  339. SECTION .text:CODE:REORDER:NOROOT(1)
  340. I2C2_ER_IRQHandler
  341. B I2C2_ER_IRQHandler
  342. PUBWEAK SPI1_IRQHandler
  343. SECTION .text:CODE:REORDER:NOROOT(1)
  344. SPI1_IRQHandler
  345. B SPI1_IRQHandler
  346. PUBWEAK SPI2_IRQHandler
  347. SECTION .text:CODE:REORDER:NOROOT(1)
  348. SPI2_IRQHandler
  349. B SPI2_IRQHandler
  350. PUBWEAK USART1_IRQHandler
  351. SECTION .text:CODE:REORDER:NOROOT(1)
  352. USART1_IRQHandler
  353. B USART1_IRQHandler
  354. PUBWEAK USART2_IRQHandler
  355. SECTION .text:CODE:REORDER:NOROOT(1)
  356. USART2_IRQHandler
  357. B USART2_IRQHandler
  358. PUBWEAK EXTI15_10_IRQHandler
  359. SECTION .text:CODE:REORDER:NOROOT(1)
  360. EXTI15_10_IRQHandler
  361. B EXTI15_10_IRQHandler
  362. PUBWEAK RTC_Alarm_IRQHandler
  363. SECTION .text:CODE:REORDER:NOROOT(1)
  364. RTC_Alarm_IRQHandler
  365. B RTC_Alarm_IRQHandler
  366. PUBWEAK DMA1_Stream7_IRQHandler
  367. SECTION .text:CODE:REORDER:NOROOT(1)
  368. DMA1_Stream7_IRQHandler
  369. B DMA1_Stream7_IRQHandler
  370. PUBWEAK TIM5_IRQHandler
  371. SECTION .text:CODE:REORDER:NOROOT(1)
  372. TIM5_IRQHandler
  373. B TIM5_IRQHandler
  374. PUBWEAK TIM6_DAC_IRQHandler
  375. SECTION .text:CODE:REORDER:NOROOT(1)
  376. TIM6_DAC_IRQHandler
  377. B TIM6_DAC_IRQHandler
  378. PUBWEAK DMA2_Stream0_IRQHandler
  379. SECTION .text:CODE:REORDER:NOROOT(1)
  380. DMA2_Stream0_IRQHandler
  381. B DMA2_Stream0_IRQHandler
  382. PUBWEAK DMA2_Stream1_IRQHandler
  383. SECTION .text:CODE:REORDER:NOROOT(1)
  384. DMA2_Stream1_IRQHandler
  385. B DMA2_Stream1_IRQHandler
  386. PUBWEAK DMA2_Stream2_IRQHandler
  387. SECTION .text:CODE:REORDER:NOROOT(1)
  388. DMA2_Stream2_IRQHandler
  389. B DMA2_Stream2_IRQHandler
  390. PUBWEAK DMA2_Stream3_IRQHandler
  391. SECTION .text:CODE:REORDER:NOROOT(1)
  392. DMA2_Stream3_IRQHandler
  393. B DMA2_Stream3_IRQHandler
  394. PUBWEAK DMA2_Stream4_IRQHandler
  395. SECTION .text:CODE:REORDER:NOROOT(1)
  396. DMA2_Stream4_IRQHandler
  397. B DMA2_Stream4_IRQHandler
  398. PUBWEAK DMA2_Stream5_IRQHandler
  399. SECTION .text:CODE:REORDER:NOROOT(1)
  400. DMA2_Stream5_IRQHandler
  401. B DMA2_Stream5_IRQHandler
  402. PUBWEAK DMA2_Stream6_IRQHandler
  403. SECTION .text:CODE:REORDER:NOROOT(1)
  404. DMA2_Stream6_IRQHandler
  405. B DMA2_Stream6_IRQHandler
  406. PUBWEAK DMA2_Stream7_IRQHandler
  407. SECTION .text:CODE:REORDER:NOROOT(1)
  408. DMA2_Stream7_IRQHandler
  409. B DMA2_Stream7_IRQHandler
  410. PUBWEAK USART6_IRQHandler
  411. SECTION .text:CODE:REORDER:NOROOT(1)
  412. USART6_IRQHandler
  413. B USART6_IRQHandler
  414. PUBWEAK RNG_IRQHandler
  415. SECTION .text:CODE:REORDER:NOROOT(1)
  416. RNG_IRQHandler
  417. B RNG_IRQHandler
  418. PUBWEAK FPU_IRQHandler
  419. SECTION .text:CODE:REORDER:NOROOT(1)
  420. FPU_IRQHandler
  421. B FPU_IRQHandler
  422. PUBWEAK SPI5_IRQHandler
  423. SECTION .text:CODE:REORDER:NOROOT(1)
  424. SPI5_IRQHandler
  425. B SPI5_IRQHandler
  426. PUBWEAK FMPI2C1_EV_IRQHandler
  427. SECTION .text:CODE:REORDER:NOROOT(1)
  428. FMPI2C1_EV_IRQHandler
  429. B FMPI2C1_EV_IRQHandler
  430. PUBWEAK FMPI2C1_ER_IRQHandler
  431. SECTION .text:CODE:REORDER:NOROOT(1)
  432. FMPI2C1_ER_IRQHandler
  433. B FMPI2C1_ER_IRQHandler
  434. PUBWEAK LPTIM1_IRQHandler
  435. SECTION .text:CODE:REORDER:NOROOT(1)
  436. LPTIM1_IRQHandler
  437. B LPTIM1_IRQHandler
  438. END
  439. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/