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- ;/********************* COPYRIGHT(c) 2017 STMicroelectronics ********************
- ;* File Name : startup_stm32l451xx.s
- ;* Author : MCD Application Team
- ;* Version : V1.3.2
- ;* Date : 16-June-2017
- ;* Description : STM32L451xx Ultra Low Power Devices vector
- ;* This module performs:
- ;* - Set the initial SP
- ;* - Set the initial PC == _iar_program_start,
- ;* - Set the vector table entries with the exceptions ISR
- ;* address.
- ;* - Branches to main in the C library (which eventually
- ;* calls main()).
- ;* After Reset the Cortex-M4 processor is in Thread mode,
- ;* priority is Privileged, and the Stack is set to Main.
- ;********************************************************************************
- ;*
- ;* Redistribution and use in source and binary forms, with or without modification,
- ;* are permitted provided that the following conditions are met:
- ;* 1. Redistributions of source code must retain the above copyright notice,
- ;* this list of conditions and the following disclaimer.
- ;* 2. Redistributions in binary form must reproduce the above copyright notice,
- ;* this list of conditions and the following disclaimer in the documentation
- ;* and/or other materials provided with the distribution.
- ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
- ;* may be used to endorse or promote products derived from this software
- ;* without specific prior written permission.
- ;*
- ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ;*
- ;*******************************************************************************
- ;
- ;
- ; The modules in this file are included in the libraries, and may be replaced
- ; by any user-defined modules that define the PUBLIC symbol _program_start or
- ; a user defined start symbol.
- ; To override the cstartup defined in the library, simply add your modified
- ; version to the workbench project.
- ;
- ; The vector table is normally located at address 0.
- ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
- ; The name "__vector_table" has special meaning for C-SPY:
- ; it is where the SP start value is found, and the NVIC vector
- ; table register (VTOR) is initialized to this address if != 0.
- ;
- ; Cortex-M version
- ;
-
- MODULE ?cstartup
-
- ;; Forward declaration of sections.
- SECTION CSTACK:DATA:NOROOT(3)
-
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- EXTERN SystemInit
- PUBLIC __vector_table
-
- DATA
- __vector_table
- DCD sfe(CSTACK)
- DCD Reset_Handler ; Reset Handler
-
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window WatchDog
- DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
- DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
- DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line0
- DCD EXTI1_IRQHandler ; EXTI Line1
- DCD EXTI2_IRQHandler ; EXTI Line2
- DCD EXTI3_IRQHandler ; EXTI Line3
- DCD EXTI4_IRQHandler ; EXTI Line4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_IRQHandler ; ADC1
- DCD CAN1_TX_IRQHandler ; CAN1 TX
- DCD CAN1_RX0_IRQHandler ; CAN1 RX0
- DCD CAN1_RX1_IRQHandler ; CAN1 RX1
- DCD CAN1_SCE_IRQHandler ; CAN1 SCE
- DCD EXTI9_5_IRQHandler ; External Line[9:5]s
- DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
- DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
- DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD 0 ; Reserved
- DCD I2C1_EV_IRQHandler ; I2C1 Event
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD I2C2_EV_IRQHandler ; I2C2 Event
- DCD I2C2_ER_IRQHandler ; I2C2 Error
- DCD SPI1_IRQHandler ; SPI1
- DCD SPI2_IRQHandler ; SPI2
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_IRQHandler ; USART3
- DCD EXTI15_10_IRQHandler ; External Line[15:10]
- DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SDMMC1_IRQHandler ; SDMMC1
- DCD 0 ; Reserved
- DCD SPI3_IRQHandler ; SPI3
- DCD UART4_IRQHandler ; UART4
- DCD 0 ; Reserved
- DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
- DCD 0 ; Reserved
- DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
- DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
- DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
- DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
- DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
- DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
- DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
- DCD 0 ; Reserved
- DCD COMP_IRQHandler ; COMP Interrupt
- DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
- DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
- DCD 0 ; Reserved
- DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
- DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
- DCD LPUART1_IRQHandler ; LP UART 1 interrupt
- DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
- DCD I2C3_EV_IRQHandler ; I2C3 event
- DCD I2C3_ER_IRQHandler ; I2C3 error
- DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD RNG_IRQHandler ; RNG global interrupt
- DCD FPU_IRQHandler ; FPU interrupt
- DCD CRS_IRQHandler ; CRS interrupt
- DCD I2C4_EV_IRQHandler ; I2C4 event
- DCD I2C4_ER_IRQHandler ; I2C4 error
-
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;
- ;; Default interrupt handlers.
- ;;
- THUMB
- PUBWEAK Reset_Handler
- SECTION .text:CODE:NOROOT:REORDER(2)
- Reset_Handler
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__iar_program_start
- BX R0
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- NMI_Handler
- B NMI_Handler
-
- PUBWEAK HardFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- HardFault_Handler
- B HardFault_Handler
-
- PUBWEAK MemManage_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- MemManage_Handler
- B MemManage_Handler
-
- PUBWEAK BusFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- BusFault_Handler
- B BusFault_Handler
-
- PUBWEAK UsageFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- UsageFault_Handler
- B UsageFault_Handler
-
- PUBWEAK SVC_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SVC_Handler
- B SVC_Handler
-
- PUBWEAK DebugMon_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DebugMon_Handler
- B DebugMon_Handler
-
- PUBWEAK PendSV_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- PendSV_Handler
- B PendSV_Handler
-
- PUBWEAK SysTick_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SysTick_Handler
- B SysTick_Handler
-
- PUBWEAK WWDG_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- WWDG_IRQHandler
- B WWDG_IRQHandler
-
- PUBWEAK PVD_PVM_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- PVD_PVM_IRQHandler
- B PVD_PVM_IRQHandler
-
- PUBWEAK TAMP_STAMP_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TAMP_STAMP_IRQHandler
- B TAMP_STAMP_IRQHandler
-
- PUBWEAK RTC_WKUP_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RTC_WKUP_IRQHandler
- B RTC_WKUP_IRQHandler
-
- PUBWEAK FLASH_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- FLASH_IRQHandler
- B FLASH_IRQHandler
-
- PUBWEAK RCC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RCC_IRQHandler
- B RCC_IRQHandler
-
- PUBWEAK EXTI0_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI0_IRQHandler
- B EXTI0_IRQHandler
-
- PUBWEAK EXTI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI1_IRQHandler
- B EXTI1_IRQHandler
-
- PUBWEAK EXTI2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI2_IRQHandler
- B EXTI2_IRQHandler
-
- PUBWEAK EXTI3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI3_IRQHandler
- B EXTI3_IRQHandler
-
- PUBWEAK EXTI4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI4_IRQHandler
- B EXTI4_IRQHandler
-
- PUBWEAK DMA1_Channel1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel1_IRQHandler
- B DMA1_Channel1_IRQHandler
-
- PUBWEAK DMA1_Channel2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel2_IRQHandler
- B DMA1_Channel2_IRQHandler
-
- PUBWEAK DMA1_Channel3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel3_IRQHandler
- B DMA1_Channel3_IRQHandler
-
- PUBWEAK DMA1_Channel4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel4_IRQHandler
- B DMA1_Channel4_IRQHandler
-
- PUBWEAK DMA1_Channel5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel5_IRQHandler
- B DMA1_Channel5_IRQHandler
-
- PUBWEAK DMA1_Channel6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel6_IRQHandler
- B DMA1_Channel6_IRQHandler
-
- PUBWEAK DMA1_Channel7_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel7_IRQHandler
- B DMA1_Channel7_IRQHandler
-
- PUBWEAK ADC1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- ADC1_IRQHandler
- B ADC1_IRQHandler
-
- PUBWEAK CAN1_TX_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- CAN1_TX_IRQHandler
- B CAN1_TX_IRQHandler
-
- PUBWEAK CAN1_RX0_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- CAN1_RX0_IRQHandler
- B CAN1_RX0_IRQHandler
-
- PUBWEAK CAN1_RX1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- CAN1_RX1_IRQHandler
- B CAN1_RX1_IRQHandler
-
- PUBWEAK CAN1_SCE_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- CAN1_SCE_IRQHandler
- B CAN1_SCE_IRQHandler
-
- PUBWEAK EXTI9_5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI9_5_IRQHandler
- B EXTI9_5_IRQHandler
-
- PUBWEAK TIM1_BRK_TIM15_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_BRK_TIM15_IRQHandler
- B TIM1_BRK_TIM15_IRQHandler
-
- PUBWEAK TIM1_UP_TIM16_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_UP_TIM16_IRQHandler
- B TIM1_UP_TIM16_IRQHandler
-
- PUBWEAK TIM1_TRG_COM_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_TRG_COM_IRQHandler
- B TIM1_TRG_COM_IRQHandler
-
- PUBWEAK TIM1_CC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_CC_IRQHandler
- B TIM1_CC_IRQHandler
-
- PUBWEAK TIM2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM2_IRQHandler
- B TIM2_IRQHandler
-
- PUBWEAK TIM3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM3_IRQHandler
- B TIM3_IRQHandler
-
- PUBWEAK I2C1_EV_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C1_EV_IRQHandler
- B I2C1_EV_IRQHandler
-
- PUBWEAK I2C1_ER_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C1_ER_IRQHandler
- B I2C1_ER_IRQHandler
-
- PUBWEAK I2C2_EV_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C2_EV_IRQHandler
- B I2C2_EV_IRQHandler
-
- PUBWEAK I2C2_ER_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C2_ER_IRQHandler
- B I2C2_ER_IRQHandler
-
- PUBWEAK SPI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SPI1_IRQHandler
- B SPI1_IRQHandler
-
- PUBWEAK SPI2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SPI2_IRQHandler
- B SPI2_IRQHandler
-
- PUBWEAK USART1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART1_IRQHandler
- B USART1_IRQHandler
-
- PUBWEAK USART2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART2_IRQHandler
- B USART2_IRQHandler
-
- PUBWEAK USART3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART3_IRQHandler
- B USART3_IRQHandler
-
- PUBWEAK EXTI15_10_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI15_10_IRQHandler
- B EXTI15_10_IRQHandler
-
- PUBWEAK RTC_Alarm_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RTC_Alarm_IRQHandler
- B RTC_Alarm_IRQHandler
-
- PUBWEAK SDMMC1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SDMMC1_IRQHandler
- B SDMMC1_IRQHandler
-
- PUBWEAK SPI3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SPI3_IRQHandler
- B SPI3_IRQHandler
-
- PUBWEAK UART4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- UART4_IRQHandler
- B UART4_IRQHandler
-
- PUBWEAK TIM6_DAC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM6_DAC_IRQHandler
- B TIM6_DAC_IRQHandler
-
- PUBWEAK DMA2_Channel1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel1_IRQHandler
- B DMA2_Channel1_IRQHandler
-
- PUBWEAK DMA2_Channel2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel2_IRQHandler
- B DMA2_Channel2_IRQHandler
-
- PUBWEAK DMA2_Channel3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel3_IRQHandler
- B DMA2_Channel3_IRQHandler
-
- PUBWEAK DMA2_Channel4_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel4_IRQHandler
- B DMA2_Channel4_IRQHandler
-
- PUBWEAK DMA2_Channel5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel5_IRQHandler
- B DMA2_Channel5_IRQHandler
-
- PUBWEAK DFSDM1_FLT0_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DFSDM1_FLT0_IRQHandler
- B DFSDM1_FLT0_IRQHandler
-
- PUBWEAK DFSDM1_FLT1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DFSDM1_FLT1_IRQHandler
- B DFSDM1_FLT1_IRQHandler
-
- PUBWEAK COMP_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- COMP_IRQHandler
- B COMP_IRQHandler
-
- PUBWEAK LPTIM1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- LPTIM1_IRQHandler
- B LPTIM1_IRQHandler
-
- PUBWEAK LPTIM2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- LPTIM2_IRQHandler
- B LPTIM2_IRQHandler
-
- PUBWEAK DMA2_Channel6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel6_IRQHandler
- B DMA2_Channel6_IRQHandler
-
- PUBWEAK DMA2_Channel7_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA2_Channel7_IRQHandler
- B DMA2_Channel7_IRQHandler
-
- PUBWEAK LPUART1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- LPUART1_IRQHandler
- B LPUART1_IRQHandler
-
- PUBWEAK QUADSPI_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- QUADSPI_IRQHandler
- B QUADSPI_IRQHandler
-
- PUBWEAK I2C3_EV_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C3_EV_IRQHandler
- B I2C3_EV_IRQHandler
-
- PUBWEAK I2C3_ER_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C3_ER_IRQHandler
- B I2C3_ER_IRQHandler
-
- PUBWEAK SAI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SAI1_IRQHandler
- B SAI1_IRQHandler
-
- PUBWEAK TSC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TSC_IRQHandler
- B TSC_IRQHandler
-
- PUBWEAK RNG_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RNG_IRQHandler
- B RNG_IRQHandler
-
- PUBWEAK FPU_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- FPU_IRQHandler
- B FPU_IRQHandler
-
- PUBWEAK CRS_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- CRS_IRQHandler
- B CRS_IRQHandler
-
- PUBWEAK I2C4_EV_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C4_EV_IRQHandler
- B I2C4_EV_IRQHandler
-
- PUBWEAK I2C4_ER_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C4_ER_IRQHandler
- B I2C4_ER_IRQHandler
-
- END
- /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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