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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_adc.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Analog to Digital Convertor (ADC)
  7. * peripheral:
  8. * + Initialization and de-initialization functions
  9. * ++ Initialization and Configuration of ADC
  10. * + Operation functions
  11. * ++ Start, stop, get result of conversions of regular
  12. * group, using 3 possible modes: polling, interruption or DMA.
  13. * + Control functions
  14. * ++ Channels configuration on regular group
  15. * ++ Analog Watchdog configuration
  16. * + State functions
  17. * ++ ADC state machine management
  18. * ++ Interrupts and flags management
  19. * Other functions (extended functions) are available in file
  20. * "stm32f0xx_hal_adc_ex.c".
  21. *
  22. @verbatim
  23. ==============================================================================
  24. ##### ADC peripheral features #####
  25. ==============================================================================
  26. [..]
  27. (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
  28. (+) Interrupt generation at the end of regular conversion and in case of
  29. analog watchdog or overrun events.
  30. (+) Single and continuous conversion modes.
  31. (+) Scan mode for conversion of several channels sequentially.
  32. (+) Data alignment with in-built data coherency.
  33. (+) Programmable sampling time (common for all channels)
  34. (+) ADC conversion of regular group.
  35. (+) External trigger (timer or EXTI) with configurable polarity
  36. (+) DMA request generation for transfer of conversions data of regular group.
  37. (+) ADC calibration
  38. (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
  39. slower speed.
  40. (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
  41. Vdda or to an external voltage reference).
  42. ##### How to use this driver #####
  43. ==============================================================================
  44. [..]
  45. *** Configuration of top level parameters related to ADC ***
  46. ============================================================
  47. [..]
  48. (#) Enable the ADC interface
  49. (++) As prerequisite, ADC clock must be configured at RCC top level.
  50. Caution: On STM32F0, ADC clock frequency max is 14MHz (refer
  51. to device datasheet).
  52. Therefore, ADC clock prescaler must be configured in
  53. function of ADC clock source frequency to remain below
  54. this maximum frequency.
  55. (++) Two clock settings are mandatory:
  56. (+++) ADC clock (core clock, also possibly conversion clock).
  57. (+++) ADC clock (conversions clock).
  58. Two possible clock sources: synchronous clock derived from APB clock
  59. or asynchronous clock derived from ADC dedicated HSI RC oscillator
  60. 14MHz.
  61. If asynchronous clock is selected, parameter "HSI14State" must be set either:
  62. - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control
  63. the HSI14 oscillator enable/disable (if not used to supply the main
  64. system clock): feature used if ADC mode LowPowerAutoPowerOff is
  65. enabled.
  66. - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
  67. always enabled: can be used to supply the main system clock.
  68. (+++) Example:
  69. Into HAL_ADC_MspInit() (recommended code location) or with
  70. other device clock parameters configuration:
  71. (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
  72. HI14 enable or let under control of ADC: (optional: if asynchronous clock selected)
  73. (+++) RCC_OscInitTypeDef RCC_OscInitStructure;
  74. (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
  75. (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
  76. (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
  77. (+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
  78. (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
  79. (++) ADC clock source and clock prescaler are configured at ADC level with
  80. parameter "ClockPrescaler" using function HAL_ADC_Init().
  81. (#) ADC pins configuration
  82. (++) Enable the clock for the ADC GPIOs
  83. using macro __HAL_RCC_GPIOx_CLK_ENABLE()
  84. (++) Configure these ADC pins in analog mode
  85. using function HAL_GPIO_Init()
  86. (#) Optionally, in case of usage of ADC with interruptions:
  87. (++) Configure the NVIC for ADC
  88. using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
  89. (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
  90. into the function of corresponding ADC interruption vector
  91. ADCx_IRQHandler().
  92. (#) Optionally, in case of usage of DMA:
  93. (++) Configure the DMA (DMA channel, mode normal or circular, ...)
  94. using function HAL_DMA_Init().
  95. (++) Configure the NVIC for DMA
  96. using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
  97. (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
  98. into the function of corresponding DMA interruption vector
  99. DMAx_Channelx_IRQHandler().
  100. *** Configuration of ADC, group regular, channels parameters ***
  101. ================================================================
  102. [..]
  103. (#) Configure the ADC parameters (resolution, data alignment, ...)
  104. and regular group parameters (conversion trigger, sequencer, ...)
  105. using function HAL_ADC_Init().
  106. (#) Configure the channels for regular group parameters (channel number,
  107. channel rank into sequencer, ..., into regular group)
  108. using function HAL_ADC_ConfigChannel().
  109. (#) Optionally, configure the analog watchdog parameters (channels
  110. monitored, thresholds, ...)
  111. using function HAL_ADC_AnalogWDGConfig().
  112. *** Execution of ADC conversions ***
  113. ====================================
  114. [..]
  115. (#) Optionally, perform an automatic ADC calibration to improve the
  116. conversion accuracy
  117. using function HAL_ADCEx_Calibration_Start().
  118. (#) ADC driver can be used among three modes: polling, interruption,
  119. transfer by DMA.
  120. (++) ADC conversion by polling:
  121. (+++) Activate the ADC peripheral and start conversions
  122. using function HAL_ADC_Start()
  123. (+++) Wait for ADC conversion completion
  124. using function HAL_ADC_PollForConversion()
  125. (+++) Retrieve conversion results
  126. using function HAL_ADC_GetValue()
  127. (+++) Stop conversion and disable the ADC peripheral
  128. using function HAL_ADC_Stop()
  129. (++) ADC conversion by interruption:
  130. (+++) Activate the ADC peripheral and start conversions
  131. using function HAL_ADC_Start_IT()
  132. (+++) Wait for ADC conversion completion by call of function
  133. HAL_ADC_ConvCpltCallback()
  134. (this function must be implemented in user program)
  135. (+++) Retrieve conversion results
  136. using function HAL_ADC_GetValue()
  137. (+++) Stop conversion and disable the ADC peripheral
  138. using function HAL_ADC_Stop_IT()
  139. (++) ADC conversion with transfer by DMA:
  140. (+++) Activate the ADC peripheral and start conversions
  141. using function HAL_ADC_Start_DMA()
  142. (+++) Wait for ADC conversion completion by call of function
  143. HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
  144. (these functions must be implemented in user program)
  145. (+++) Conversion results are automatically transferred by DMA into
  146. destination variable address.
  147. (+++) Stop conversion and disable the ADC peripheral
  148. using function HAL_ADC_Stop_DMA()
  149. [..]
  150. (@) Callback functions must be implemented in user program:
  151. (+@) HAL_ADC_ErrorCallback()
  152. (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
  153. (+@) HAL_ADC_ConvCpltCallback()
  154. (+@) HAL_ADC_ConvHalfCpltCallback
  155. *** Deinitialization of ADC ***
  156. ============================================================
  157. [..]
  158. (#) Disable the ADC interface
  159. (++) ADC clock can be hard reset and disabled at RCC top level.
  160. (++) Hard reset of ADC peripherals
  161. using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
  162. (++) ADC clock disable
  163. using the equivalent macro/functions as configuration step.
  164. (+++) Example:
  165. Into HAL_ADC_MspDeInit() (recommended code location) or with
  166. other device clock parameters configuration:
  167. (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
  168. (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock)
  169. (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
  170. (#) ADC pins configuration
  171. (++) Disable the clock for the ADC GPIOs
  172. using macro __HAL_RCC_GPIOx_CLK_DISABLE()
  173. (#) Optionally, in case of usage of ADC with interruptions:
  174. (++) Disable the NVIC for ADC
  175. using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
  176. (#) Optionally, in case of usage of DMA:
  177. (++) Deinitialize the DMA
  178. using function HAL_DMA_Init().
  179. (++) Disable the NVIC for DMA
  180. using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
  181. [..]
  182. @endverbatim
  183. ******************************************************************************
  184. * @attention
  185. *
  186. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  187. *
  188. * Redistribution and use in source and binary forms, with or without modification,
  189. * are permitted provided that the following conditions are met:
  190. * 1. Redistributions of source code must retain the above copyright notice,
  191. * this list of conditions and the following disclaimer.
  192. * 2. Redistributions in binary form must reproduce the above copyright notice,
  193. * this list of conditions and the following disclaimer in the documentation
  194. * and/or other materials provided with the distribution.
  195. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  196. * may be used to endorse or promote products derived from this software
  197. * without specific prior written permission.
  198. *
  199. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  200. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  201. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  202. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  203. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  204. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  205. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  206. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  207. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  208. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  209. *
  210. ******************************************************************************
  211. */
  212. /* Includes ------------------------------------------------------------------*/
  213. #include "stm32f0xx_hal.h"
  214. /** @addtogroup STM32F0xx_HAL_Driver
  215. * @{
  216. */
  217. /** @defgroup ADC ADC
  218. * @brief ADC HAL module driver
  219. * @{
  220. */
  221. #ifdef HAL_ADC_MODULE_ENABLED
  222. /* Private typedef -----------------------------------------------------------*/
  223. /* Private define ------------------------------------------------------------*/
  224. /** @defgroup ADC_Private_Constants ADC Private Constants
  225. * @{
  226. */
  227. /* Fixed timeout values for ADC calibration, enable settling time, disable */
  228. /* settling time. */
  229. /* Values defined to be higher than worst cases: low clock frequency, */
  230. /* maximum prescaler. */
  231. /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
  232. /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
  233. /* Unit: ms */
  234. #define ADC_ENABLE_TIMEOUT ( 2U)
  235. #define ADC_DISABLE_TIMEOUT ( 2U)
  236. #define ADC_STOP_CONVERSION_TIMEOUT ( 2U)
  237. /* Delay for ADC stabilization time. */
  238. /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
  239. /* Unit: us */
  240. #define ADC_STAB_DELAY_US ( 1U)
  241. /* Delay for temperature sensor stabilization time. */
  242. /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
  243. /* Unit: us */
  244. #define ADC_TEMPSENSOR_DELAY_US ( 10U)
  245. /**
  246. * @}
  247. */
  248. /* Private macro -------------------------------------------------------------*/
  249. /* Private variables ---------------------------------------------------------*/
  250. /* Private function prototypes -----------------------------------------------*/
  251. /** @defgroup ADC_Private_Functions ADC Private Functions
  252. * @{
  253. */
  254. static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
  255. static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
  256. static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
  257. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
  258. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
  259. static void ADC_DMAError(DMA_HandleTypeDef *hdma);
  260. /**
  261. * @}
  262. */
  263. /* Exported functions ---------------------------------------------------------*/
  264. /** @defgroup ADC_Exported_Functions ADC Exported Functions
  265. * @{
  266. */
  267. /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
  268. * @brief Initialization and Configuration functions
  269. *
  270. @verbatim
  271. ===============================================================================
  272. ##### Initialization and de-initialization functions #####
  273. ===============================================================================
  274. [..] This section provides functions allowing to:
  275. (+) Initialize and configure the ADC.
  276. (+) De-initialize the ADC
  277. @endverbatim
  278. * @{
  279. */
  280. /**
  281. * @brief Initializes the ADC peripheral and regular group according to
  282. * parameters specified in structure "ADC_InitTypeDef".
  283. * @note As prerequisite, ADC clock must be configured at RCC top level
  284. * depending on both possible clock sources: APB clock of HSI clock.
  285. * See commented example code below that can be copied and uncommented
  286. * into HAL_ADC_MspInit().
  287. * @note Possibility to update parameters on the fly:
  288. * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
  289. * coming from ADC state reset. Following calls to this function can
  290. * be used to reconfigure some parameters of ADC_InitTypeDef
  291. * structure on the fly, without modifying MSP configuration. If ADC
  292. * MSP has to be modified again, HAL_ADC_DeInit() must be called
  293. * before HAL_ADC_Init().
  294. * The setting of these parameters is conditioned to ADC state.
  295. * For parameters constraints, see comments of structure
  296. * "ADC_InitTypeDef".
  297. * @note This function configures the ADC within 2 scopes: scope of entire
  298. * ADC and scope of regular group. For parameters details, see comments
  299. * of structure "ADC_InitTypeDef".
  300. * @param hadc ADC handle
  301. * @retval HAL status
  302. */
  303. HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
  304. {
  305. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  306. uint32_t tmpCFGR1 = 0U;
  307. /* Check ADC handle */
  308. if(hadc == NULL)
  309. {
  310. return HAL_ERROR;
  311. }
  312. /* Check the parameters */
  313. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  314. assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
  315. assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
  316. assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
  317. assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
  318. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  319. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
  320. assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  321. assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
  322. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
  323. assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
  324. assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
  325. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
  326. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
  327. /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
  328. /* at RCC top level depending on both possible clock sources: */
  329. /* APB clock or HSI clock. */
  330. /* Refer to header of this file for more details on clock enabling procedure*/
  331. /* Actions performed only if ADC is coming from state reset: */
  332. /* - Initialization of ADC MSP */
  333. /* - ADC voltage regulator enable */
  334. if (hadc->State == HAL_ADC_STATE_RESET)
  335. {
  336. /* Initialize ADC error code */
  337. ADC_CLEAR_ERRORCODE(hadc);
  338. /* Allocate lock resource and initialize it */
  339. hadc->Lock = HAL_UNLOCKED;
  340. /* Init the low level hardware */
  341. HAL_ADC_MspInit(hadc);
  342. }
  343. /* Configuration of ADC parameters if previous preliminary actions are */
  344. /* correctly completed. */
  345. /* and if there is no conversion on going on regular group (ADC can be */
  346. /* enabled anyway, in case of call of this function to update a parameter */
  347. /* on the fly). */
  348. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
  349. (tmp_hal_status == HAL_OK) &&
  350. (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
  351. {
  352. /* Set ADC state */
  353. ADC_STATE_CLR_SET(hadc->State,
  354. HAL_ADC_STATE_REG_BUSY,
  355. HAL_ADC_STATE_BUSY_INTERNAL);
  356. /* Parameters update conditioned to ADC state: */
  357. /* Parameters that can be updated only when ADC is disabled: */
  358. /* - ADC clock mode */
  359. /* - ADC clock prescaler */
  360. /* - ADC resolution */
  361. if (ADC_IS_ENABLE(hadc) == RESET)
  362. {
  363. /* Some parameters of this register are not reset, since they are set */
  364. /* by other functions and must be kept in case of usage of this */
  365. /* function on the fly (update of a parameter of ADC_InitTypeDef */
  366. /* without needing to reconfigure all other ADC groups/channels */
  367. /* parameters): */
  368. /* - internal measurement paths: Vbat, temperature sensor, Vref */
  369. /* (set into HAL_ADC_ConfigChannel() ) */
  370. /* Configuration of ADC resolution */
  371. MODIFY_REG(hadc->Instance->CFGR1,
  372. ADC_CFGR1_RES ,
  373. hadc->Init.Resolution );
  374. /* Configuration of ADC clock mode: clock source AHB or HSI with */
  375. /* selectable prescaler */
  376. MODIFY_REG(hadc->Instance->CFGR2 ,
  377. ADC_CFGR2_CKMODE ,
  378. hadc->Init.ClockPrescaler );
  379. }
  380. /* Configuration of ADC: */
  381. /* - discontinuous mode */
  382. /* - LowPowerAutoWait mode */
  383. /* - LowPowerAutoPowerOff mode */
  384. /* - continuous conversion mode */
  385. /* - overrun */
  386. /* - external trigger to start conversion */
  387. /* - external trigger polarity */
  388. /* - data alignment */
  389. /* - resolution */
  390. /* - scan direction */
  391. /* - DMA continuous request */
  392. hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN |
  393. ADC_CFGR1_AUTOFF |
  394. ADC_CFGR1_AUTDLY |
  395. ADC_CFGR1_CONT |
  396. ADC_CFGR1_OVRMOD |
  397. ADC_CFGR1_EXTSEL |
  398. ADC_CFGR1_EXTEN |
  399. ADC_CFGR1_ALIGN |
  400. ADC_CFGR1_SCANDIR |
  401. ADC_CFGR1_DMACFG );
  402. tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT(hadc->Init.LowPowerAutoWait) |
  403. ADC_CFGR1_AUTOOFF(hadc->Init.LowPowerAutoPowerOff) |
  404. ADC_CFGR1_CONTINUOUS(hadc->Init.ContinuousConvMode) |
  405. ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
  406. hadc->Init.DataAlign |
  407. ADC_SCANDIR(hadc->Init.ScanConvMode) |
  408. ADC_CFGR1_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
  409. /* Enable discontinuous mode only if continuous mode is disabled */
  410. if (hadc->Init.DiscontinuousConvMode == ENABLE)
  411. {
  412. if (hadc->Init.ContinuousConvMode == DISABLE)
  413. {
  414. /* Enable the selected ADC group regular discontinuous mode */
  415. tmpCFGR1 |= ADC_CFGR1_DISCEN;
  416. }
  417. else
  418. {
  419. /* ADC regular group discontinuous was intended to be enabled, */
  420. /* but ADC regular group modes continuous and sequencer discontinuous */
  421. /* cannot be enabled simultaneously. */
  422. /* Update ADC state machine to error */
  423. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  424. /* Set ADC error code to ADC IP internal error */
  425. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  426. }
  427. }
  428. /* Enable external trigger if trigger selection is different of software */
  429. /* start. */
  430. /* Note: This configuration keeps the hardware feature of parameter */
  431. /* ExternalTrigConvEdge "trigger edge none" equivalent to */
  432. /* software start. */
  433. if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
  434. {
  435. tmpCFGR1 |= ( hadc->Init.ExternalTrigConv |
  436. hadc->Init.ExternalTrigConvEdge );
  437. }
  438. /* Update ADC configuration register with previous settings */
  439. hadc->Instance->CFGR1 |= tmpCFGR1;
  440. /* Channel sampling time configuration */
  441. /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
  442. /* (obsolete): sampling time set in this function if parameter */
  443. /* "SamplingTimeCommon" has been set to a valid sampling time. */
  444. /* Otherwise, sampling time is set into ADC channel initialization */
  445. /* structure with parameter "SamplingTime" (obsolete). */
  446. if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
  447. {
  448. /* Channel sampling time configuration */
  449. /* Clear the old sample time */
  450. hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
  451. /* Set the new sample time */
  452. hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon);
  453. }
  454. /* Check back that ADC registers have effectively been configured to */
  455. /* ensure of no potential problem of ADC core IP clocking. */
  456. /* Check through register CFGR1 (excluding analog watchdog configuration: */
  457. /* set into separate dedicated function, and bits of ADC resolution set */
  458. /* out of temporary variable 'tmpCFGR1'). */
  459. if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES))
  460. == tmpCFGR1)
  461. {
  462. /* Set ADC error code to none */
  463. ADC_CLEAR_ERRORCODE(hadc);
  464. /* Set the ADC state */
  465. ADC_STATE_CLR_SET(hadc->State,
  466. HAL_ADC_STATE_BUSY_INTERNAL,
  467. HAL_ADC_STATE_READY);
  468. }
  469. else
  470. {
  471. /* Update ADC state machine to error */
  472. ADC_STATE_CLR_SET(hadc->State,
  473. HAL_ADC_STATE_BUSY_INTERNAL,
  474. HAL_ADC_STATE_ERROR_INTERNAL);
  475. /* Set ADC error code to ADC IP internal error */
  476. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  477. tmp_hal_status = HAL_ERROR;
  478. }
  479. }
  480. else
  481. {
  482. /* Update ADC state machine to error */
  483. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  484. tmp_hal_status = HAL_ERROR;
  485. }
  486. /* Return function status */
  487. return tmp_hal_status;
  488. }
  489. /**
  490. * @brief Deinitialize the ADC peripheral registers to their default reset
  491. * values, with deinitialization of the ADC MSP.
  492. * @note For devices with several ADCs: reset of ADC common registers is done
  493. * only if all ADCs sharing the same common group are disabled.
  494. * If this is not the case, reset of these common parameters reset is
  495. * bypassed without error reporting: it can be the intended behaviour in
  496. * case of reset of a single ADC while the other ADCs sharing the same
  497. * common group is still running.
  498. * @param hadc ADC handle
  499. * @retval HAL status
  500. */
  501. HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
  502. {
  503. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  504. /* Check ADC handle */
  505. if(hadc == NULL)
  506. {
  507. return HAL_ERROR;
  508. }
  509. /* Check the parameters */
  510. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  511. /* Set ADC state */
  512. SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
  513. /* Stop potential conversion on going, on regular group */
  514. tmp_hal_status = ADC_ConversionStop(hadc);
  515. /* Disable ADC peripheral if conversions are effectively stopped */
  516. if (tmp_hal_status == HAL_OK)
  517. {
  518. /* Disable the ADC peripheral */
  519. tmp_hal_status = ADC_Disable(hadc);
  520. /* Check if ADC is effectively disabled */
  521. if (tmp_hal_status != HAL_ERROR)
  522. {
  523. /* Change ADC state */
  524. hadc->State = HAL_ADC_STATE_READY;
  525. }
  526. }
  527. /* Configuration of ADC parameters if previous preliminary actions are */
  528. /* correctly completed. */
  529. if (tmp_hal_status != HAL_ERROR)
  530. {
  531. /* ========== Reset ADC registers ========== */
  532. /* Reset register IER */
  533. __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR |
  534. ADC_IT_EOS | ADC_IT_EOC |
  535. ADC_IT_EOSMP | ADC_IT_RDY ) );
  536. /* Reset register ISR */
  537. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR |
  538. ADC_FLAG_EOS | ADC_FLAG_EOC |
  539. ADC_FLAG_EOSMP | ADC_FLAG_RDY ) );
  540. /* Reset register CR */
  541. /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
  542. /* "read-set": no direct reset applicable. */
  543. /* Reset register CFGR1 */
  544. hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN |
  545. ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD |
  546. ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES |
  547. ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN );
  548. /* Reset register CFGR2 */
  549. /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
  550. /* already done above. */
  551. hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
  552. /* Reset register SMPR */
  553. hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
  554. /* Reset register TR1 */
  555. hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
  556. /* Reset register CHSELR */
  557. hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 |
  558. ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 |
  559. ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8 |
  560. ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4 |
  561. ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0 );
  562. /* Reset register DR */
  563. /* bits in access mode read only, no direct reset applicable*/
  564. /* Reset register CCR */
  565. ADC->CCR &= ~(ADC_CCR_ALL);
  566. /* ========== Hard reset ADC peripheral ========== */
  567. /* Performs a global reset of the entire ADC peripheral: ADC state is */
  568. /* forced to a similar state after device power-on. */
  569. /* If needed, copy-paste and uncomment the following reset code into */
  570. /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
  571. /* */
  572. /* __HAL_RCC_ADC1_FORCE_RESET() */
  573. /* __HAL_RCC_ADC1_RELEASE_RESET() */
  574. /* DeInit the low level hardware */
  575. HAL_ADC_MspDeInit(hadc);
  576. /* Set ADC error code to none */
  577. ADC_CLEAR_ERRORCODE(hadc);
  578. /* Set ADC state */
  579. hadc->State = HAL_ADC_STATE_RESET;
  580. }
  581. /* Process unlocked */
  582. __HAL_UNLOCK(hadc);
  583. /* Return function status */
  584. return tmp_hal_status;
  585. }
  586. /**
  587. * @brief Initializes the ADC MSP.
  588. * @param hadc ADC handle
  589. * @retval None
  590. */
  591. __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  592. {
  593. /* Prevent unused argument(s) compilation warning */
  594. UNUSED(hadc);
  595. /* NOTE : This function should not be modified. When the callback is needed,
  596. function HAL_ADC_MspInit must be implemented in the user file.
  597. */
  598. }
  599. /**
  600. * @brief DeInitializes the ADC MSP.
  601. * @param hadc ADC handle
  602. * @retval None
  603. */
  604. __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
  605. {
  606. /* Prevent unused argument(s) compilation warning */
  607. UNUSED(hadc);
  608. /* NOTE : This function should not be modified. When the callback is needed,
  609. function HAL_ADC_MspDeInit must be implemented in the user file.
  610. */
  611. }
  612. /**
  613. * @}
  614. */
  615. /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
  616. * @brief IO operation functions
  617. *
  618. @verbatim
  619. ===============================================================================
  620. ##### IO operation functions #####
  621. ===============================================================================
  622. [..] This section provides functions allowing to:
  623. (+) Start conversion of regular group.
  624. (+) Stop conversion of regular group.
  625. (+) Poll for conversion complete on regular group.
  626. (+) Poll for conversion event.
  627. (+) Get result of regular channel conversion.
  628. (+) Start conversion of regular group and enable interruptions.
  629. (+) Stop conversion of regular group and disable interruptions.
  630. (+) Handle ADC interrupt request
  631. (+) Start conversion of regular group and enable DMA transfer.
  632. (+) Stop conversion of regular group and disable ADC DMA transfer.
  633. @endverbatim
  634. * @{
  635. */
  636. /**
  637. * @brief Enables ADC, starts conversion of regular group.
  638. * Interruptions enabled in this function: None.
  639. * @param hadc ADC handle
  640. * @retval HAL status
  641. */
  642. HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
  643. {
  644. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  645. /* Check the parameters */
  646. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  647. /* Perform ADC enable and conversion start if no conversion is on going */
  648. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  649. {
  650. /* Process locked */
  651. __HAL_LOCK(hadc);
  652. /* Enable the ADC peripheral */
  653. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  654. /* performed automatically by hardware. */
  655. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  656. {
  657. tmp_hal_status = ADC_Enable(hadc);
  658. }
  659. /* Start conversion if ADC is effectively enabled */
  660. if (tmp_hal_status == HAL_OK)
  661. {
  662. /* Set ADC state */
  663. /* - Clear state bitfield related to regular group conversion results */
  664. /* - Set state bitfield related to regular operation */
  665. ADC_STATE_CLR_SET(hadc->State,
  666. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  667. HAL_ADC_STATE_REG_BUSY);
  668. /* Reset ADC all error code fields */
  669. ADC_CLEAR_ERRORCODE(hadc);
  670. /* Process unlocked */
  671. /* Unlock before starting ADC conversions: in case of potential */
  672. /* interruption, to let the process to ADC IRQ Handler. */
  673. __HAL_UNLOCK(hadc);
  674. /* Clear regular group conversion flag and overrun flag */
  675. /* (To ensure of no unknown state from potential previous ADC */
  676. /* operations) */
  677. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  678. /* Enable conversion of regular group. */
  679. /* If software start has been selected, conversion starts immediately. */
  680. /* If external trigger has been selected, conversion will start at next */
  681. /* trigger event. */
  682. hadc->Instance->CR |= ADC_CR_ADSTART;
  683. }
  684. }
  685. else
  686. {
  687. tmp_hal_status = HAL_BUSY;
  688. }
  689. /* Return function status */
  690. return tmp_hal_status;
  691. }
  692. /**
  693. * @brief Stop ADC conversion of regular group, disable ADC peripheral.
  694. * @param hadc ADC handle
  695. * @retval HAL status.
  696. */
  697. HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
  698. {
  699. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  700. /* Check the parameters */
  701. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  702. /* Process locked */
  703. __HAL_LOCK(hadc);
  704. /* 1. Stop potential conversion on going, on regular group */
  705. tmp_hal_status = ADC_ConversionStop(hadc);
  706. /* Disable ADC peripheral if conversions are effectively stopped */
  707. if (tmp_hal_status == HAL_OK)
  708. {
  709. /* 2. Disable the ADC peripheral */
  710. tmp_hal_status = ADC_Disable(hadc);
  711. /* Check if ADC is effectively disabled */
  712. if (tmp_hal_status == HAL_OK)
  713. {
  714. /* Set ADC state */
  715. ADC_STATE_CLR_SET(hadc->State,
  716. HAL_ADC_STATE_REG_BUSY,
  717. HAL_ADC_STATE_READY);
  718. }
  719. }
  720. /* Process unlocked */
  721. __HAL_UNLOCK(hadc);
  722. /* Return function status */
  723. return tmp_hal_status;
  724. }
  725. /**
  726. * @brief Wait for regular group conversion to be completed.
  727. * @note ADC conversion flags EOS (end of sequence) and EOC (end of
  728. * conversion) are cleared by this function, with an exception:
  729. * if low power feature "LowPowerAutoWait" is enabled, flags are
  730. * not cleared to not interfere with this feature until data register
  731. * is read using function HAL_ADC_GetValue().
  732. * @note This function cannot be used in a particular setup: ADC configured
  733. * in DMA mode and polling for end of each conversion (ADC init
  734. * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
  735. * In this case, DMA resets the flag EOC and polling cannot be
  736. * performed on each conversion. Nevertheless, polling can still
  737. * be performed on the complete sequence (ADC init
  738. * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
  739. * @param hadc ADC handle
  740. * @param Timeout Timeout value in millisecond.
  741. * @retval HAL status
  742. */
  743. HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
  744. {
  745. uint32_t tickstart;
  746. uint32_t tmp_Flag_EOC;
  747. /* Check the parameters */
  748. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  749. /* If end of conversion selected to end of sequence */
  750. if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
  751. {
  752. tmp_Flag_EOC = ADC_FLAG_EOS;
  753. }
  754. /* If end of conversion selected to end of each conversion */
  755. else /* ADC_EOC_SINGLE_CONV */
  756. {
  757. /* Verification that ADC configuration is compliant with polling for */
  758. /* each conversion: */
  759. /* Particular case is ADC configured in DMA mode and ADC sequencer with */
  760. /* several ranks and polling for end of each conversion. */
  761. /* For code simplicity sake, this particular case is generalized to */
  762. /* ADC configured in DMA mode and and polling for end of each conversion. */
  763. if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
  764. {
  765. /* Update ADC state machine to error */
  766. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  767. /* Process unlocked */
  768. __HAL_UNLOCK(hadc);
  769. return HAL_ERROR;
  770. }
  771. else
  772. {
  773. tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
  774. }
  775. }
  776. /* Get tick count */
  777. tickstart = HAL_GetTick();
  778. /* Wait until End of Conversion flag is raised */
  779. while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
  780. {
  781. /* Check if timeout is disabled (set to infinite wait) */
  782. if(Timeout != HAL_MAX_DELAY)
  783. {
  784. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  785. {
  786. /* Update ADC state machine to timeout */
  787. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  788. /* Process unlocked */
  789. __HAL_UNLOCK(hadc);
  790. return HAL_TIMEOUT;
  791. }
  792. }
  793. }
  794. /* Update ADC state machine */
  795. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  796. /* Determine whether any further conversion upcoming on group regular */
  797. /* by external trigger, continuous mode or scan sequence on going. */
  798. if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  799. (hadc->Init.ContinuousConvMode == DISABLE) )
  800. {
  801. /* If End of Sequence is reached, disable interrupts */
  802. if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
  803. {
  804. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  805. /* ADSTART==0 (no conversion on going) */
  806. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  807. {
  808. /* Disable ADC end of single conversion interrupt on group regular */
  809. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  810. /* HAL_Start_IT(), but is not disabled here because can be used */
  811. /* by overrun IRQ process below. */
  812. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  813. /* Set ADC state */
  814. ADC_STATE_CLR_SET(hadc->State,
  815. HAL_ADC_STATE_REG_BUSY,
  816. HAL_ADC_STATE_READY);
  817. }
  818. else
  819. {
  820. /* Change ADC state to error state */
  821. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  822. /* Set ADC error code to ADC IP internal error */
  823. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  824. }
  825. }
  826. }
  827. /* Clear end of conversion flag of regular group if low power feature */
  828. /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
  829. /* until data register is read using function HAL_ADC_GetValue(). */
  830. if (hadc->Init.LowPowerAutoWait == DISABLE)
  831. {
  832. /* Clear regular group conversion flag */
  833. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
  834. }
  835. /* Return ADC state */
  836. return HAL_OK;
  837. }
  838. /**
  839. * @brief Poll for conversion event.
  840. * @param hadc ADC handle
  841. * @param EventType the ADC event type.
  842. * This parameter can be one of the following values:
  843. * @arg ADC_AWD_EVENT: ADC Analog watchdog event
  844. * @arg ADC_OVR_EVENT: ADC Overrun event
  845. * @param Timeout Timeout value in millisecond.
  846. * @retval HAL status
  847. */
  848. HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
  849. {
  850. uint32_t tickstart=0;
  851. /* Check the parameters */
  852. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  853. assert_param(IS_ADC_EVENT_TYPE(EventType));
  854. /* Get tick count */
  855. tickstart = HAL_GetTick();
  856. /* Check selected event flag */
  857. while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
  858. {
  859. /* Check if timeout is disabled (set to infinite wait) */
  860. if(Timeout != HAL_MAX_DELAY)
  861. {
  862. if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
  863. {
  864. /* Update ADC state machine to timeout */
  865. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  866. /* Process unlocked */
  867. __HAL_UNLOCK(hadc);
  868. return HAL_TIMEOUT;
  869. }
  870. }
  871. }
  872. switch(EventType)
  873. {
  874. /* Analog watchdog (level out of window) event */
  875. case ADC_AWD_EVENT:
  876. /* Set ADC state */
  877. SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
  878. /* Clear ADC analog watchdog flag */
  879. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
  880. break;
  881. /* Overrun event */
  882. default: /* Case ADC_OVR_EVENT */
  883. /* If overrun is set to overwrite previous data, overrun event is not */
  884. /* considered as an error. */
  885. /* (cf ref manual "Managing conversions without using the DMA and without */
  886. /* overrun ") */
  887. if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
  888. {
  889. /* Set ADC state */
  890. SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
  891. /* Set ADC error code to overrun */
  892. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
  893. }
  894. /* Clear ADC Overrun flag */
  895. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  896. break;
  897. }
  898. /* Return ADC state */
  899. return HAL_OK;
  900. }
  901. /**
  902. * @brief Enables ADC, starts conversion of regular group with interruption.
  903. * Interruptions enabled in this function:
  904. * - EOC (end of conversion of regular group) or EOS (end of
  905. * sequence of regular group) depending on ADC initialization
  906. * parameter "EOCSelection"
  907. * - overrun (if available)
  908. * Each of these interruptions has its dedicated callback function.
  909. * @param hadc ADC handle
  910. * @retval HAL status
  911. */
  912. HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
  913. {
  914. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  915. /* Check the parameters */
  916. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  917. /* Perform ADC enable and conversion start if no conversion is on going */
  918. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  919. {
  920. /* Process locked */
  921. __HAL_LOCK(hadc);
  922. /* Enable the ADC peripheral */
  923. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  924. /* performed automatically by hardware. */
  925. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  926. {
  927. tmp_hal_status = ADC_Enable(hadc);
  928. }
  929. /* Start conversion if ADC is effectively enabled */
  930. if (tmp_hal_status == HAL_OK)
  931. {
  932. /* Set ADC state */
  933. /* - Clear state bitfield related to regular group conversion results */
  934. /* - Set state bitfield related to regular operation */
  935. ADC_STATE_CLR_SET(hadc->State,
  936. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  937. HAL_ADC_STATE_REG_BUSY);
  938. /* Reset ADC all error code fields */
  939. ADC_CLEAR_ERRORCODE(hadc);
  940. /* Process unlocked */
  941. /* Unlock before starting ADC conversions: in case of potential */
  942. /* interruption, to let the process to ADC IRQ Handler. */
  943. __HAL_UNLOCK(hadc);
  944. /* Clear regular group conversion flag and overrun flag */
  945. /* (To ensure of no unknown state from potential previous ADC */
  946. /* operations) */
  947. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  948. /* Enable ADC end of conversion interrupt */
  949. /* Enable ADC overrun interrupt */
  950. switch(hadc->Init.EOCSelection)
  951. {
  952. case ADC_EOC_SEQ_CONV:
  953. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
  954. __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
  955. break;
  956. /* case ADC_EOC_SINGLE_CONV */
  957. default:
  958. __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
  959. break;
  960. }
  961. /* Enable conversion of regular group. */
  962. /* If software start has been selected, conversion starts immediately. */
  963. /* If external trigger has been selected, conversion will start at next */
  964. /* trigger event. */
  965. hadc->Instance->CR |= ADC_CR_ADSTART;
  966. }
  967. }
  968. else
  969. {
  970. tmp_hal_status = HAL_BUSY;
  971. }
  972. /* Return function status */
  973. return tmp_hal_status;
  974. }
  975. /**
  976. * @brief Stop ADC conversion of regular group, disable interruption of
  977. * end-of-conversion, disable ADC peripheral.
  978. * @param hadc ADC handle
  979. * @retval HAL status.
  980. */
  981. HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
  982. {
  983. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  984. /* Check the parameters */
  985. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  986. /* Process locked */
  987. __HAL_LOCK(hadc);
  988. /* 1. Stop potential conversion on going, on regular group */
  989. tmp_hal_status = ADC_ConversionStop(hadc);
  990. /* Disable ADC peripheral if conversions are effectively stopped */
  991. if (tmp_hal_status == HAL_OK)
  992. {
  993. /* Disable ADC end of conversion interrupt for regular group */
  994. /* Disable ADC overrun interrupt */
  995. __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
  996. /* 2. Disable the ADC peripheral */
  997. tmp_hal_status = ADC_Disable(hadc);
  998. /* Check if ADC is effectively disabled */
  999. if (tmp_hal_status == HAL_OK)
  1000. {
  1001. /* Set ADC state */
  1002. ADC_STATE_CLR_SET(hadc->State,
  1003. HAL_ADC_STATE_REG_BUSY,
  1004. HAL_ADC_STATE_READY);
  1005. }
  1006. }
  1007. /* Process unlocked */
  1008. __HAL_UNLOCK(hadc);
  1009. /* Return function status */
  1010. return tmp_hal_status;
  1011. }
  1012. /**
  1013. * @brief Enables ADC, starts conversion of regular group and transfers result
  1014. * through DMA.
  1015. * Interruptions enabled in this function:
  1016. * - DMA transfer complete
  1017. * - DMA half transfer
  1018. * - overrun
  1019. * Each of these interruptions has its dedicated callback function.
  1020. * @param hadc ADC handle
  1021. * @param pData The destination Buffer address.
  1022. * @param Length The length of data to be transferred from ADC peripheral to memory.
  1023. * @retval None
  1024. */
  1025. HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
  1026. {
  1027. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1028. /* Check the parameters */
  1029. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1030. /* Perform ADC enable and conversion start if no conversion is on going */
  1031. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1032. {
  1033. /* Process locked */
  1034. __HAL_LOCK(hadc);
  1035. /* Enable the ADC peripheral */
  1036. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  1037. /* performed automatically by hardware. */
  1038. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  1039. {
  1040. tmp_hal_status = ADC_Enable(hadc);
  1041. }
  1042. /* Start conversion if ADC is effectively enabled */
  1043. if (tmp_hal_status == HAL_OK)
  1044. {
  1045. /* Set ADC state */
  1046. /* - Clear state bitfield related to regular group conversion results */
  1047. /* - Set state bitfield related to regular operation */
  1048. ADC_STATE_CLR_SET(hadc->State,
  1049. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  1050. HAL_ADC_STATE_REG_BUSY);
  1051. /* Reset ADC all error code fields */
  1052. ADC_CLEAR_ERRORCODE(hadc);
  1053. /* Process unlocked */
  1054. /* Unlock before starting ADC conversions: in case of potential */
  1055. /* interruption, to let the process to ADC IRQ Handler. */
  1056. __HAL_UNLOCK(hadc);
  1057. /* Set the DMA transfer complete callback */
  1058. hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
  1059. /* Set the DMA half transfer complete callback */
  1060. hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
  1061. /* Set the DMA error callback */
  1062. hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
  1063. /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
  1064. /* start (in case of SW start): */
  1065. /* Clear regular group conversion flag and overrun flag */
  1066. /* (To ensure of no unknown state from potential previous ADC */
  1067. /* operations) */
  1068. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  1069. /* Enable ADC overrun interrupt */
  1070. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
  1071. /* Enable ADC DMA mode */
  1072. hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
  1073. /* Start the DMA channel */
  1074. HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
  1075. /* Enable conversion of regular group. */
  1076. /* If software start has been selected, conversion starts immediately. */
  1077. /* If external trigger has been selected, conversion will start at next */
  1078. /* trigger event. */
  1079. hadc->Instance->CR |= ADC_CR_ADSTART;
  1080. }
  1081. }
  1082. else
  1083. {
  1084. tmp_hal_status = HAL_BUSY;
  1085. }
  1086. /* Return function status */
  1087. return tmp_hal_status;
  1088. }
  1089. /**
  1090. * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
  1091. * ADC peripheral.
  1092. * Each of these interruptions has its dedicated callback function.
  1093. * @param hadc ADC handle
  1094. * @retval HAL status.
  1095. */
  1096. HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
  1097. {
  1098. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1099. /* Check the parameters */
  1100. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1101. /* Process locked */
  1102. __HAL_LOCK(hadc);
  1103. /* 1. Stop potential conversion on going, on regular group */
  1104. tmp_hal_status = ADC_ConversionStop(hadc);
  1105. /* Disable ADC peripheral if conversions are effectively stopped */
  1106. if (tmp_hal_status == HAL_OK)
  1107. {
  1108. /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
  1109. hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
  1110. /* Disable the DMA channel (in case of DMA in circular mode or stop while */
  1111. /* while DMA transfer is on going) */
  1112. tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
  1113. /* Check if DMA channel effectively disabled */
  1114. if (tmp_hal_status != HAL_OK)
  1115. {
  1116. /* Update ADC state machine to error */
  1117. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
  1118. }
  1119. /* Disable ADC overrun interrupt */
  1120. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
  1121. /* 2. Disable the ADC peripheral */
  1122. /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
  1123. /* in memory a potential failing status. */
  1124. if (tmp_hal_status == HAL_OK)
  1125. {
  1126. tmp_hal_status = ADC_Disable(hadc);
  1127. }
  1128. else
  1129. {
  1130. ADC_Disable(hadc);
  1131. }
  1132. /* Check if ADC is effectively disabled */
  1133. if (tmp_hal_status == HAL_OK)
  1134. {
  1135. /* Set ADC state */
  1136. ADC_STATE_CLR_SET(hadc->State,
  1137. HAL_ADC_STATE_REG_BUSY,
  1138. HAL_ADC_STATE_READY);
  1139. }
  1140. }
  1141. /* Process unlocked */
  1142. __HAL_UNLOCK(hadc);
  1143. /* Return function status */
  1144. return tmp_hal_status;
  1145. }
  1146. /**
  1147. * @brief Get ADC regular group conversion result.
  1148. * @note Reading register DR automatically clears ADC flag EOC
  1149. * (ADC group regular end of unitary conversion).
  1150. * @note This function does not clear ADC flag EOS
  1151. * (ADC group regular end of sequence conversion).
  1152. * Occurrence of flag EOS rising:
  1153. * - If sequencer is composed of 1 rank, flag EOS is equivalent
  1154. * to flag EOC.
  1155. * - If sequencer is composed of several ranks, during the scan
  1156. * sequence flag EOC only is raised, at the end of the scan sequence
  1157. * both flags EOC and EOS are raised.
  1158. * To clear this flag, either use function:
  1159. * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
  1160. * model polling: @ref HAL_ADC_PollForConversion()
  1161. * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
  1162. * @param hadc ADC handle
  1163. * @retval ADC group regular conversion data
  1164. */
  1165. uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
  1166. {
  1167. /* Check the parameters */
  1168. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1169. /* Note: EOC flag is not cleared here by software because automatically */
  1170. /* cleared by hardware when reading register DR. */
  1171. /* Return ADC converted value */
  1172. return hadc->Instance->DR;
  1173. }
  1174. /**
  1175. * @brief Handles ADC interrupt request.
  1176. * @param hadc ADC handle
  1177. * @retval None
  1178. */
  1179. void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
  1180. {
  1181. /* Check the parameters */
  1182. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1183. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  1184. assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
  1185. /* ========== Check End of Conversion flag for regular group ========== */
  1186. if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) ||
  1187. (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
  1188. {
  1189. /* Update state machine on conversion status if not in error state */
  1190. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
  1191. {
  1192. /* Set ADC state */
  1193. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  1194. }
  1195. /* Determine whether any further conversion upcoming on group regular */
  1196. /* by external trigger, continuous mode or scan sequence on going. */
  1197. if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  1198. (hadc->Init.ContinuousConvMode == DISABLE) )
  1199. {
  1200. /* If End of Sequence is reached, disable interrupts */
  1201. if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
  1202. {
  1203. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  1204. /* ADSTART==0 (no conversion on going) */
  1205. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1206. {
  1207. /* Disable ADC end of single conversion interrupt on group regular */
  1208. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  1209. /* HAL_Start_IT(), but is not disabled here because can be used */
  1210. /* by overrun IRQ process below. */
  1211. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  1212. /* Set ADC state */
  1213. ADC_STATE_CLR_SET(hadc->State,
  1214. HAL_ADC_STATE_REG_BUSY,
  1215. HAL_ADC_STATE_READY);
  1216. }
  1217. else
  1218. {
  1219. /* Change ADC state to error state */
  1220. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1221. /* Set ADC error code to ADC IP internal error */
  1222. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1223. }
  1224. }
  1225. }
  1226. /* Conversion complete callback */
  1227. /* Note: into callback, to determine if conversion has been triggered */
  1228. /* from EOC or EOS, possibility to use: */
  1229. /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
  1230. HAL_ADC_ConvCpltCallback(hadc);
  1231. /* Clear regular group conversion flag */
  1232. /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
  1233. /* conversion flags clear induces the release of the preserved data.*/
  1234. /* Therefore, if the preserved data value is needed, it must be */
  1235. /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
  1236. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) );
  1237. }
  1238. /* ========== Check Analog watchdog flags ========== */
  1239. if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
  1240. {
  1241. /* Set ADC state */
  1242. SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
  1243. /* Level out of window callback */
  1244. HAL_ADC_LevelOutOfWindowCallback(hadc);
  1245. /* Clear ADC Analog watchdog flag */
  1246. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
  1247. }
  1248. /* ========== Check Overrun flag ========== */
  1249. if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
  1250. {
  1251. /* If overrun is set to overwrite previous data (default setting), */
  1252. /* overrun event is not considered as an error. */
  1253. /* (cf ref manual "Managing conversions without using the DMA and without */
  1254. /* overrun ") */
  1255. /* Exception for usage with DMA overrun event always considered as an */
  1256. /* error. */
  1257. if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) ||
  1258. HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
  1259. {
  1260. /* Set ADC error code to overrun */
  1261. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
  1262. /* Clear ADC overrun flag */
  1263. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1264. /* Error callback */
  1265. HAL_ADC_ErrorCallback(hadc);
  1266. }
  1267. /* Clear the Overrun flag */
  1268. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1269. }
  1270. }
  1271. /**
  1272. * @brief Conversion complete callback in non blocking mode
  1273. * @param hadc ADC handle
  1274. * @retval None
  1275. */
  1276. __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
  1277. {
  1278. /* Prevent unused argument(s) compilation warning */
  1279. UNUSED(hadc);
  1280. /* NOTE : This function should not be modified. When the callback is needed,
  1281. function HAL_ADC_ConvCpltCallback must be implemented in the user file.
  1282. */
  1283. }
  1284. /**
  1285. * @brief Conversion DMA half-transfer callback in non blocking mode
  1286. * @param hadc ADC handle
  1287. * @retval None
  1288. */
  1289. __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
  1290. {
  1291. /* Prevent unused argument(s) compilation warning */
  1292. UNUSED(hadc);
  1293. /* NOTE : This function should not be modified. When the callback is needed,
  1294. function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
  1295. */
  1296. }
  1297. /**
  1298. * @brief Analog watchdog callback in non blocking mode.
  1299. * @param hadc ADC handle
  1300. * @retval None
  1301. */
  1302. __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
  1303. {
  1304. /* Prevent unused argument(s) compilation warning */
  1305. UNUSED(hadc);
  1306. /* NOTE : This function should not be modified. When the callback is needed,
  1307. function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
  1308. */
  1309. }
  1310. /**
  1311. * @brief ADC error callback in non blocking mode
  1312. * (ADC conversion with interruption or transfer by DMA)
  1313. * @param hadc ADC handle
  1314. * @retval None
  1315. */
  1316. __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
  1317. {
  1318. /* Prevent unused argument(s) compilation warning */
  1319. UNUSED(hadc);
  1320. /* NOTE : This function should not be modified. When the callback is needed,
  1321. function HAL_ADC_ErrorCallback must be implemented in the user file.
  1322. */
  1323. }
  1324. /**
  1325. * @}
  1326. */
  1327. /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
  1328. * @brief Peripheral Control functions
  1329. *
  1330. @verbatim
  1331. ===============================================================================
  1332. ##### Peripheral Control functions #####
  1333. ===============================================================================
  1334. [..] This section provides functions allowing to:
  1335. (+) Configure channels on regular group
  1336. (+) Configure the analog watchdog
  1337. @endverbatim
  1338. * @{
  1339. */
  1340. /**
  1341. * @brief Configures the the selected channel to be linked to the regular
  1342. * group.
  1343. * @note In case of usage of internal measurement channels:
  1344. * VrefInt/Vbat/TempSensor.
  1345. * Sampling time constraints must be respected (sampling time can be
  1346. * adjusted in function of ADC clock frequency and sampling time
  1347. * setting).
  1348. * Refer to device datasheet for timings values, parameters TS_vrefint,
  1349. * TS_vbat, TS_temp (values rough order: 5us to 17us).
  1350. * These internal paths can be be disabled using function
  1351. * HAL_ADC_DeInit().
  1352. * @note Possibility to update parameters on the fly:
  1353. * This function initializes channel into regular group, following
  1354. * calls to this function can be used to reconfigure some parameters
  1355. * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
  1356. * the ADC.
  1357. * The setting of these parameters is conditioned to ADC state.
  1358. * For parameters constraints, see comments of structure
  1359. * "ADC_ChannelConfTypeDef".
  1360. * @param hadc ADC handle
  1361. * @param sConfig Structure of ADC channel for regular group.
  1362. * @retval HAL status
  1363. */
  1364. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
  1365. {
  1366. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1367. __IO uint32_t wait_loop_index = 0U;
  1368. /* Check the parameters */
  1369. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1370. assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  1371. assert_param(IS_ADC_RANK(sConfig->Rank));
  1372. if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
  1373. {
  1374. assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  1375. }
  1376. /* Process locked */
  1377. __HAL_LOCK(hadc);
  1378. /* Parameters update conditioned to ADC state: */
  1379. /* Parameters that can be updated when ADC is disabled or enabled without */
  1380. /* conversion on going on regular group: */
  1381. /* - Channel number */
  1382. /* - Channel sampling time */
  1383. /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */
  1384. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1385. {
  1386. /* Configure channel: depending on rank setting, add it or remove it from */
  1387. /* ADC conversion sequencer. */
  1388. if (sConfig->Rank != ADC_RANK_NONE)
  1389. {
  1390. /* Regular sequence configuration */
  1391. /* Set the channel selection register from the selected channel */
  1392. hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel);
  1393. /* Channel sampling time configuration */
  1394. /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
  1395. /* (obsolete): sampling time set in this function with */
  1396. /* parameter "SamplingTime" (obsolete) only if not already set into */
  1397. /* ADC initialization structure with parameter "SamplingTimeCommon". */
  1398. if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
  1399. {
  1400. /* Modify sampling time if needed (not needed in case of reoccurrence */
  1401. /* for several channels programmed consecutively into the sequencer) */
  1402. if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc))
  1403. {
  1404. /* Channel sampling time configuration */
  1405. /* Clear the old sample time */
  1406. hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
  1407. /* Set the new sample time */
  1408. hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime);
  1409. }
  1410. }
  1411. /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
  1412. /* internal measurement paths enable: If internal channel selected, */
  1413. /* enable dedicated internal buffers and path. */
  1414. /* Note: these internal measurement paths can be disabled using */
  1415. /* HAL_ADC_DeInit() or removing the channel from sequencer with */
  1416. /* channel configuration parameter "Rank". */
  1417. if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
  1418. {
  1419. /* If Channel_16 is selected, enable Temp. sensor measurement path. */
  1420. /* If Channel_17 is selected, enable VREFINT measurement path. */
  1421. /* If Channel_18 is selected, enable VBAT measurement path. */
  1422. ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
  1423. /* If Temp. sensor is selected, wait for stabilization delay */
  1424. if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
  1425. {
  1426. /* Delay for temperature sensor stabilization time */
  1427. /* Compute number of CPU cycles to wait for */
  1428. wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
  1429. while(wait_loop_index != 0U)
  1430. {
  1431. wait_loop_index--;
  1432. }
  1433. }
  1434. }
  1435. }
  1436. else
  1437. {
  1438. /* Regular sequence configuration */
  1439. /* Reset the channel selection register from the selected channel */
  1440. hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel);
  1441. /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
  1442. /* internal measurement paths disable: If internal channel selected, */
  1443. /* disable dedicated internal buffers and path. */
  1444. if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
  1445. {
  1446. /* If Channel_16 is selected, disable Temp. sensor measurement path. */
  1447. /* If Channel_17 is selected, disable VREFINT measurement path. */
  1448. /* If Channel_18 is selected, disable VBAT measurement path. */
  1449. ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
  1450. }
  1451. }
  1452. }
  1453. /* If a conversion is on going on regular group, no update on regular */
  1454. /* channel could be done on neither of the channel configuration structure */
  1455. /* parameters. */
  1456. else
  1457. {
  1458. /* Update ADC state machine to error */
  1459. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1460. tmp_hal_status = HAL_ERROR;
  1461. }
  1462. /* Process unlocked */
  1463. __HAL_UNLOCK(hadc);
  1464. /* Return function status */
  1465. return tmp_hal_status;
  1466. }
  1467. /**
  1468. * @brief Configures the analog watchdog.
  1469. * @note Possibility to update parameters on the fly:
  1470. * This function initializes the selected analog watchdog, following
  1471. * calls to this function can be used to reconfigure some parameters
  1472. * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
  1473. * the ADC.
  1474. * The setting of these parameters is conditioned to ADC state.
  1475. * For parameters constraints, see comments of structure
  1476. * "ADC_AnalogWDGConfTypeDef".
  1477. * @param hadc ADC handle
  1478. * @param AnalogWDGConfig Structure of ADC analog watchdog configuration
  1479. * @retval HAL status
  1480. */
  1481. HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
  1482. {
  1483. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1484. uint32_t tmpAWDHighThresholdShifted;
  1485. uint32_t tmpAWDLowThresholdShifted;
  1486. /* Check the parameters */
  1487. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1488. assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
  1489. assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
  1490. /* Verify if threshold is within the selected ADC resolution */
  1491. assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
  1492. assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
  1493. if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
  1494. {
  1495. assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
  1496. }
  1497. /* Process locked */
  1498. __HAL_LOCK(hadc);
  1499. /* Parameters update conditioned to ADC state: */
  1500. /* Parameters that can be updated when ADC is disabled or enabled without */
  1501. /* conversion on going on regular group: */
  1502. /* - Analog watchdog channels */
  1503. /* - Analog watchdog thresholds */
  1504. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1505. {
  1506. /* Configuration of analog watchdog: */
  1507. /* - Set the analog watchdog enable mode: one or overall group of */
  1508. /* channels. */
  1509. /* - Set the Analog watchdog channel (is not used if watchdog */
  1510. /* mode "all channels": ADC_CFGR_AWD1SGL=0). */
  1511. hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
  1512. ADC_CFGR1_AWDEN |
  1513. ADC_CFGR1_AWDCH );
  1514. hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode |
  1515. ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
  1516. /* Shift the offset in function of the selected ADC resolution: Thresholds*/
  1517. /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
  1518. tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
  1519. tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
  1520. /* Set the high and low thresholds */
  1521. hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
  1522. hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
  1523. tmpAWDLowThresholdShifted );
  1524. /* Clear the ADC Analog watchdog flag (in case of left enabled by */
  1525. /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
  1526. /* or HAL_ADC_PollForEvent(). */
  1527. __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
  1528. /* Configure ADC Analog watchdog interrupt */
  1529. if(AnalogWDGConfig->ITMode == ENABLE)
  1530. {
  1531. /* Enable the ADC Analog watchdog interrupt */
  1532. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
  1533. }
  1534. else
  1535. {
  1536. /* Disable the ADC Analog watchdog interrupt */
  1537. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
  1538. }
  1539. }
  1540. /* If a conversion is on going on regular group, no update could be done */
  1541. /* on neither of the AWD configuration structure parameters. */
  1542. else
  1543. {
  1544. /* Update ADC state machine to error */
  1545. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1546. tmp_hal_status = HAL_ERROR;
  1547. }
  1548. /* Process unlocked */
  1549. __HAL_UNLOCK(hadc);
  1550. /* Return function status */
  1551. return tmp_hal_status;
  1552. }
  1553. /**
  1554. * @}
  1555. */
  1556. /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
  1557. * @brief Peripheral State functions
  1558. *
  1559. @verbatim
  1560. ===============================================================================
  1561. ##### Peripheral State and Errors functions #####
  1562. ===============================================================================
  1563. [..]
  1564. This subsection provides functions to get in run-time the status of the
  1565. peripheral.
  1566. (+) Check the ADC state
  1567. (+) Check the ADC error code
  1568. @endverbatim
  1569. * @{
  1570. */
  1571. /**
  1572. * @brief Return the ADC state
  1573. * @note ADC state machine is managed by bitfields, ADC status must be
  1574. * compared with states bits.
  1575. * For example:
  1576. * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
  1577. * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
  1578. * @param hadc ADC handle
  1579. * @retval HAL state
  1580. */
  1581. uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
  1582. {
  1583. /* Check the parameters */
  1584. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1585. /* Return ADC state */
  1586. return hadc->State;
  1587. }
  1588. /**
  1589. * @brief Return the ADC error code
  1590. * @param hadc ADC handle
  1591. * @retval ADC Error Code
  1592. */
  1593. uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
  1594. {
  1595. return hadc->ErrorCode;
  1596. }
  1597. /**
  1598. * @}
  1599. */
  1600. /**
  1601. * @}
  1602. */
  1603. /** @defgroup ADC_Private_Functions ADC Private Functions
  1604. * @{
  1605. */
  1606. /**
  1607. * @brief Enable the selected ADC.
  1608. * @note Prerequisite condition to use this function: ADC must be disabled
  1609. * and voltage regulator must be enabled (done into HAL_ADC_Init()).
  1610. * @note If low power mode AutoPowerOff is enabled, power-on/off phases are
  1611. * performed automatically by hardware.
  1612. * In this mode, this function is useless and must not be called because
  1613. * flag ADC_FLAG_RDY is not usable.
  1614. * Therefore, this function must be called under condition of
  1615. * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
  1616. * @param hadc ADC handle
  1617. * @retval HAL status.
  1618. */
  1619. static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
  1620. {
  1621. uint32_t tickstart = 0U;
  1622. __IO uint32_t wait_loop_index = 0U;
  1623. /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
  1624. /* enabling phase not yet completed: flag ADC ready not yet set). */
  1625. /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
  1626. /* causes: ADC clock not running, ...). */
  1627. if (ADC_IS_ENABLE(hadc) == RESET)
  1628. {
  1629. /* Check if conditions to enable the ADC are fulfilled */
  1630. if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
  1631. {
  1632. /* Update ADC state machine to error */
  1633. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1634. /* Set ADC error code to ADC IP internal error */
  1635. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1636. return HAL_ERROR;
  1637. }
  1638. /* Enable the ADC peripheral */
  1639. __HAL_ADC_ENABLE(hadc);
  1640. /* Delay for ADC stabilization time */
  1641. /* Compute number of CPU cycles to wait for */
  1642. wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
  1643. while(wait_loop_index != 0U)
  1644. {
  1645. wait_loop_index--;
  1646. }
  1647. /* Get tick count */
  1648. tickstart = HAL_GetTick();
  1649. /* Wait for ADC effectively enabled */
  1650. while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
  1651. {
  1652. if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
  1653. {
  1654. /* Update ADC state machine to error */
  1655. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1656. /* Set ADC error code to ADC IP internal error */
  1657. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1658. return HAL_ERROR;
  1659. }
  1660. }
  1661. }
  1662. /* Return HAL status */
  1663. return HAL_OK;
  1664. }
  1665. /**
  1666. * @brief Disable the selected ADC.
  1667. * @note Prerequisite condition to use this function: ADC conversions must be
  1668. * stopped.
  1669. * @param hadc ADC handle
  1670. * @retval HAL status.
  1671. */
  1672. static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
  1673. {
  1674. uint32_t tickstart = 0U;
  1675. /* Verification if ADC is not already disabled: */
  1676. /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
  1677. /* disabled. */
  1678. if (ADC_IS_ENABLE(hadc) != RESET)
  1679. {
  1680. /* Check if conditions to disable the ADC are fulfilled */
  1681. if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
  1682. {
  1683. /* Disable the ADC peripheral */
  1684. __HAL_ADC_DISABLE(hadc);
  1685. }
  1686. else
  1687. {
  1688. /* Update ADC state machine to error */
  1689. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1690. /* Set ADC error code to ADC IP internal error */
  1691. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1692. return HAL_ERROR;
  1693. }
  1694. /* Wait for ADC effectively disabled */
  1695. /* Get tick count */
  1696. tickstart = HAL_GetTick();
  1697. while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
  1698. {
  1699. if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
  1700. {
  1701. /* Update ADC state machine to error */
  1702. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1703. /* Set ADC error code to ADC IP internal error */
  1704. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1705. return HAL_ERROR;
  1706. }
  1707. }
  1708. }
  1709. /* Return HAL status */
  1710. return HAL_OK;
  1711. }
  1712. /**
  1713. * @brief Stop ADC conversion.
  1714. * @note Prerequisite condition to use this function: ADC conversions must be
  1715. * stopped to disable the ADC.
  1716. * @param hadc ADC handle
  1717. * @retval HAL status.
  1718. */
  1719. static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
  1720. {
  1721. uint32_t tickstart = 0U;
  1722. /* Check the parameters */
  1723. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1724. /* Verification if ADC is not already stopped on regular group to bypass */
  1725. /* this function if not needed. */
  1726. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
  1727. {
  1728. /* Stop potential conversion on going on regular group */
  1729. /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
  1730. if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
  1731. HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
  1732. {
  1733. /* Stop conversions on regular group */
  1734. hadc->Instance->CR |= ADC_CR_ADSTP;
  1735. }
  1736. /* Wait for conversion effectively stopped */
  1737. /* Get tick count */
  1738. tickstart = HAL_GetTick();
  1739. while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
  1740. {
  1741. if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
  1742. {
  1743. /* Update ADC state machine to error */
  1744. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1745. /* Set ADC error code to ADC IP internal error */
  1746. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1747. return HAL_ERROR;
  1748. }
  1749. }
  1750. }
  1751. /* Return HAL status */
  1752. return HAL_OK;
  1753. }
  1754. /**
  1755. * @brief DMA transfer complete callback.
  1756. * @param hdma pointer to DMA handle.
  1757. * @retval None
  1758. */
  1759. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
  1760. {
  1761. /* Retrieve ADC handle corresponding to current DMA handle */
  1762. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1763. /* Update state machine on conversion status if not in error state */
  1764. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
  1765. {
  1766. /* Set ADC state */
  1767. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  1768. /* Determine whether any further conversion upcoming on group regular */
  1769. /* by external trigger, continuous mode or scan sequence on going. */
  1770. if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  1771. (hadc->Init.ContinuousConvMode == DISABLE) )
  1772. {
  1773. /* If End of Sequence is reached, disable interrupts */
  1774. if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
  1775. {
  1776. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  1777. /* ADSTART==0 (no conversion on going) */
  1778. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1779. {
  1780. /* Disable ADC end of single conversion interrupt on group regular */
  1781. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  1782. /* HAL_Start_IT(), but is not disabled here because can be used */
  1783. /* by overrun IRQ process below. */
  1784. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  1785. /* Set ADC state */
  1786. ADC_STATE_CLR_SET(hadc->State,
  1787. HAL_ADC_STATE_REG_BUSY,
  1788. HAL_ADC_STATE_READY);
  1789. }
  1790. else
  1791. {
  1792. /* Change ADC state to error state */
  1793. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1794. /* Set ADC error code to ADC IP internal error */
  1795. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1796. }
  1797. }
  1798. }
  1799. /* Conversion complete callback */
  1800. HAL_ADC_ConvCpltCallback(hadc);
  1801. }
  1802. else
  1803. {
  1804. /* Call DMA error callback */
  1805. hadc->DMA_Handle->XferErrorCallback(hdma);
  1806. }
  1807. }
  1808. /**
  1809. * @brief DMA half transfer complete callback.
  1810. * @param hdma pointer to DMA handle.
  1811. * @retval None
  1812. */
  1813. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
  1814. {
  1815. /* Retrieve ADC handle corresponding to current DMA handle */
  1816. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1817. /* Half conversion callback */
  1818. HAL_ADC_ConvHalfCpltCallback(hadc);
  1819. }
  1820. /**
  1821. * @brief DMA error callback
  1822. * @param hdma pointer to DMA handle.
  1823. * @retval None
  1824. */
  1825. static void ADC_DMAError(DMA_HandleTypeDef *hdma)
  1826. {
  1827. /* Retrieve ADC handle corresponding to current DMA handle */
  1828. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1829. /* Set ADC state */
  1830. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
  1831. /* Set ADC error code to DMA error */
  1832. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
  1833. /* Error callback */
  1834. HAL_ADC_ErrorCallback(hadc);
  1835. }
  1836. /**
  1837. * @}
  1838. */
  1839. #endif /* HAL_ADC_MODULE_ENABLED */
  1840. /**
  1841. * @}
  1842. */
  1843. /**
  1844. * @}
  1845. */
  1846. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/