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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @brief DMA HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the Direct Memory Access (DMA) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral State and errors functions
  12. @verbatim
  13. ==============================================================================
  14. ##### How to use this driver #####
  15. ==============================================================================
  16. [..]
  17. (#) Enable and configure the peripheral to be connected to the DMA Channel
  18. (except for internal SRAM / FLASH memories: no initialization is
  19. necessary). Please refer to Reference manual for connection between peripherals
  20. and DMA requests .
  21. (#) For a given Channel, program the required configuration through the following parameters:
  22. Transfer Direction, Source and Destination data formats,
  23. Circular or Normal mode, Channel Priority level, Source and Destination Increment mode,
  24. using HAL_DMA_Init() function.
  25. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  26. detection.
  27. (#) Use HAL_DMA_Abort() function to abort the current transfer
  28. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  29. *** Polling mode IO operation ***
  30. =================================
  31. [..]
  32. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  33. address and destination address and the Length of data to be transferred
  34. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  35. case a fixed Timeout can be configured by User depending from his application.
  36. *** Interrupt mode IO operation ***
  37. ===================================
  38. [..]
  39. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  40. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  41. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  42. Source address and destination address and the Length of data to be transferred.
  43. In this case the DMA interrupt is configured
  44. (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  45. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  46. add his own function by customization of function pointer XferCpltCallback and
  47. XferErrorCallback (i.e a member of DMA handle structure).
  48. *** DMA HAL driver macros list ***
  49. =============================================
  50. [..]
  51. Below the list of most used macros in DMA HAL driver.
  52. [..]
  53. (@) You can refer to the DMA HAL driver header file for more useful macros
  54. @endverbatim
  55. ******************************************************************************
  56. * @attention
  57. *
  58. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  59. *
  60. * Redistribution and use in source and binary forms, with or without modification,
  61. * are permitted provided that the following conditions are met:
  62. * 1. Redistributions of source code must retain the above copyright notice,
  63. * this list of conditions and the following disclaimer.
  64. * 2. Redistributions in binary form must reproduce the above copyright notice,
  65. * this list of conditions and the following disclaimer in the documentation
  66. * and/or other materials provided with the distribution.
  67. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  68. * may be used to endorse or promote products derived from this software
  69. * without specific prior written permission.
  70. *
  71. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  72. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  73. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  75. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  76. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  77. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  78. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  79. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  80. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  81. *
  82. ******************************************************************************
  83. */
  84. /* Includes ------------------------------------------------------------------*/
  85. #include "stm32f0xx_hal.h"
  86. /** @addtogroup STM32F0xx_HAL_Driver
  87. * @{
  88. */
  89. /** @defgroup DMA DMA
  90. * @brief DMA HAL module driver
  91. * @{
  92. */
  93. #ifdef HAL_DMA_MODULE_ENABLED
  94. /* Private typedef -----------------------------------------------------------*/
  95. /* Private define ------------------------------------------------------------*/
  96. /* Private macro -------------------------------------------------------------*/
  97. /* Private variables ---------------------------------------------------------*/
  98. /* Private function prototypes -----------------------------------------------*/
  99. /** @defgroup DMA_Private_Functions DMA Private Functions
  100. * @{
  101. */
  102. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  103. static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma);
  104. /**
  105. * @}
  106. */
  107. /* Exported functions ---------------------------------------------------------*/
  108. /** @defgroup DMA_Exported_Functions DMA Exported Functions
  109. * @{
  110. */
  111. /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
  112. * @brief Initialization and de-initialization functions
  113. *
  114. @verbatim
  115. ===============================================================================
  116. ##### Initialization and de-initialization functions #####
  117. ===============================================================================
  118. [..]
  119. This section provides functions allowing to initialize the DMA Channel source
  120. and destination addresses, incrementation and data sizes, transfer direction,
  121. circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
  122. [..]
  123. The HAL_DMA_Init() function follows the DMA configuration procedures as described in
  124. reference manual.
  125. @endverbatim
  126. * @{
  127. */
  128. /**
  129. * @brief Initialize the DMA according to the specified
  130. * parameters in the DMA_InitTypeDef and initialize the associated handle.
  131. * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
  132. * the configuration information for the specified DMA Channel.
  133. * @retval HAL status
  134. */
  135. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  136. {
  137. uint32_t tmp = 0U;
  138. /* Check the DMA handle allocation */
  139. if(NULL == hdma)
  140. {
  141. return HAL_ERROR;
  142. }
  143. /* Check the parameters */
  144. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  145. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  146. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  147. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  148. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  149. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  150. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  151. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  152. /* Change DMA peripheral state */
  153. hdma->State = HAL_DMA_STATE_BUSY;
  154. /* Get the CR register value */
  155. tmp = hdma->Instance->CCR;
  156. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
  157. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
  158. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
  159. DMA_CCR_DIR));
  160. /* Prepare the DMA Channel configuration */
  161. tmp |= hdma->Init.Direction |
  162. hdma->Init.PeriphInc | hdma->Init.MemInc |
  163. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  164. hdma->Init.Mode | hdma->Init.Priority;
  165. /* Write to DMA Channel CR register */
  166. hdma->Instance->CCR = tmp;
  167. /* Initialize DmaBaseAddress and ChannelIndex parameters used
  168. by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
  169. DMA_CalcBaseAndBitshift(hdma);
  170. /* Clean callbacks */
  171. hdma->XferCpltCallback = NULL;
  172. hdma->XferHalfCpltCallback = NULL;
  173. hdma->XferErrorCallback = NULL;
  174. hdma->XferAbortCallback = NULL;
  175. /* Initialise the error code */
  176. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  177. /* Initialize the DMA state*/
  178. hdma->State = HAL_DMA_STATE_READY;
  179. /* Allocate lock resource and initialize it */
  180. hdma->Lock = HAL_UNLOCKED;
  181. return HAL_OK;
  182. }
  183. /**
  184. * @brief DeInitialize the DMA peripheral
  185. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  186. * the configuration information for the specified DMA Channel.
  187. * @retval HAL status
  188. */
  189. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  190. {
  191. /* Check the DMA handle allocation */
  192. if(NULL == hdma)
  193. {
  194. return HAL_ERROR;
  195. }
  196. /* Check the parameters */
  197. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  198. /* Disable the selected DMA Channelx */
  199. hdma->Instance->CCR &= ~DMA_CCR_EN;
  200. /* Reset DMA Channel control register */
  201. hdma->Instance->CCR = 0U;
  202. /* Reset DMA Channel Number of Data to Transfer register */
  203. hdma->Instance->CNDTR = 0U;
  204. /* Reset DMA Channel peripheral address register */
  205. hdma->Instance->CPAR = 0U;
  206. /* Reset DMA Channel memory address register */
  207. hdma->Instance->CMAR = 0U;
  208. /* Get DMA Base Address */
  209. DMA_CalcBaseAndBitshift(hdma);
  210. /* Clear all flags */
  211. hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
  212. /* Initialize the error code */
  213. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  214. /* Initialize the DMA state */
  215. hdma->State = HAL_DMA_STATE_RESET;
  216. /* Release Lock */
  217. __HAL_UNLOCK(hdma);
  218. return HAL_OK;
  219. }
  220. /**
  221. * @}
  222. */
  223. /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
  224. * @brief I/O operation functions
  225. *
  226. @verbatim
  227. ===============================================================================
  228. ##### IO operation functions #####
  229. ===============================================================================
  230. [..] This section provides functions allowing to:
  231. (+) Configure the source, destination address and data length and Start DMA transfer
  232. (+) Configure the source, destination address and data length and
  233. Start DMA transfer with interrupt
  234. (+) Abort DMA transfer
  235. (+) Poll for transfer complete
  236. (+) Handle DMA interrupt request
  237. @endverbatim
  238. * @{
  239. */
  240. /**
  241. * @brief Start the DMA Transfer.
  242. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  243. * the configuration information for the specified DMA Channel.
  244. * @param SrcAddress The source memory Buffer address
  245. * @param DstAddress The destination memory Buffer address
  246. * @param DataLength The length of data to be transferred from source to destination
  247. * @retval HAL status
  248. */
  249. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  250. {
  251. HAL_StatusTypeDef status = HAL_OK;
  252. /* Check the parameters */
  253. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  254. /* Process locked */
  255. __HAL_LOCK(hdma);
  256. if(HAL_DMA_STATE_READY == hdma->State)
  257. {
  258. /* Change DMA peripheral state */
  259. hdma->State = HAL_DMA_STATE_BUSY;
  260. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  261. /* Disable the peripheral */
  262. hdma->Instance->CCR &= ~DMA_CCR_EN;
  263. /* Configure the source, destination address and the data length */
  264. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  265. /* Enable the Peripheral */
  266. hdma->Instance->CCR |= DMA_CCR_EN;
  267. }
  268. else
  269. {
  270. /* Process Unlocked */
  271. __HAL_UNLOCK(hdma);
  272. /* Remain BUSY */
  273. status = HAL_BUSY;
  274. }
  275. return status;
  276. }
  277. /**
  278. * @brief Start the DMA Transfer with interrupt enabled.
  279. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  280. * the configuration information for the specified DMA Channel.
  281. * @param SrcAddress The source memory Buffer address
  282. * @param DstAddress The destination memory Buffer address
  283. * @param DataLength The length of data to be transferred from source to destination
  284. * @retval HAL status
  285. */
  286. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  287. {
  288. HAL_StatusTypeDef status = HAL_OK;
  289. /* Check the parameters */
  290. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  291. /* Process locked */
  292. __HAL_LOCK(hdma);
  293. if(HAL_DMA_STATE_READY == hdma->State)
  294. {
  295. /* Change DMA peripheral state */
  296. hdma->State = HAL_DMA_STATE_BUSY;
  297. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  298. /* Disable the peripheral */
  299. hdma->Instance->CCR &= ~DMA_CCR_EN;
  300. /* Configure the source, destination address and the data length */
  301. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  302. /* Enable the transfer complete, & transfer error interrupts */
  303. /* Half transfer interrupt is optional: enable it only if associated callback is available */
  304. if(NULL != hdma->XferHalfCpltCallback )
  305. {
  306. hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
  307. }
  308. else
  309. {
  310. hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE);
  311. hdma->Instance->CCR &= ~DMA_IT_HT;
  312. }
  313. /* Enable the Peripheral */
  314. hdma->Instance->CCR |= DMA_CCR_EN;
  315. }
  316. else
  317. {
  318. /* Process Unlocked */
  319. __HAL_UNLOCK(hdma);
  320. /* Remain BUSY */
  321. status = HAL_BUSY;
  322. }
  323. return status;
  324. }
  325. /**
  326. * @brief Abort the DMA Transfer.
  327. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  328. * the configuration information for the specified DMA Channel.
  329. * @retval HAL status
  330. */
  331. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  332. {
  333. /* Disable DMA IT */
  334. hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
  335. /* Disable the channel */
  336. hdma->Instance->CCR &= ~DMA_CCR_EN;
  337. /* Clear all flags */
  338. hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex);
  339. /* Change the DMA state*/
  340. hdma->State = HAL_DMA_STATE_READY;
  341. /* Process Unlocked */
  342. __HAL_UNLOCK(hdma);
  343. return HAL_OK;
  344. }
  345. /**
  346. * @brief Abort the DMA Transfer in Interrupt mode.
  347. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  348. * the configuration information for the specified DMA Stream.
  349. * @retval HAL status
  350. */
  351. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  352. {
  353. HAL_StatusTypeDef status = HAL_OK;
  354. if(HAL_DMA_STATE_BUSY != hdma->State)
  355. {
  356. /* no transfer ongoing */
  357. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  358. status = HAL_ERROR;
  359. }
  360. else
  361. {
  362. /* Disable DMA IT */
  363. hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
  364. /* Disable the channel */
  365. hdma->Instance->CCR &= ~DMA_CCR_EN;
  366. /* Clear all flags */
  367. hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
  368. /* Change the DMA state */
  369. hdma->State = HAL_DMA_STATE_READY;
  370. /* Process Unlocked */
  371. __HAL_UNLOCK(hdma);
  372. /* Call User Abort callback */
  373. if(hdma->XferAbortCallback != NULL)
  374. {
  375. hdma->XferAbortCallback(hdma);
  376. }
  377. }
  378. return status;
  379. }
  380. /**
  381. * @brief Polling for transfer complete.
  382. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  383. * the configuration information for the specified DMA Channel.
  384. * @param CompleteLevel Specifies the DMA level complete.
  385. * @param Timeout Timeout duration.
  386. * @retval HAL status
  387. */
  388. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
  389. {
  390. uint32_t temp;
  391. uint32_t tickstart = 0U;
  392. if(HAL_DMA_STATE_BUSY != hdma->State)
  393. {
  394. /* no transfer ongoing */
  395. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  396. __HAL_UNLOCK(hdma);
  397. return HAL_ERROR;
  398. }
  399. /* Polling mode not supported in circular mode */
  400. if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
  401. {
  402. hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
  403. return HAL_ERROR;
  404. }
  405. /* Get the level transfer complete flag */
  406. if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
  407. {
  408. /* Transfer Complete flag */
  409. temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
  410. }
  411. else
  412. {
  413. /* Half Transfer Complete flag */
  414. temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
  415. }
  416. /* Get tick */
  417. tickstart = HAL_GetTick();
  418. while(RESET == (hdma->DmaBaseAddress->ISR & temp))
  419. {
  420. if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex)))
  421. {
  422. /* When a DMA transfer error occurs */
  423. /* A hardware clear of its EN bits is performed */
  424. /* Clear all flags */
  425. hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
  426. /* Update error code */
  427. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  428. /* Change the DMA state */
  429. hdma->State= HAL_DMA_STATE_READY;
  430. /* Process Unlocked */
  431. __HAL_UNLOCK(hdma);
  432. return HAL_ERROR;
  433. }
  434. /* Check for the Timeout */
  435. if(Timeout != HAL_MAX_DELAY)
  436. {
  437. if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
  438. {
  439. /* Update error code */
  440. hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
  441. /* Change the DMA state */
  442. hdma->State = HAL_DMA_STATE_READY;
  443. /* Process Unlocked */
  444. __HAL_UNLOCK(hdma);
  445. return HAL_ERROR;
  446. }
  447. }
  448. }
  449. if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
  450. {
  451. /* Clear the transfer complete flag */
  452. hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
  453. /* The selected Channelx EN bit is cleared (DMA is disabled and
  454. all transfers are complete) */
  455. hdma->State = HAL_DMA_STATE_READY;
  456. }
  457. else
  458. {
  459. /* Clear the half transfer complete flag */
  460. hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
  461. }
  462. /* Process unlocked */
  463. __HAL_UNLOCK(hdma);
  464. return HAL_OK;
  465. }
  466. /**
  467. * @brief Handle DMA interrupt request.
  468. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  469. * the configuration information for the specified DMA Channel.
  470. * @retval None
  471. */
  472. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  473. {
  474. uint32_t flag_it = hdma->DmaBaseAddress->ISR;
  475. uint32_t source_it = hdma->Instance->CCR;
  476. /* Half Transfer Complete Interrupt management ******************************/
  477. if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
  478. {
  479. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  480. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  481. {
  482. /* Disable the half transfer interrupt */
  483. hdma->Instance->CCR &= ~DMA_IT_HT;
  484. }
  485. /* Clear the half transfer complete flag */
  486. hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
  487. /* DMA peripheral state is not updated in Half Transfer */
  488. /* State is updated only in Transfer Complete case */
  489. if(hdma->XferHalfCpltCallback != NULL)
  490. {
  491. /* Half transfer callback */
  492. hdma->XferHalfCpltCallback(hdma);
  493. }
  494. }
  495. /* Transfer Complete Interrupt management ***********************************/
  496. else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
  497. {
  498. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  499. {
  500. /* Disable the transfer complete & transfer error interrupts */
  501. /* if the DMA mode is not CIRCULAR */
  502. hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE);
  503. /* Change the DMA state */
  504. hdma->State = HAL_DMA_STATE_READY;
  505. }
  506. /* Clear the transfer complete flag */
  507. hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
  508. /* Process Unlocked */
  509. __HAL_UNLOCK(hdma);
  510. if(hdma->XferCpltCallback != NULL)
  511. {
  512. /* Transfer complete callback */
  513. hdma->XferCpltCallback(hdma);
  514. }
  515. }
  516. /* Transfer Error Interrupt management ***************************************/
  517. else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
  518. {
  519. /* When a DMA transfer error occurs */
  520. /* A hardware clear of its EN bits is performed */
  521. /* Then, disable all DMA interrupts */
  522. hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
  523. /* Clear all flags */
  524. hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
  525. /* Update error code */
  526. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  527. /* Change the DMA state */
  528. hdma->State = HAL_DMA_STATE_READY;
  529. /* Process Unlocked */
  530. __HAL_UNLOCK(hdma);
  531. if(hdma->XferErrorCallback != NULL)
  532. {
  533. /* Transfer error callback */
  534. hdma->XferErrorCallback(hdma);
  535. }
  536. }
  537. }
  538. /**
  539. * @brief Register callbacks
  540. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  541. * the configuration information for the specified DMA Stream.
  542. * @param CallbackID User Callback identifer
  543. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  544. * @param pCallback pointer to private callback function which has pointer to
  545. * a DMA_HandleTypeDef structure as parameter.
  546. * @retval HAL status
  547. */
  548. HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
  549. {
  550. HAL_StatusTypeDef status = HAL_OK;
  551. /* Process locked */
  552. __HAL_LOCK(hdma);
  553. if(HAL_DMA_STATE_READY == hdma->State)
  554. {
  555. switch (CallbackID)
  556. {
  557. case HAL_DMA_XFER_CPLT_CB_ID:
  558. hdma->XferCpltCallback = pCallback;
  559. break;
  560. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  561. hdma->XferHalfCpltCallback = pCallback;
  562. break;
  563. case HAL_DMA_XFER_ERROR_CB_ID:
  564. hdma->XferErrorCallback = pCallback;
  565. break;
  566. case HAL_DMA_XFER_ABORT_CB_ID:
  567. hdma->XferAbortCallback = pCallback;
  568. break;
  569. default:
  570. status = HAL_ERROR;
  571. break;
  572. }
  573. }
  574. else
  575. {
  576. status = HAL_ERROR;
  577. }
  578. /* Release Lock */
  579. __HAL_UNLOCK(hdma);
  580. return status;
  581. }
  582. /**
  583. * @brief UnRegister callbacks
  584. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  585. * the configuration information for the specified DMA Stream.
  586. * @param CallbackID User Callback identifer
  587. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  588. * @retval HAL status
  589. */
  590. HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
  591. {
  592. HAL_StatusTypeDef status = HAL_OK;
  593. /* Process locked */
  594. __HAL_LOCK(hdma);
  595. if(HAL_DMA_STATE_READY == hdma->State)
  596. {
  597. switch (CallbackID)
  598. {
  599. case HAL_DMA_XFER_CPLT_CB_ID:
  600. hdma->XferCpltCallback = NULL;
  601. break;
  602. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  603. hdma->XferHalfCpltCallback = NULL;
  604. break;
  605. case HAL_DMA_XFER_ERROR_CB_ID:
  606. hdma->XferErrorCallback = NULL;
  607. break;
  608. case HAL_DMA_XFER_ABORT_CB_ID:
  609. hdma->XferAbortCallback = NULL;
  610. break;
  611. case HAL_DMA_XFER_ALL_CB_ID:
  612. hdma->XferCpltCallback = NULL;
  613. hdma->XferHalfCpltCallback = NULL;
  614. hdma->XferErrorCallback = NULL;
  615. hdma->XferAbortCallback = NULL;
  616. break;
  617. default:
  618. status = HAL_ERROR;
  619. break;
  620. }
  621. }
  622. else
  623. {
  624. status = HAL_ERROR;
  625. }
  626. /* Release Lock */
  627. __HAL_UNLOCK(hdma);
  628. return status;
  629. }
  630. /**
  631. * @}
  632. */
  633. /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
  634. * @brief Peripheral State functions
  635. *
  636. @verbatim
  637. ===============================================================================
  638. ##### State and Errors functions #####
  639. ===============================================================================
  640. [..]
  641. This subsection provides functions allowing to
  642. (+) Check the DMA state
  643. (+) Get error code
  644. @endverbatim
  645. * @{
  646. */
  647. /**
  648. * @brief Returns the DMA state.
  649. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  650. * the configuration information for the specified DMA Channel.
  651. * @retval HAL state
  652. */
  653. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  654. {
  655. return hdma->State;
  656. }
  657. /**
  658. * @brief Return the DMA error code
  659. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  660. * the configuration information for the specified DMA Channel.
  661. * @retval DMA Error Code
  662. */
  663. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  664. {
  665. return hdma->ErrorCode;
  666. }
  667. /**
  668. * @}
  669. */
  670. /**
  671. * @}
  672. */
  673. /** @addtogroup DMA_Private_Functions
  674. * @{
  675. */
  676. /**
  677. * @brief Set the DMA Transfer parameters.
  678. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  679. * the configuration information for the specified DMA Channel.
  680. * @param SrcAddress The source memory Buffer address
  681. * @param DstAddress The destination memory Buffer address
  682. * @param DataLength The length of data to be transferred from source to destination
  683. * @retval HAL status
  684. */
  685. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  686. {
  687. /* Clear all flags */
  688. hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex);
  689. /* Configure DMA Channel data length */
  690. hdma->Instance->CNDTR = DataLength;
  691. /* Memory to Peripheral */
  692. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  693. {
  694. /* Configure DMA Channel destination address */
  695. hdma->Instance->CPAR = DstAddress;
  696. /* Configure DMA Channel source address */
  697. hdma->Instance->CMAR = SrcAddress;
  698. }
  699. /* Peripheral to Memory */
  700. else
  701. {
  702. /* Configure DMA Channel source address */
  703. hdma->Instance->CPAR = SrcAddress;
  704. /* Configure DMA Channel destination address */
  705. hdma->Instance->CMAR = DstAddress;
  706. }
  707. }
  708. /**
  709. * @brief set the DMA base address and channel index depending on DMA instance
  710. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  711. * the configuration information for the specified DMA Stream.
  712. * @retval None
  713. */
  714. static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
  715. {
  716. #if defined (DMA2)
  717. /* calculation of the channel index */
  718. if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
  719. {
  720. /* DMA1 */
  721. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
  722. hdma->DmaBaseAddress = DMA1;
  723. }
  724. else
  725. {
  726. /* DMA2 */
  727. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
  728. hdma->DmaBaseAddress = DMA2;
  729. }
  730. #else
  731. /* calculation of the channel index */
  732. /* DMA1 */
  733. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
  734. hdma->DmaBaseAddress = DMA1;
  735. #endif
  736. }
  737. /**
  738. * @}
  739. */
  740. /**
  741. * @}
  742. */
  743. #endif /* HAL_DMA_MODULE_ENABLED */
  744. /**
  745. * @}
  746. */
  747. /**
  748. * @}
  749. */
  750. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/