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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_ll_rcc.c
  4. * @author MCD Application Team
  5. * @brief RCC LL module driver.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. #if defined(USE_FULL_LL_DRIVER)
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32f0xx_ll_rcc.h"
  38. #ifdef USE_FULL_ASSERT
  39. #include "stm32_assert.h"
  40. #else
  41. #define assert_param(expr) ((void)0U)
  42. #endif /* USE_FULL_ASSERT */
  43. /** @addtogroup STM32F0xx_LL_Driver
  44. * @{
  45. */
  46. #if defined(RCC)
  47. /** @defgroup RCC_LL RCC
  48. * @{
  49. */
  50. /* Private types -------------------------------------------------------------*/
  51. /* Private variables ---------------------------------------------------------*/
  52. /* Private constants ---------------------------------------------------------*/
  53. /* Private macros ------------------------------------------------------------*/
  54. /** @addtogroup RCC_LL_Private_Macros
  55. * @{
  56. */
  57. #if defined(RCC_CFGR3_USART2SW) && defined(RCC_CFGR3_USART3SW)
  58. #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
  59. || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE) \
  60. || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE))
  61. #elif defined(RCC_CFGR3_USART2SW) && !defined(RCC_CFGR3_USART3SW)
  62. #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
  63. || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE))
  64. #elif defined(RCC_CFGR3_USART3SW) && !defined(RCC_CFGR3_USART2SW)
  65. #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
  66. || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE))
  67. #else
  68. #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE))
  69. #endif /* RCC_CFGR3_USART2SW && RCC_CFGR3_USART3SW */
  70. #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_I2C1_CLKSOURCE)
  71. #if defined(USB)
  72. #define IS_LL_RCC_USB_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USB_CLKSOURCE))
  73. #endif /* USB */
  74. #if defined(CEC)
  75. #define IS_LL_RCC_CEC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_CEC_CLKSOURCE))
  76. #endif /* CEC */
  77. /**
  78. * @}
  79. */
  80. /* Private function prototypes -----------------------------------------------*/
  81. /** @defgroup RCC_LL_Private_Functions RCC Private functions
  82. * @{
  83. */
  84. uint32_t RCC_GetSystemClockFreq(void);
  85. uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
  86. uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
  87. uint32_t RCC_PLL_GetFreqDomain_SYS(void);
  88. /**
  89. * @}
  90. */
  91. /* Exported functions --------------------------------------------------------*/
  92. /** @addtogroup RCC_LL_Exported_Functions
  93. * @{
  94. */
  95. /** @addtogroup RCC_LL_EF_Init
  96. * @{
  97. */
  98. /**
  99. * @brief Reset the RCC clock configuration to the default reset state.
  100. * @note The default reset state of the clock configuration is given below:
  101. * - HSI ON and used as system clock source
  102. * - HSE and PLL OFF
  103. * - AHB and APB1 prescaler set to 1.
  104. * - CSS, MCO OFF
  105. * - All interrupts disabled
  106. * @note This function doesn't modify the configuration of the
  107. * - Peripheral clocks
  108. * - LSI, LSE and RTC clocks
  109. * @retval An ErrorStatus enumeration value:
  110. * - SUCCESS: RCC registers are de-initialized
  111. * - ERROR: not applicable
  112. */
  113. ErrorStatus LL_RCC_DeInit(void)
  114. {
  115. uint32_t vl_mask = 0U;
  116. /* Set HSION bit */
  117. LL_RCC_HSI_Enable();
  118. /* Set HSITRIM bits to the reset value*/
  119. LL_RCC_HSI_SetCalibTrimming(0x10U);
  120. /* Reset SW, HPRE, PPRE and MCOSEL bits */
  121. vl_mask = 0xFFFFFFFFU;
  122. CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCOSEL));
  123. LL_RCC_WriteReg(CFGR, vl_mask);
  124. /* Reset HSEON, CSSON, PLLON bits */
  125. vl_mask = 0xFFFFFFFFU;
  126. CLEAR_BIT(vl_mask, (RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON));
  127. LL_RCC_WriteReg(CR, vl_mask);
  128. /* Reset HSEBYP bit */
  129. LL_RCC_HSE_DisableBypass();
  130. /* Reset CFGR register */
  131. LL_RCC_WriteReg(CFGR, 0x00000000U);
  132. #if defined(RCC_HSI48_SUPPORT)
  133. /* Reset CR2 register */
  134. LL_RCC_WriteReg(CR2, 0x00000000U);
  135. /* Disable HSI48 */
  136. LL_RCC_HSI48_Disable();
  137. #endif /*RCC_HSI48_SUPPORT*/
  138. /* Set HSI14TRIM/HSI14ON/HSI14DIS bits to the reset value*/
  139. LL_RCC_HSI14_SetCalibTrimming(0x10U);
  140. LL_RCC_HSI14_Disable();
  141. LL_RCC_HSI14_EnableADCControl();
  142. /* Reset CFGR2 register */
  143. LL_RCC_WriteReg(CFGR2, 0x00000000U);
  144. /* Reset CFGR3 register */
  145. LL_RCC_WriteReg(CFGR3, 0x00000000U);
  146. /* Clear pending flags */
  147. #if defined(RCC_HSI48_SUPPORT)
  148. vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_HSI14RDYC | LL_RCC_CIR_HSI48RDYC | LL_RCC_CIR_CSSC);
  149. #else
  150. vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_HSI14RDYC | LL_RCC_CIR_CSSC);
  151. #endif /* RCC_HSI48_SUPPORT */
  152. SET_BIT(RCC->CIR, vl_mask);
  153. /* Disable all interrupts */
  154. LL_RCC_WriteReg(CIR, 0x00000000U);
  155. return SUCCESS;
  156. }
  157. /**
  158. * @}
  159. */
  160. /** @addtogroup RCC_LL_EF_Get_Freq
  161. * @brief Return the frequencies of different on chip clocks; System, AHB and APB1 buses clocks
  162. * and different peripheral clocks available on the device.
  163. * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
  164. * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
  165. * @note If SYSCLK source is PLL, function returns values based on
  166. * HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
  167. * @note (**) HSI_VALUE is a defined constant but the real value may vary
  168. * depending on the variations in voltage and temperature.
  169. * @note (***) HSE_VALUE is a defined constant, user has to ensure that
  170. * HSE_VALUE is same as the real frequency of the crystal used.
  171. * Otherwise, this function may have wrong result.
  172. * @note The result of this function could be incorrect when using fractional
  173. * value for HSE crystal.
  174. * @note This function can be used by the user application to compute the
  175. * baud-rate for the communication peripherals or configure other parameters.
  176. * @{
  177. */
  178. /**
  179. * @brief Return the frequencies of different on chip clocks; System, AHB and APB1 buses clocks
  180. * @note Each time SYSCLK, HCLK and/or PCLK1 clock changes, this function
  181. * must be called to update structure fields. Otherwise, any
  182. * configuration based on this function will be incorrect.
  183. * @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
  184. * @retval None
  185. */
  186. void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
  187. {
  188. /* Get SYSCLK frequency */
  189. RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
  190. /* HCLK clock frequency */
  191. RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
  192. /* PCLK1 clock frequency */
  193. RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
  194. }
  195. /**
  196. * @brief Return USARTx clock frequency
  197. * @param USARTxSource This parameter can be one of the following values:
  198. * @arg @ref LL_RCC_USART1_CLKSOURCE
  199. * @arg @ref LL_RCC_USART2_CLKSOURCE (*)
  200. * @arg @ref LL_RCC_USART3_CLKSOURCE (*)
  201. *
  202. * (*) value not defined in all devices.
  203. * @retval USART clock frequency (in Hz)
  204. * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
  205. */
  206. uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource)
  207. {
  208. uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
  209. /* Check parameter */
  210. assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource));
  211. #if defined(RCC_CFGR3_USART1SW)
  212. if (USARTxSource == LL_RCC_USART1_CLKSOURCE)
  213. {
  214. /* USART1CLK clock frequency */
  215. switch (LL_RCC_GetUSARTClockSource(USARTxSource))
  216. {
  217. case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */
  218. usart_frequency = RCC_GetSystemClockFreq();
  219. break;
  220. case LL_RCC_USART1_CLKSOURCE_HSI: /* USART1 Clock is HSI Osc. */
  221. if (LL_RCC_HSI_IsReady())
  222. {
  223. usart_frequency = HSI_VALUE;
  224. }
  225. break;
  226. case LL_RCC_USART1_CLKSOURCE_LSE: /* USART1 Clock is LSE Osc. */
  227. if (LL_RCC_LSE_IsReady())
  228. {
  229. usart_frequency = LSE_VALUE;
  230. }
  231. break;
  232. case LL_RCC_USART1_CLKSOURCE_PCLK1: /* USART1 Clock is PCLK1 */
  233. default:
  234. usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
  235. break;
  236. }
  237. }
  238. #endif /* RCC_CFGR3_USART1SW */
  239. #if defined(RCC_CFGR3_USART2SW)
  240. if (USARTxSource == LL_RCC_USART2_CLKSOURCE)
  241. {
  242. /* USART2CLK clock frequency */
  243. switch (LL_RCC_GetUSARTClockSource(USARTxSource))
  244. {
  245. case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */
  246. usart_frequency = RCC_GetSystemClockFreq();
  247. break;
  248. case LL_RCC_USART2_CLKSOURCE_HSI: /* USART2 Clock is HSI Osc. */
  249. if (LL_RCC_HSI_IsReady())
  250. {
  251. usart_frequency = HSI_VALUE;
  252. }
  253. break;
  254. case LL_RCC_USART2_CLKSOURCE_LSE: /* USART2 Clock is LSE Osc. */
  255. if (LL_RCC_LSE_IsReady())
  256. {
  257. usart_frequency = LSE_VALUE;
  258. }
  259. break;
  260. case LL_RCC_USART2_CLKSOURCE_PCLK1: /* USART2 Clock is PCLK1 */
  261. default:
  262. usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
  263. break;
  264. }
  265. }
  266. #endif /* RCC_CFGR3_USART2SW */
  267. #if defined(RCC_CFGR3_USART3SW)
  268. if (USARTxSource == LL_RCC_USART3_CLKSOURCE)
  269. {
  270. /* USART3CLK clock frequency */
  271. switch (LL_RCC_GetUSARTClockSource(USARTxSource))
  272. {
  273. case LL_RCC_USART3_CLKSOURCE_SYSCLK: /* USART3 Clock is System Clock */
  274. usart_frequency = RCC_GetSystemClockFreq();
  275. break;
  276. case LL_RCC_USART3_CLKSOURCE_HSI: /* USART3 Clock is HSI Osc. */
  277. if (LL_RCC_HSI_IsReady())
  278. {
  279. usart_frequency = HSI_VALUE;
  280. }
  281. break;
  282. case LL_RCC_USART3_CLKSOURCE_LSE: /* USART3 Clock is LSE Osc. */
  283. if (LL_RCC_LSE_IsReady())
  284. {
  285. usart_frequency = LSE_VALUE;
  286. }
  287. break;
  288. case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */
  289. default:
  290. usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
  291. break;
  292. }
  293. }
  294. #endif /* RCC_CFGR3_USART3SW */
  295. return usart_frequency;
  296. }
  297. /**
  298. * @brief Return I2Cx clock frequency
  299. * @param I2CxSource This parameter can be one of the following values:
  300. * @arg @ref LL_RCC_I2C1_CLKSOURCE
  301. * @retval I2C clock frequency (in Hz)
  302. * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready
  303. */
  304. uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource)
  305. {
  306. uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
  307. /* Check parameter */
  308. assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource));
  309. /* I2C1 CLK clock frequency */
  310. if (I2CxSource == LL_RCC_I2C1_CLKSOURCE)
  311. {
  312. switch (LL_RCC_GetI2CClockSource(I2CxSource))
  313. {
  314. case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */
  315. i2c_frequency = RCC_GetSystemClockFreq();
  316. break;
  317. case LL_RCC_I2C1_CLKSOURCE_HSI: /* I2C1 Clock is HSI Osc. */
  318. default:
  319. if (LL_RCC_HSI_IsReady())
  320. {
  321. i2c_frequency = HSI_VALUE;
  322. }
  323. break;
  324. }
  325. }
  326. return i2c_frequency;
  327. }
  328. #if defined(USB)
  329. /**
  330. * @brief Return USBx clock frequency
  331. * @param USBxSource This parameter can be one of the following values:
  332. * @arg @ref LL_RCC_USB_CLKSOURCE
  333. * @retval USB clock frequency (in Hz)
  334. * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready
  335. * @arg @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
  336. */
  337. uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
  338. {
  339. uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
  340. /* Check parameter */
  341. assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
  342. /* USBCLK clock frequency */
  343. switch (LL_RCC_GetUSBClockSource(USBxSource))
  344. {
  345. case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */
  346. if (LL_RCC_PLL_IsReady())
  347. {
  348. usb_frequency = RCC_PLL_GetFreqDomain_SYS();
  349. }
  350. break;
  351. #if defined(RCC_CFGR3_USBSW_HSI48)
  352. case LL_RCC_USB_CLKSOURCE_HSI48: /* HSI48 clock used as USB clock source */
  353. default:
  354. if (LL_RCC_HSI48_IsReady())
  355. {
  356. usb_frequency = HSI48_VALUE;
  357. }
  358. break;
  359. #else
  360. case LL_RCC_USB_CLKSOURCE_NONE: /* No clock used as USB clock source */
  361. default:
  362. usb_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
  363. break;
  364. #endif /* RCC_CFGR3_USBSW_HSI48 */
  365. }
  366. return usb_frequency;
  367. }
  368. #endif /* USB */
  369. #if defined(CEC)
  370. /**
  371. * @brief Return CECx clock frequency
  372. * @param CECxSource This parameter can be one of the following values:
  373. * @arg @ref LL_RCC_CEC_CLKSOURCE
  374. * @retval CEC clock frequency (in Hz)
  375. * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillators (HSI or LSE) are not ready
  376. */
  377. uint32_t LL_RCC_GetCECClockFreq(uint32_t CECxSource)
  378. {
  379. uint32_t cec_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
  380. /* Check parameter */
  381. assert_param(IS_LL_RCC_CEC_CLKSOURCE(CECxSource));
  382. /* CECCLK clock frequency */
  383. switch (LL_RCC_GetCECClockSource(CECxSource))
  384. {
  385. case LL_RCC_CEC_CLKSOURCE_HSI_DIV244: /* HSI / 244 clock used as CEC clock source */
  386. if (LL_RCC_HSI_IsReady())
  387. {
  388. cec_frequency = HSI_VALUE / 244U;
  389. }
  390. break;
  391. case LL_RCC_CEC_CLKSOURCE_LSE: /* LSE clock used as CEC clock source */
  392. default:
  393. if (LL_RCC_LSE_IsReady())
  394. {
  395. cec_frequency = LSE_VALUE;
  396. }
  397. break;
  398. }
  399. return cec_frequency;
  400. }
  401. #endif /* CEC */
  402. /**
  403. * @}
  404. */
  405. /**
  406. * @}
  407. */
  408. /** @addtogroup RCC_LL_Private_Functions
  409. * @{
  410. */
  411. /**
  412. * @brief Return SYSTEM clock frequency
  413. * @retval SYSTEM clock frequency (in Hz)
  414. */
  415. uint32_t RCC_GetSystemClockFreq(void)
  416. {
  417. uint32_t frequency = 0U;
  418. /* Get SYSCLK source -------------------------------------------------------*/
  419. switch (LL_RCC_GetSysClkSource())
  420. {
  421. case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
  422. frequency = HSI_VALUE;
  423. break;
  424. case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
  425. frequency = HSE_VALUE;
  426. break;
  427. case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */
  428. frequency = RCC_PLL_GetFreqDomain_SYS();
  429. break;
  430. #if defined(RCC_HSI48_SUPPORT)
  431. case LL_RCC_SYS_CLKSOURCE_STATUS_HSI48:/* HSI48 used as system clock source */
  432. frequency = HSI48_VALUE;
  433. break;
  434. #endif /* RCC_HSI48_SUPPORT */
  435. default:
  436. frequency = HSI_VALUE;
  437. break;
  438. }
  439. return frequency;
  440. }
  441. /**
  442. * @brief Return HCLK clock frequency
  443. * @param SYSCLK_Frequency SYSCLK clock frequency
  444. * @retval HCLK clock frequency (in Hz)
  445. */
  446. uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
  447. {
  448. /* HCLK clock frequency */
  449. return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
  450. }
  451. /**
  452. * @brief Return PCLK1 clock frequency
  453. * @param HCLK_Frequency HCLK clock frequency
  454. * @retval PCLK1 clock frequency (in Hz)
  455. */
  456. uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
  457. {
  458. /* PCLK1 clock frequency */
  459. return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
  460. }
  461. /**
  462. * @brief Return PLL clock frequency used for system domain
  463. * @retval PLL clock frequency (in Hz)
  464. */
  465. uint32_t RCC_PLL_GetFreqDomain_SYS(void)
  466. {
  467. uint32_t pllinputfreq = 0U, pllsource = 0U;
  468. /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
  469. /* Get PLL source */
  470. pllsource = LL_RCC_PLL_GetMainSource();
  471. switch (pllsource)
  472. {
  473. #if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
  474. case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
  475. pllinputfreq = HSI_VALUE;
  476. #else
  477. case LL_RCC_PLLSOURCE_HSI_DIV_2: /* HSI used as PLL clock source */
  478. pllinputfreq = HSI_VALUE / 2U;
  479. #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
  480. break;
  481. #if defined(RCC_HSI48_SUPPORT)
  482. case LL_RCC_PLLSOURCE_HSI48: /* HSI48 used as PLL clock source */
  483. pllinputfreq = HSI48_VALUE;
  484. break;
  485. #endif /* RCC_HSI48_SUPPORT */
  486. case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
  487. pllinputfreq = HSE_VALUE;
  488. break;
  489. default:
  490. #if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
  491. pllinputfreq = HSI_VALUE;
  492. #else
  493. pllinputfreq = HSI_VALUE / 2U;
  494. #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
  495. break;
  496. }
  497. #if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
  498. return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetPrediv());
  499. #else
  500. return __LL_RCC_CALC_PLLCLK_FREQ((pllinputfreq / (LL_RCC_PLL_GetPrediv() + 1U)), LL_RCC_PLL_GetMultiplicator());
  501. #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
  502. }
  503. /**
  504. * @}
  505. */
  506. /**
  507. * @}
  508. */
  509. #endif /* defined(RCC) */
  510. /**
  511. * @}
  512. */
  513. #endif /* USE_FULL_LL_DRIVER */
  514. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/