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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_ll_spi.c
  4. * @author MCD Application Team
  5. * @brief SPI LL module driver.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. #if defined(USE_FULL_LL_DRIVER)
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32f0xx_ll_spi.h"
  38. #include "stm32f0xx_ll_bus.h"
  39. #include "stm32f0xx_ll_rcc.h"
  40. #ifdef USE_FULL_ASSERT
  41. #include "stm32_assert.h"
  42. #else
  43. #define assert_param(expr) ((void)0U)
  44. #endif
  45. /** @addtogroup STM32F0xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (SPI1) || defined (SPI2)
  49. /** @addtogroup SPI_LL
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /** @defgroup SPI_LL_Private_Constants SPI Private Constants
  56. * @{
  57. */
  58. /* SPI registers Masks */
  59. #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
  60. SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \
  61. SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \
  62. SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \
  63. SPI_CR1_BIDIMODE)
  64. /**
  65. * @}
  66. */
  67. /* Private macros ------------------------------------------------------------*/
  68. /** @defgroup SPI_LL_Private_Macros SPI Private Macros
  69. * @{
  70. */
  71. #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \
  72. || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \
  73. || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
  74. || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
  75. #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
  76. || ((__VALUE__) == LL_SPI_MODE_SLAVE))
  77. #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \
  78. || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \
  79. || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \
  80. || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \
  81. || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \
  82. || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \
  83. || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
  84. || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
  85. || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
  86. || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
  87. || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
  88. || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
  89. || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
  90. #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
  91. || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
  92. #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
  93. || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
  94. #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
  95. || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
  96. || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
  97. #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \
  98. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \
  99. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \
  100. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \
  101. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \
  102. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \
  103. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
  104. || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
  105. #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
  106. || ((__VALUE__) == LL_SPI_MSB_FIRST))
  107. #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
  108. || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
  109. #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
  110. /**
  111. * @}
  112. */
  113. /* Private function prototypes -----------------------------------------------*/
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @addtogroup SPI_LL_Exported_Functions
  116. * @{
  117. */
  118. /** @addtogroup SPI_LL_EF_Init
  119. * @{
  120. */
  121. /**
  122. * @brief De-initialize the SPI registers to their default reset values.
  123. * @param SPIx SPI Instance
  124. * @retval An ErrorStatus enumeration value:
  125. * - SUCCESS: SPI registers are de-initialized
  126. * - ERROR: SPI registers are not de-initialized
  127. */
  128. ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
  129. {
  130. ErrorStatus status = ERROR;
  131. /* Check the parameters */
  132. assert_param(IS_SPI_ALL_INSTANCE(SPIx));
  133. #if defined(SPI1)
  134. if (SPIx == SPI1)
  135. {
  136. /* Force reset of SPI clock */
  137. LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_SPI1);
  138. /* Release reset of SPI clock */
  139. LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_SPI1);
  140. status = SUCCESS;
  141. }
  142. #endif /* SPI1 */
  143. #if defined(SPI2)
  144. if (SPIx == SPI2)
  145. {
  146. /* Force reset of SPI clock */
  147. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
  148. /* Release reset of SPI clock */
  149. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
  150. status = SUCCESS;
  151. }
  152. #endif /* SPI2 */
  153. return status;
  154. }
  155. /**
  156. * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
  157. * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
  158. * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  159. * @param SPIx SPI Instance
  160. * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
  161. * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
  162. */
  163. ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
  164. {
  165. ErrorStatus status = ERROR;
  166. /* Check the SPI Instance SPIx*/
  167. assert_param(IS_SPI_ALL_INSTANCE(SPIx));
  168. /* Check the SPI parameters from SPI_InitStruct*/
  169. assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
  170. assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
  171. assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
  172. assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
  173. assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
  174. assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
  175. assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
  176. assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
  177. assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
  178. if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
  179. {
  180. /*---------------------------- SPIx CR1 Configuration ------------------------
  181. * Configure SPIx CR1 with parameters:
  182. * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
  183. * - Master/Slave Mode: SPI_CR1_MSTR bit
  184. * - ClockPolarity: SPI_CR1_CPOL bit
  185. * - ClockPhase: SPI_CR1_CPHA bit
  186. * - NSS management: SPI_CR1_SSM bit
  187. * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
  188. * - BitOrder: SPI_CR1_LSBFIRST bit
  189. * - CRCCalculation: SPI_CR1_CRCEN bit
  190. */
  191. MODIFY_REG(SPIx->CR1,
  192. SPI_CR1_CLEAR_MASK,
  193. SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
  194. SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
  195. SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
  196. SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
  197. /*---------------------------- SPIx CR2 Configuration ------------------------
  198. * Configure SPIx CR2 with parameters:
  199. * - DataWidth: DS[3:0] bits
  200. * - NSS management: SSOE bit
  201. */
  202. MODIFY_REG(SPIx->CR2,
  203. SPI_CR2_DS | SPI_CR2_SSOE,
  204. SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
  205. /*---------------------------- SPIx CRCPR Configuration ----------------------
  206. * Configure SPIx CRCPR with parameters:
  207. * - CRCPoly: CRCPOLY[15:0] bits
  208. */
  209. if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
  210. {
  211. assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
  212. LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
  213. }
  214. status = SUCCESS;
  215. }
  216. #if defined (SPI_I2S_SUPPORT)
  217. /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
  218. CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  219. #endif /* SPI_I2S_SUPPORT */
  220. return status;
  221. }
  222. /**
  223. * @brief Set each @ref LL_SPI_InitTypeDef field to default value.
  224. * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
  225. * whose fields will be set to default values.
  226. * @retval None
  227. */
  228. void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
  229. {
  230. /* Set SPI_InitStruct fields to default values */
  231. SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
  232. SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE;
  233. SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT;
  234. SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW;
  235. SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE;
  236. SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT;
  237. SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
  238. SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST;
  239. SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
  240. SPI_InitStruct->CRCPoly = 7U;
  241. }
  242. /**
  243. * @}
  244. */
  245. /**
  246. * @}
  247. */
  248. /**
  249. * @}
  250. */
  251. #if defined(SPI_I2S_SUPPORT)
  252. /** @addtogroup I2S_LL
  253. * @{
  254. */
  255. /* Private types -------------------------------------------------------------*/
  256. /* Private variables ---------------------------------------------------------*/
  257. /* Private constants ---------------------------------------------------------*/
  258. /** @defgroup I2S_LL_Private_Constants I2S Private Constants
  259. * @{
  260. */
  261. /* I2S registers Masks */
  262. #define I2S_I2SCFGR_CLEAR_MASK (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \
  263. SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD | \
  264. SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD )
  265. #define I2S_I2SPR_CLEAR_MASK 0x0002U
  266. /**
  267. * @}
  268. */
  269. /* Private macros ------------------------------------------------------------*/
  270. /** @defgroup I2S_LL_Private_Macros I2S Private Macros
  271. * @{
  272. */
  273. #define IS_LL_I2S_DATAFORMAT(__VALUE__) (((__VALUE__) == LL_I2S_DATAFORMAT_16B) \
  274. || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
  275. || ((__VALUE__) == LL_I2S_DATAFORMAT_24B) \
  276. || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
  277. #define IS_LL_I2S_CPOL(__VALUE__) (((__VALUE__) == LL_I2S_POLARITY_LOW) \
  278. || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
  279. #define IS_LL_I2S_STANDARD(__VALUE__) (((__VALUE__) == LL_I2S_STANDARD_PHILIPS) \
  280. || ((__VALUE__) == LL_I2S_STANDARD_MSB) \
  281. || ((__VALUE__) == LL_I2S_STANDARD_LSB) \
  282. || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
  283. || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
  284. #define IS_LL_I2S_MODE(__VALUE__) (((__VALUE__) == LL_I2S_MODE_SLAVE_TX) \
  285. || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX) \
  286. || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
  287. || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
  288. #define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
  289. || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
  290. #define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K) \
  291. && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
  292. || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
  293. #define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__) ((__VALUE__) >= 0x2U)
  294. #define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
  295. || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
  296. /**
  297. * @}
  298. */
  299. /* Private function prototypes -----------------------------------------------*/
  300. /* Exported functions --------------------------------------------------------*/
  301. /** @addtogroup I2S_LL_Exported_Functions
  302. * @{
  303. */
  304. /** @addtogroup I2S_LL_EF_Init
  305. * @{
  306. */
  307. /**
  308. * @brief De-initialize the SPI/I2S registers to their default reset values.
  309. * @param SPIx SPI Instance
  310. * @retval An ErrorStatus enumeration value:
  311. * - SUCCESS: SPI registers are de-initialized
  312. * - ERROR: SPI registers are not de-initialized
  313. */
  314. ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
  315. {
  316. return LL_SPI_DeInit(SPIx);
  317. }
  318. /**
  319. * @brief Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
  320. * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
  321. * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  322. * @param SPIx SPI Instance
  323. * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
  324. * @retval An ErrorStatus enumeration value:
  325. * - SUCCESS: SPI registers are Initialized
  326. * - ERROR: SPI registers are not Initialized
  327. */
  328. ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
  329. {
  330. uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
  331. uint32_t tmp = 0U;
  332. LL_RCC_ClocksTypeDef rcc_clocks;
  333. uint32_t sourceclock = 0U;
  334. ErrorStatus status = ERROR;
  335. /* Check the I2S parameters */
  336. assert_param(IS_I2S_ALL_INSTANCE(SPIx));
  337. assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
  338. assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
  339. assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
  340. assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
  341. assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
  342. assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
  343. if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
  344. {
  345. /*---------------------------- SPIx I2SCFGR Configuration --------------------
  346. * Configure SPIx I2SCFGR with parameters:
  347. * - Mode: SPI_I2SCFGR_I2SCFG[1:0] bit
  348. * - Standard: SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
  349. * - DataFormat: SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
  350. * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
  351. */
  352. /* Write to SPIx I2SCFGR */
  353. MODIFY_REG(SPIx->I2SCFGR,
  354. I2S_I2SCFGR_CLEAR_MASK,
  355. I2S_InitStruct->Mode | I2S_InitStruct->Standard |
  356. I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
  357. SPI_I2SCFGR_I2SMOD);
  358. /*---------------------------- SPIx I2SPR Configuration ----------------------
  359. * Configure SPIx I2SPR with parameters:
  360. * - MCLKOutput: SPI_I2SPR_MCKOE bit
  361. * - AudioFreq: SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
  362. */
  363. /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
  364. * else, default values are used: i2sodd = 0U, i2sdiv = 2U.
  365. */
  366. if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
  367. {
  368. /* Check the frame length (For the Prescaler computing)
  369. * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
  370. */
  371. if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
  372. {
  373. /* Packet length is 32 bits */
  374. packetlength = 2U;
  375. }
  376. /* I2S Clock source is System clock: Get System Clock frequency */
  377. LL_RCC_GetSystemClocksFreq(&rcc_clocks);
  378. /* Get the source clock value: based on System Clock value */
  379. sourceclock = rcc_clocks.SYSCLK_Frequency;
  380. /* Compute the Real divider depending on the MCLK output state with a floating point */
  381. if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
  382. {
  383. /* MCLK output is enabled */
  384. tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
  385. }
  386. else
  387. {
  388. /* MCLK output is disabled */
  389. tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
  390. }
  391. /* Remove the floating point */
  392. tmp = tmp / 10U;
  393. /* Check the parity of the divider */
  394. i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);
  395. /* Compute the i2sdiv prescaler */
  396. i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
  397. /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
  398. i2sodd = (uint16_t)(i2sodd << 8U);
  399. }
  400. /* Test if the divider is 1 or 0 or greater than 0xFF */
  401. if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
  402. {
  403. /* Set the default values */
  404. i2sdiv = 2U;
  405. i2sodd = 0U;
  406. }
  407. /* Write to SPIx I2SPR register the computed value */
  408. WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
  409. status = SUCCESS;
  410. }
  411. return status;
  412. }
  413. /**
  414. * @brief Set each @ref LL_I2S_InitTypeDef field to default value.
  415. * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
  416. * whose fields will be set to default values.
  417. * @retval None
  418. */
  419. void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
  420. {
  421. /*--------------- Reset I2S init structure parameters values -----------------*/
  422. I2S_InitStruct->Mode = LL_I2S_MODE_SLAVE_TX;
  423. I2S_InitStruct->Standard = LL_I2S_STANDARD_PHILIPS;
  424. I2S_InitStruct->DataFormat = LL_I2S_DATAFORMAT_16B;
  425. I2S_InitStruct->MCLKOutput = LL_I2S_MCLK_OUTPUT_DISABLE;
  426. I2S_InitStruct->AudioFreq = LL_I2S_AUDIOFREQ_DEFAULT;
  427. I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW;
  428. }
  429. /**
  430. * @brief Set linear and parity prescaler.
  431. * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
  432. * Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
  433. * @param SPIx SPI Instance
  434. * @param PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF.
  435. * @param PrescalerParity This parameter can be one of the following values:
  436. * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
  437. * @arg @ref LL_I2S_PRESCALER_PARITY_ODD
  438. * @retval None
  439. */
  440. void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
  441. {
  442. /* Check the I2S parameters */
  443. assert_param(IS_I2S_ALL_INSTANCE(SPIx));
  444. assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
  445. assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
  446. /* Write to SPIx I2SPR */
  447. MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
  448. }
  449. /**
  450. * @}
  451. */
  452. /**
  453. * @}
  454. */
  455. /**
  456. * @}
  457. */
  458. #endif /* SPI_I2S_SUPPORT */
  459. #endif /* defined (SPI1) || defined (SPI2) */
  460. /**
  461. * @}
  462. */
  463. #endif /* USE_FULL_LL_DRIVER */
  464. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/