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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_ll_usart.c
  4. * @author MCD Application Team
  5. * @brief USART LL module driver.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. #if defined(USE_FULL_LL_DRIVER)
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32f0xx_ll_usart.h"
  38. #include "stm32f0xx_ll_rcc.h"
  39. #include "stm32f0xx_ll_bus.h"
  40. #ifdef USE_FULL_ASSERT
  41. #include "stm32_assert.h"
  42. #else
  43. #define assert_param(expr) ((void)0U)
  44. #endif
  45. /** @addtogroup STM32F0xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART4) || defined (USART5) || defined (USART6) || defined (USART7) || defined (USART8)
  49. /** @addtogroup USART_LL
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /** @addtogroup USART_LL_Private_Constants
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. /* Private macros ------------------------------------------------------------*/
  62. /** @addtogroup USART_LL_Private_Macros
  63. * @{
  64. */
  65. /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  66. * divided by the smallest oversampling used on the USART (i.e. 8) */
  67. #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 6000000U)
  68. /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  69. #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
  70. /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
  71. #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
  72. #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  73. || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  74. || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  75. || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  76. #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  77. || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  78. || ((__VALUE__) == LL_USART_PARITY_ODD))
  79. #if defined(USART_7BITS_SUPPORT)
  80. #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  81. || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  82. || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  83. #else
  84. #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  85. || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  86. #endif
  87. #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  88. || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  89. #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  90. || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  91. #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  92. || ((__VALUE__) == LL_USART_PHASE_2EDGE))
  93. #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
  94. || ((__VALUE__) == LL_USART_POLARITY_HIGH))
  95. #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
  96. || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
  97. #if defined(USART_SMARTCARD_SUPPORT)
  98. #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
  99. || ((__VALUE__) == LL_USART_STOPBITS_1) \
  100. || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
  101. || ((__VALUE__) == LL_USART_STOPBITS_2))
  102. #else
  103. #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_1) \
  104. || ((__VALUE__) == LL_USART_STOPBITS_2))
  105. #endif
  106. #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
  107. || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
  108. || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
  109. || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
  110. /**
  111. * @}
  112. */
  113. /* Private function prototypes -----------------------------------------------*/
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @addtogroup USART_LL_Exported_Functions
  116. * @{
  117. */
  118. /** @addtogroup USART_LL_EF_Init
  119. * @{
  120. */
  121. /**
  122. * @brief De-initialize USART registers (Registers restored to their default values).
  123. * @param USARTx USART Instance
  124. * @retval An ErrorStatus enumeration value:
  125. * - SUCCESS: USART registers are de-initialized
  126. * - ERROR: USART registers are not de-initialized
  127. */
  128. ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
  129. {
  130. ErrorStatus status = SUCCESS;
  131. /* Check the parameters */
  132. assert_param(IS_UART_INSTANCE(USARTx));
  133. if (USARTx == USART1)
  134. {
  135. /* Force reset of USART clock */
  136. LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART1);
  137. /* Release reset of USART clock */
  138. LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART1);
  139. }
  140. #if defined(USART2)
  141. else if (USARTx == USART2)
  142. {
  143. /* Force reset of USART clock */
  144. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
  145. /* Release reset of USART clock */
  146. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
  147. }
  148. #endif /* USART2 */
  149. #if defined(USART3)
  150. else if (USARTx == USART3)
  151. {
  152. /* Force reset of USART clock */
  153. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
  154. /* Release reset of USART clock */
  155. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
  156. }
  157. #endif /* USART3 */
  158. #if defined(USART4)
  159. else if (USARTx == USART4)
  160. {
  161. /* Force reset of USART clock */
  162. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
  163. /* Release reset of USART clock */
  164. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
  165. }
  166. #endif /* USART4 */
  167. #if defined(USART5)
  168. else if (USARTx == USART5)
  169. {
  170. /* Force reset of USART clock */
  171. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
  172. /* Release reset of USART clock */
  173. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
  174. }
  175. #endif /* USART5 */
  176. #if defined(USART6)
  177. else if (USARTx == USART6)
  178. {
  179. /* Force reset of USART clock */
  180. LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART6);
  181. /* Release reset of USART clock */
  182. LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART6);
  183. }
  184. #endif /* USART6 */
  185. #if defined(USART7)
  186. else if (USARTx == USART7)
  187. {
  188. /* Force reset of USART clock */
  189. LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART7);
  190. /* Release reset of USART clock */
  191. LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART7);
  192. }
  193. #endif /* USART7 */
  194. #if defined(USART8)
  195. else if (USARTx == USART8)
  196. {
  197. /* Force reset of USART clock */
  198. LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART8);
  199. /* Release reset of USART clock */
  200. LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART8);
  201. }
  202. #endif /* USART8 */
  203. else
  204. {
  205. status = ERROR;
  206. }
  207. return (status);
  208. }
  209. /**
  210. * @brief Initialize USART registers according to the specified
  211. * parameters in USART_InitStruct.
  212. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  213. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  214. * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
  215. * @param USARTx USART Instance
  216. * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
  217. * that contains the configuration information for the specified USART peripheral.
  218. * @retval An ErrorStatus enumeration value:
  219. * - SUCCESS: USART registers are initialized according to USART_InitStruct content
  220. * - ERROR: Problem occurred during USART Registers initialization
  221. */
  222. ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
  223. {
  224. ErrorStatus status = ERROR;
  225. uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
  226. #if defined(STM32F030x8) || defined(STM32F030xC) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || defined(STM32F070x6) || defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
  227. LL_RCC_ClocksTypeDef RCC_Clocks;
  228. #endif
  229. /* Check the parameters */
  230. assert_param(IS_UART_INSTANCE(USARTx));
  231. assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
  232. assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
  233. assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
  234. assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
  235. assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
  236. assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
  237. assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
  238. /* USART needs to be in disabled state, in order to be able to configure some bits in
  239. CRx registers */
  240. if (LL_USART_IsEnabled(USARTx) == 0U)
  241. {
  242. /*---------------------------- USART CR1 Configuration ---------------------
  243. * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
  244. * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
  245. * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
  246. * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
  247. * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
  248. */
  249. MODIFY_REG(USARTx->CR1,
  250. (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
  251. USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
  252. (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
  253. USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
  254. /*---------------------------- USART CR2 Configuration ---------------------
  255. * Configure USARTx CR2 (Stop bits) with parameters:
  256. * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
  257. * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
  258. */
  259. LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
  260. /*---------------------------- USART CR3 Configuration ---------------------
  261. * Configure USARTx CR3 (Hardware Flow Control) with parameters:
  262. * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
  263. */
  264. LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
  265. /*---------------------------- USART BRR Configuration ---------------------
  266. * Retrieve Clock frequency used for USART Peripheral
  267. */
  268. if (USARTx == USART1)
  269. {
  270. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
  271. }
  272. #if defined(USART2)
  273. else if (USARTx == USART2)
  274. {
  275. #if defined (RCC_CFGR3_USART2SW)
  276. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
  277. #else
  278. /* USART2 clock is PCLK */
  279. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  280. periphclk = RCC_Clocks.PCLK1_Frequency;
  281. #endif
  282. }
  283. #endif /* USART2 */
  284. #if defined(USART3)
  285. else if (USARTx == USART3)
  286. {
  287. #if defined (RCC_CFGR3_USART3SW)
  288. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
  289. #else
  290. /* USART3 clock is PCLK */
  291. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  292. periphclk = RCC_Clocks.PCLK1_Frequency;
  293. #endif
  294. }
  295. #endif /* USART3 */
  296. #if defined(USART4)
  297. else if (USARTx == USART4)
  298. {
  299. /* USART4 clock is PCLK */
  300. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  301. periphclk = RCC_Clocks.PCLK1_Frequency;
  302. }
  303. #endif /* USART4 */
  304. #if defined(USART5)
  305. else if (USARTx == USART5)
  306. {
  307. /* USART5 clock is PCLK */
  308. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  309. periphclk = RCC_Clocks.PCLK1_Frequency;
  310. }
  311. #endif /* USART5 */
  312. #if defined(USART6)
  313. else if (USARTx == USART6)
  314. {
  315. /* USART6 clock is PCLK */
  316. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  317. periphclk = RCC_Clocks.PCLK1_Frequency;
  318. }
  319. #endif /* USART6 */
  320. #if defined(USART7)
  321. else if (USARTx == USART7)
  322. {
  323. /* USART7 clock is PCLK */
  324. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  325. periphclk = RCC_Clocks.PCLK1_Frequency;
  326. }
  327. #endif /* USART7 */
  328. #if defined(USART8)
  329. else if (USARTx == USART8)
  330. {
  331. /* USART8 clock is PCLK */
  332. LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
  333. periphclk = RCC_Clocks.PCLK1_Frequency;
  334. }
  335. #endif /* USART8 */
  336. else
  337. {
  338. /* Nothing to do, as error code is already assigned to ERROR value */
  339. }
  340. /* Configure the USART Baud Rate :
  341. - valid baud rate value (different from 0) is required
  342. - Peripheral clock as returned by RCC service, should be valid (different from 0).
  343. */
  344. if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
  345. && (USART_InitStruct->BaudRate != 0U))
  346. {
  347. status = SUCCESS;
  348. LL_USART_SetBaudRate(USARTx,
  349. periphclk,
  350. USART_InitStruct->OverSampling,
  351. USART_InitStruct->BaudRate);
  352. /* Check BRR is greater than or equal to 16d */
  353. assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
  354. /* Check BRR is greater than or equal to 16d */
  355. assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
  356. }
  357. }
  358. /* Endif (=> USART not in Disabled state => return ERROR) */
  359. return (status);
  360. }
  361. /**
  362. * @brief Set each @ref LL_USART_InitTypeDef field to default value.
  363. * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
  364. * whose fields will be set to default values.
  365. * @retval None
  366. */
  367. void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
  368. {
  369. /* Set USART_InitStruct fields to default values */
  370. USART_InitStruct->BaudRate = 9600U;
  371. USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
  372. USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
  373. USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
  374. USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
  375. USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
  376. USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
  377. }
  378. /**
  379. * @brief Initialize USART Clock related settings according to the
  380. * specified parameters in the USART_ClockInitStruct.
  381. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  382. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  383. * @param USARTx USART Instance
  384. * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
  385. * that contains the Clock configuration information for the specified USART peripheral.
  386. * @retval An ErrorStatus enumeration value:
  387. * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
  388. * - ERROR: Problem occurred during USART Registers initialization
  389. */
  390. ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  391. {
  392. ErrorStatus status = SUCCESS;
  393. /* Check USART Instance and Clock signal output parameters */
  394. assert_param(IS_UART_INSTANCE(USARTx));
  395. assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
  396. /* USART needs to be in disabled state, in order to be able to configure some bits in
  397. CRx registers */
  398. if (LL_USART_IsEnabled(USARTx) == 0U)
  399. {
  400. /*---------------------------- USART CR2 Configuration -----------------------*/
  401. /* If Clock signal has to be output */
  402. if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
  403. {
  404. /* Deactivate Clock signal delivery :
  405. * - Disable Clock Output: USART_CR2_CLKEN cleared
  406. */
  407. LL_USART_DisableSCLKOutput(USARTx);
  408. }
  409. else
  410. {
  411. /* Ensure USART instance is USART capable */
  412. assert_param(IS_USART_INSTANCE(USARTx));
  413. /* Check clock related parameters */
  414. assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
  415. assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
  416. assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
  417. /*---------------------------- USART CR2 Configuration -----------------------
  418. * Configure USARTx CR2 (Clock signal related bits) with parameters:
  419. * - Enable Clock Output: USART_CR2_CLKEN set
  420. * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
  421. * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
  422. * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
  423. */
  424. MODIFY_REG(USARTx->CR2,
  425. USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
  426. USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
  427. USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
  428. }
  429. }
  430. /* Else (USART not in Disabled state => return ERROR */
  431. else
  432. {
  433. status = ERROR;
  434. }
  435. return (status);
  436. }
  437. /**
  438. * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
  439. * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
  440. * whose fields will be set to default values.
  441. * @retval None
  442. */
  443. void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  444. {
  445. /* Set LL_USART_ClockInitStruct fields with default values */
  446. USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
  447. USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  448. USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  449. USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  450. }
  451. /**
  452. * @}
  453. */
  454. /**
  455. * @}
  456. */
  457. /**
  458. * @}
  459. */
  460. #endif /* USART1 || USART2|| USART3 || USART4 || USART5 || USART6 || USART7 || USART8 */
  461. /**
  462. * @}
  463. */
  464. #endif /* USE_FULL_LL_DRIVER */
  465. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/