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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @version V1.7.1
  6. * @date 14-April-2017
  7. * @brief SDMMC Low Layer HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the SDMMC peripheral:
  11. * + Initialization/de-initialization functions
  12. * + I/O operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### SDMMC peripheral features #####
  19. ==============================================================================
  20. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  21. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  22. devices.
  23. [..] The SDMMC features include the following:
  24. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  25. for three different databus modes: 1-bit (default), 4-bit and 8-bit
  26. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  27. (+) Full compliance with SD Memory Card Specifications Version 2.0
  28. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  29. different data bus modes: 1-bit (default) and 4-bit
  30. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  31. Rev1.1)
  32. (+) Data transfer up to 48 MHz for the 8 bit mode
  33. (+) Data and command output enable signals to control external bidirectional drivers.
  34. ##### How to use this driver #####
  35. ==============================================================================
  36. [..]
  37. This driver is a considered as a driver of service for external devices drivers
  38. that interfaces with the SDMMC peripheral.
  39. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  40. is used in the device's driver to perform SDMMC operations and functionalities.
  41. This driver is almost transparent for the final user, it is only used to implement other
  42. functionalities of the external device.
  43. [..]
  44. (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL
  45. (PLL48CLK). Before start working with SDMMC peripheral make sure that the
  46. PLL is well configured.
  47. The SDMMC peripheral uses two clock signals:
  48. (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  49. (++) APB2 bus clock (PCLK2)
  50. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  51. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  52. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  53. peripheral.
  54. (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
  55. function and disable it using the function SDIO_PowerState_ON(SDIOx).
  56. (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  57. (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hSDIO, IT)
  58. and __SDIO_DISABLE_IT(hSDIO, IT) if you need to use interrupt mode.
  59. (+) When using the DMA mode
  60. (++) Configure the DMA in the MSP layer of the external device
  61. (++) Active the needed channel Request
  62. (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  63. __SDIO_DMA_DISABLE().
  64. (+) To control the CPSM (Command Path State Machine) and send
  65. commands to the card use the SDIO_SendCommand(),
  66. SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  67. to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  68. to the selected command to be sent.
  69. The parameters that should be filled are:
  70. (++) Command Argument
  71. (++) Command Index
  72. (++) Command Response type
  73. (++) Command Wait
  74. (++) CPSM Status (Enable or Disable).
  75. -@@- To check if the command is well received, read the SDIO_CMDRESP
  76. register using the SDIO_GetCommandResponse().
  77. The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  78. SDIO_GetResponse() function.
  79. (+) To control the DPSM (Data Path State Machine) and send/receive
  80. data to/from the card use the SDIO_ConfigData(), SDIO_GetDataCounter(),
  81. SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
  82. *** Read Operations ***
  83. =======================
  84. [..]
  85. (#) First, user has to fill the data structure (pointer to
  86. SDIO_DataInitTypeDef) according to the selected data type to be received.
  87. The parameters that should be filled are:
  88. (++) Data TimeOut
  89. (++) Data Length
  90. (++) Data Block size
  91. (++) Data Transfer direction: should be from card (To SDMMC)
  92. (++) Data Transfer mode
  93. (++) DPSM Status (Enable or Disable)
  94. (#) Configure the SDMMC resources to receive the data from the card
  95. according to selected transfer mode (Refer to Step 8, 9 and 10).
  96. (#) Send the selected Read command (refer to step 11).
  97. (#) Use the SDIO flags/interrupts to check the transfer status.
  98. *** Write Operations ***
  99. ========================
  100. [..]
  101. (#) First, user has to fill the data structure (pointer to
  102. SDIO_DataInitTypeDef) according to the selected data type to be received.
  103. The parameters that should be filled are:
  104. (++) Data TimeOut
  105. (++) Data Length
  106. (++) Data Block size
  107. (++) Data Transfer direction: should be to card (To CARD)
  108. (++) Data Transfer mode
  109. (++) DPSM Status (Enable or Disable)
  110. (#) Configure the SDMMC resources to send the data to the card according to
  111. selected transfer mode.
  112. (#) Send the selected Write command.
  113. (#) Use the SDIO flags/interrupts to check the transfer status.
  114. *** Command management operations ***
  115. =====================================
  116. [..]
  117. (#) The commands used for Read/Write/Erase operations are managed in
  118. separate functions.
  119. Each function allows to send the needed command with the related argument,
  120. then check the response.
  121. By the same approach, you could implement a command and check the response.
  122. @endverbatim
  123. ******************************************************************************
  124. * @attention
  125. *
  126. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  127. *
  128. * Redistribution and use in source and binary forms, with or without modification,
  129. * are permitted provided that the following conditions are met:
  130. * 1. Redistributions of source code must retain the above copyright notice,
  131. * this list of conditions and the following disclaimer.
  132. * 2. Redistributions in binary form must reproduce the above copyright notice,
  133. * this list of conditions and the following disclaimer in the documentation
  134. * and/or other materials provided with the distribution.
  135. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  136. * may be used to endorse or promote products derived from this software
  137. * without specific prior written permission.
  138. *
  139. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  140. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  141. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  142. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  143. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  144. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  145. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  146. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  147. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  148. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  149. *
  150. ******************************************************************************
  151. */
  152. /* Includes ------------------------------------------------------------------*/
  153. #include "stm32f4xx_hal.h"
  154. /** @addtogroup STM32F4xx_HAL_Driver
  155. * @{
  156. */
  157. /** @defgroup SDMMC_LL SDMMC Low Layer
  158. * @brief Low layer module for SD
  159. * @{
  160. */
  161. #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
  162. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
  163. defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
  164. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
  165. defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
  166. defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  167. /* Private typedef -----------------------------------------------------------*/
  168. /* Private define ------------------------------------------------------------*/
  169. /* Private macro -------------------------------------------------------------*/
  170. /* Private variables ---------------------------------------------------------*/
  171. /* Private function prototypes -----------------------------------------------*/
  172. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
  173. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout);
  174. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx);
  175. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx);
  176. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx);
  177. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA);
  178. /* Exported functions --------------------------------------------------------*/
  179. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  180. * @{
  181. */
  182. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  183. * @brief Initialization and Configuration functions
  184. *
  185. @verbatim
  186. ===============================================================================
  187. ##### Initialization/de-initialization functions #####
  188. ===============================================================================
  189. [..] This section provides functions allowing to:
  190. @endverbatim
  191. * @{
  192. */
  193. /**
  194. * @brief Initializes the SDMMC according to the specified
  195. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  196. * @param SDIOx: Pointer to SDMMC register base
  197. * @param Init: SDMMC initialization structure
  198. * @retval HAL status
  199. */
  200. HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
  201. {
  202. uint32_t tmpreg = 0U;
  203. /* Check the parameters */
  204. assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
  205. assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
  206. assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
  207. assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  208. assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
  209. assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  210. assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
  211. /* Set SDMMC configuration parameters */
  212. tmpreg |= (Init.ClockEdge |\
  213. Init.ClockBypass |\
  214. Init.ClockPowerSave |\
  215. Init.BusWide |\
  216. Init.HardwareFlowControl |\
  217. Init.ClockDiv
  218. );
  219. /* Write to SDMMC CLKCR */
  220. MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
  221. return HAL_OK;
  222. }
  223. /**
  224. * @}
  225. */
  226. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  227. * @brief Data transfers functions
  228. *
  229. @verbatim
  230. ===============================================================================
  231. ##### I/O operation functions #####
  232. ===============================================================================
  233. [..]
  234. This subsection provides a set of functions allowing to manage the SDMMC data
  235. transfers.
  236. @endverbatim
  237. * @{
  238. */
  239. /**
  240. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  241. * @param SDIOx: Pointer to SDMMC register base
  242. * @retval HAL status
  243. */
  244. uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
  245. {
  246. /* Read data from Rx FIFO */
  247. return (SDIOx->FIFO);
  248. }
  249. /**
  250. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  251. * @param SDIOx: Pointer to SDMMC register base
  252. * @param pWriteData: pointer to data to write
  253. * @retval HAL status
  254. */
  255. HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
  256. {
  257. /* Write data to FIFO */
  258. SDIOx->FIFO = *pWriteData;
  259. return HAL_OK;
  260. }
  261. /**
  262. * @}
  263. */
  264. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  265. * @brief management functions
  266. *
  267. @verbatim
  268. ===============================================================================
  269. ##### Peripheral Control functions #####
  270. ===============================================================================
  271. [..]
  272. This subsection provides a set of functions allowing to control the SDMMC data
  273. transfers.
  274. @endverbatim
  275. * @{
  276. */
  277. /**
  278. * @brief Set SDMMC Power state to ON.
  279. * @param SDIOx: Pointer to SDMMC register base
  280. * @retval HAL status
  281. */
  282. HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
  283. {
  284. /* Set power state to ON */
  285. SDIOx->POWER = SDIO_POWER_PWRCTRL;
  286. return HAL_OK;
  287. }
  288. /**
  289. * @brief Set SDMMC Power state to OFF.
  290. * @param SDIOx: Pointer to SDMMC register base
  291. * @retval HAL status
  292. */
  293. HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
  294. {
  295. /* Set power state to OFF */
  296. SDIOx->POWER = 0x00000000U;
  297. return HAL_OK;
  298. }
  299. /**
  300. * @brief Get SDMMC Power state.
  301. * @param SDIOx: Pointer to SDMMC register base
  302. * @retval Power status of the controller. The returned value can be one of the
  303. * following values:
  304. * - 0x00: Power OFF
  305. * - 0x02: Power UP
  306. * - 0x03: Power ON
  307. */
  308. uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
  309. {
  310. return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
  311. }
  312. /**
  313. * @brief Configure the SDMMC command path according to the specified parameters in
  314. * SDIO_CmdInitTypeDef structure and send the command
  315. * @param SDIOx: Pointer to SDMMC register base
  316. * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
  317. * the configuration information for the SDMMC command
  318. * @retval HAL status
  319. */
  320. HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
  321. {
  322. uint32_t tmpreg = 0U;
  323. /* Check the parameters */
  324. assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
  325. assert_param(IS_SDIO_RESPONSE(Command->Response));
  326. assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
  327. assert_param(IS_SDIO_CPSM(Command->CPSM));
  328. /* Set the SDMMC Argument value */
  329. SDIOx->ARG = Command->Argument;
  330. /* Set SDMMC command parameters */
  331. tmpreg |= (uint32_t)(Command->CmdIndex |\
  332. Command->Response |\
  333. Command->WaitForInterrupt |\
  334. Command->CPSM);
  335. /* Write to SDMMC CMD register */
  336. MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
  337. return HAL_OK;
  338. }
  339. /**
  340. * @brief Return the command index of last command for which response received
  341. * @param SDIOx: Pointer to SDMMC register base
  342. * @retval Command index of the last command response received
  343. */
  344. uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
  345. {
  346. return (uint8_t)(SDIOx->RESPCMD);
  347. }
  348. /**
  349. * @brief Return the response received from the card for the last command
  350. * @param SDIOx: Pointer to SDMMC register base
  351. * @param Response: Specifies the SDMMC response register.
  352. * This parameter can be one of the following values:
  353. * @arg SDIO_RESP1: Response Register 1
  354. * @arg SDIO_RESP1: Response Register 2
  355. * @arg SDIO_RESP1: Response Register 3
  356. * @arg SDIO_RESP1: Response Register 4
  357. * @retval The Corresponding response register value
  358. */
  359. uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
  360. {
  361. __IO uint32_t tmp = 0U;
  362. /* Check the parameters */
  363. assert_param(IS_SDIO_RESP(Response));
  364. /* Get the response */
  365. tmp = (uint32_t)&(SDIOx->RESP1) + Response;
  366. return (*(__IO uint32_t *) tmp);
  367. }
  368. /**
  369. * @brief Configure the SDMMC data path according to the specified
  370. * parameters in the SDIO_DataInitTypeDef.
  371. * @param SDIOx: Pointer to SDMMC register base
  372. * @param Data : pointer to a SDIO_DataInitTypeDef structure
  373. * that contains the configuration information for the SDMMC data.
  374. * @retval HAL status
  375. */
  376. HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
  377. {
  378. uint32_t tmpreg = 0U;
  379. /* Check the parameters */
  380. assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
  381. assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
  382. assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
  383. assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
  384. assert_param(IS_SDIO_DPSM(Data->DPSM));
  385. /* Set the SDMMC Data TimeOut value */
  386. SDIOx->DTIMER = Data->DataTimeOut;
  387. /* Set the SDMMC DataLength value */
  388. SDIOx->DLEN = Data->DataLength;
  389. /* Set the SDMMC data configuration parameters */
  390. tmpreg |= (uint32_t)(Data->DataBlockSize |\
  391. Data->TransferDir |\
  392. Data->TransferMode |\
  393. Data->DPSM);
  394. /* Write to SDMMC DCTRL */
  395. MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
  396. return HAL_OK;
  397. }
  398. /**
  399. * @brief Returns number of remaining data bytes to be transferred.
  400. * @param SDIOx: Pointer to SDMMC register base
  401. * @retval Number of remaining data bytes to be transferred
  402. */
  403. uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
  404. {
  405. return (SDIOx->DCOUNT);
  406. }
  407. /**
  408. * @brief Get the FIFO data
  409. * @param SDIOx: Pointer to SDMMC register base
  410. * @retval Data received
  411. */
  412. uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
  413. {
  414. return (SDIOx->FIFO);
  415. }
  416. /**
  417. * @brief Sets one of the two options of inserting read wait interval.
  418. * @param SDIOx: Pointer to SDMMC register base
  419. * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode.
  420. * This parameter can be:
  421. * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  422. * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  423. * @retval None
  424. */
  425. HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
  426. {
  427. /* Check the parameters */
  428. assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
  429. /* Set SDMMC read wait mode */
  430. MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
  431. return HAL_OK;
  432. }
  433. /**
  434. * @}
  435. */
  436. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  437. * @brief Data transfers functions
  438. *
  439. @verbatim
  440. ===============================================================================
  441. ##### Commands management functions #####
  442. ===============================================================================
  443. [..]
  444. This subsection provides a set of functions allowing to manage the needed commands.
  445. @endverbatim
  446. * @{
  447. */
  448. /**
  449. * @brief Send the Data Block Lenght command and check the response
  450. * @param SDIOx: Pointer to SDMMC register base
  451. * @retval HAL status
  452. */
  453. uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
  454. {
  455. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  456. uint32_t errorstate = SDMMC_ERROR_NONE;
  457. /* Set Block Size for Card */
  458. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  459. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  460. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  461. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  462. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  463. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  464. /* Check for error conditions */
  465. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
  466. return errorstate;
  467. }
  468. /**
  469. * @brief Send the Read Single Block command and check the response
  470. * @param SDIOx: Pointer to SDMMC register base
  471. * @retval HAL status
  472. */
  473. uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  474. {
  475. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  476. uint32_t errorstate = SDMMC_ERROR_NONE;
  477. /* Set Block Size for Card */
  478. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  479. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  480. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  481. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  482. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  483. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  484. /* Check for error conditions */
  485. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  486. return errorstate;
  487. }
  488. /**
  489. * @brief Send the Read Multi Block command and check the response
  490. * @param SDIOx: Pointer to SDIO register base
  491. * @retval HAL status
  492. */
  493. uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  494. {
  495. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  496. uint32_t errorstate = SDMMC_ERROR_NONE;
  497. /* Set Block Size for Card */
  498. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  499. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  500. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  501. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  502. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  503. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  504. /* Check for error conditions */
  505. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
  506. return errorstate;
  507. }
  508. /**
  509. * @brief Send the Write Single Block command and check the response
  510. * @param SDIOx: Pointer to SDIO register base
  511. * @retval HAL status
  512. */
  513. uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  514. {
  515. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  516. uint32_t errorstate = SDMMC_ERROR_NONE;
  517. /* Set Block Size for Card */
  518. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  519. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  520. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  521. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  522. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  523. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  524. /* Check for error conditions */
  525. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  526. return errorstate;
  527. }
  528. /**
  529. * @brief Send the Write Multi Block command and check the response
  530. * @param SDIOx: Pointer to SDIO register base
  531. * @retval HAL status
  532. */
  533. uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  534. {
  535. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  536. uint32_t errorstate = SDMMC_ERROR_NONE;
  537. /* Set Block Size for Card */
  538. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  539. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  540. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  541. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  542. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  543. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  544. /* Check for error conditions */
  545. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
  546. return errorstate;
  547. }
  548. /**
  549. * @brief Send the Start Address Erase command for SD and check the response
  550. * @param SDIOx: Pointer to SDIO register base
  551. * @retval HAL status
  552. */
  553. uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  554. {
  555. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  556. uint32_t errorstate = SDMMC_ERROR_NONE;
  557. /* Set Block Size for Card */
  558. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  559. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  560. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  561. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  562. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  563. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  564. /* Check for error conditions */
  565. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  566. return errorstate;
  567. }
  568. /**
  569. * @brief Send the End Address Erase command for SD and check the response
  570. * @param SDIOx: Pointer to SDIO register base
  571. * @retval HAL status
  572. */
  573. uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  574. {
  575. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  576. uint32_t errorstate = SDMMC_ERROR_NONE;
  577. /* Set Block Size for Card */
  578. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  579. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  580. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  581. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  582. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  583. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  584. /* Check for error conditions */
  585. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  586. return errorstate;
  587. }
  588. /**
  589. * @brief Send the Start Address Erase command and check the response
  590. * @param SDIOx: Pointer to SDIO register base
  591. * @retval HAL status
  592. */
  593. uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  594. {
  595. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  596. uint32_t errorstate = SDMMC_ERROR_NONE;
  597. /* Set Block Size for Card */
  598. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  599. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  600. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  601. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  602. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  603. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  604. /* Check for error conditions */
  605. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  606. return errorstate;
  607. }
  608. /**
  609. * @brief Send the End Address Erase command and check the response
  610. * @param SDIOx: Pointer to SDIO register base
  611. * @retval HAL status
  612. */
  613. uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  614. {
  615. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  616. uint32_t errorstate = SDMMC_ERROR_NONE;
  617. /* Set Block Size for Card */
  618. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  619. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  620. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  621. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  622. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  623. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  624. /* Check for error conditions */
  625. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  626. return errorstate;
  627. }
  628. /**
  629. * @brief Send the Erase command and check the response
  630. * @param SDIOx: Pointer to SDIO register base
  631. * @retval HAL status
  632. */
  633. uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
  634. {
  635. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  636. uint32_t errorstate = SDMMC_ERROR_NONE;
  637. /* Set Block Size for Card */
  638. sdmmc_cmdinit.Argument = 0U;
  639. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  640. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  641. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  642. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  643. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  644. /* Check for error conditions */
  645. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT);
  646. return errorstate;
  647. }
  648. /**
  649. * @brief Send the Stop Transfer command and check the response.
  650. * @param SDIOx: Pointer to SDIO register base
  651. * @retval HAL status
  652. */
  653. uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
  654. {
  655. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  656. uint32_t errorstate = SDMMC_ERROR_NONE;
  657. /* Send CMD12 STOP_TRANSMISSION */
  658. sdmmc_cmdinit.Argument = 0U;
  659. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  660. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  661. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  662. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  663. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  664. /* Check for error conditions */
  665. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, 100000000U);
  666. return errorstate;
  667. }
  668. /**
  669. * @brief Send the Select Deselect command and check the response.
  670. * @param SDIOx: Pointer to SDIO register base
  671. * @param addr: Address of the card to be selected
  672. * @retval HAL status
  673. */
  674. uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
  675. {
  676. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  677. uint32_t errorstate = SDMMC_ERROR_NONE;
  678. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  679. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  680. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  681. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  682. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  683. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  684. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  685. /* Check for error conditions */
  686. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
  687. return errorstate;
  688. }
  689. /**
  690. * @brief Send the Go Idle State command and check the response.
  691. * @param SDIOx: Pointer to SDIO register base
  692. * @retval HAL status
  693. */
  694. uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
  695. {
  696. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  697. uint32_t errorstate = SDMMC_ERROR_NONE;
  698. sdmmc_cmdinit.Argument = 0U;
  699. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  700. sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
  701. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  702. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  703. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  704. /* Check for error conditions */
  705. errorstate = SDMMC_GetCmdError(SDIOx);
  706. return errorstate;
  707. }
  708. /**
  709. * @brief Send the Operating Condition command and check the response.
  710. * @param SDIOx: Pointer to SDIO register base
  711. * @retval HAL status
  712. */
  713. uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
  714. {
  715. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  716. uint32_t errorstate = SDMMC_ERROR_NONE;
  717. /* Send CMD8 to verify SD card interface operating condition */
  718. /* Argument: - [31:12]: Reserved (shall be set to '0')
  719. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  720. - [7:0]: Check Pattern (recommended 0xAA) */
  721. /* CMD Response: R7 */
  722. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  723. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  724. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  725. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  726. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  727. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  728. /* Check for error conditions */
  729. errorstate = SDMMC_GetCmdResp7(SDIOx);
  730. return errorstate;
  731. }
  732. /**
  733. * @brief Send the Application command to verify that that the next command
  734. * is an application specific com-mand rather than a standard command
  735. * and check the response.
  736. * @param SDIOx: Pointer to SDIO register base
  737. * @retval HAL status
  738. */
  739. uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  740. {
  741. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  742. uint32_t errorstate = SDMMC_ERROR_NONE;
  743. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  744. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  745. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  746. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  747. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  748. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  749. /* Check for error conditions */
  750. /* If there is a HAL_ERROR, it is a MMC card, else
  751. it is a SD card: SD card 2.0 (voltage range mismatch)
  752. or SD card 1.x */
  753. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
  754. return errorstate;
  755. }
  756. /**
  757. * @brief Send the command asking the accessed card to send its operating
  758. * condition register (OCR)
  759. * @param SDIOx: Pointer to SDIO register base
  760. * @retval HAL status
  761. */
  762. uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType)
  763. {
  764. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  765. uint32_t errorstate = SDMMC_ERROR_NONE;
  766. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | SdType;
  767. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  768. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  769. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  770. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  771. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  772. /* Check for error conditions */
  773. errorstate = SDMMC_GetCmdResp3(SDIOx);
  774. return errorstate;
  775. }
  776. /**
  777. * @brief Send the Bus Width command and check the response.
  778. * @param SDIOx: Pointer to SDIO register base
  779. * @retval HAL status
  780. */
  781. uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
  782. {
  783. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  784. uint32_t errorstate = SDMMC_ERROR_NONE;
  785. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  786. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  787. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  788. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  789. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  790. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  791. /* Check for error conditions */
  792. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
  793. return errorstate;
  794. }
  795. /**
  796. * @brief Send the Send SCR command and check the response.
  797. * @param SDIOx: Pointer to SDMMC register base
  798. * @retval HAL status
  799. */
  800. uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
  801. {
  802. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  803. uint32_t errorstate = SDMMC_ERROR_NONE;
  804. /* Send CMD51 SD_APP_SEND_SCR */
  805. sdmmc_cmdinit.Argument = 0U;
  806. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  807. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  808. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  809. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  810. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  811. /* Check for error conditions */
  812. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
  813. return errorstate;
  814. }
  815. /**
  816. * @brief Send the Send CID command and check the response.
  817. * @param SDIOx: Pointer to SDIO register base
  818. * @retval HAL status
  819. */
  820. uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
  821. {
  822. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  823. uint32_t errorstate = SDMMC_ERROR_NONE;
  824. /* Send CMD2 ALL_SEND_CID */
  825. sdmmc_cmdinit.Argument = 0U;
  826. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  827. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  828. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  829. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  830. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  831. /* Check for error conditions */
  832. errorstate = SDMMC_GetCmdResp2(SDIOx);
  833. return errorstate;
  834. }
  835. /**
  836. * @brief Send the Send CSD command and check the response.
  837. * @param SDIOx: Pointer to SDIO register base
  838. * @retval HAL status
  839. */
  840. uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
  841. {
  842. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  843. uint32_t errorstate = SDMMC_ERROR_NONE;
  844. /* Send CMD9 SEND_CSD */
  845. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  846. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  847. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  848. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  849. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  850. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  851. /* Check for error conditions */
  852. errorstate = SDMMC_GetCmdResp2(SDIOx);
  853. return errorstate;
  854. }
  855. /**
  856. * @brief Send the Send CSD command and check the response.
  857. * @param SDIOx: Pointer to SDIO register base
  858. * @retval HAL status
  859. */
  860. uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
  861. {
  862. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  863. uint32_t errorstate = SDMMC_ERROR_NONE;
  864. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  865. sdmmc_cmdinit.Argument = 0U;
  866. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  867. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  868. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  869. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  870. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  871. /* Check for error conditions */
  872. errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  873. return errorstate;
  874. }
  875. /**
  876. * @brief Send the Status command and check the response.
  877. * @param SDIOx: Pointer to SDIO register base
  878. * @retval HAL status
  879. */
  880. uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
  881. {
  882. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  883. uint32_t errorstate = SDMMC_ERROR_NONE;
  884. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  885. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  886. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  887. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  888. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  889. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  890. /* Check for error conditions */
  891. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
  892. return errorstate;
  893. }
  894. /**
  895. * @brief Send the Status register command and check the response.
  896. * @param SDIOx: Pointer to SDIO register base
  897. * @retval HAL status
  898. */
  899. uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
  900. {
  901. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  902. uint32_t errorstate = SDMMC_ERROR_NONE;
  903. sdmmc_cmdinit.Argument = 0U;
  904. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  905. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  906. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  907. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  908. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  909. /* Check for error conditions */
  910. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
  911. return errorstate;
  912. }
  913. /**
  914. * @brief Sends host capacity support information and activates the card's
  915. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  916. * @param SDIOx: Pointer to SDIO register base
  917. * @parame Argument: Argument used for the command
  918. * @retval HAL status
  919. */
  920. uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
  921. {
  922. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  923. uint32_t errorstate = SDMMC_ERROR_NONE;
  924. sdmmc_cmdinit.Argument = Argument;
  925. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  926. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  927. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  928. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  929. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  930. /* Check for error conditions */
  931. errorstate = SDMMC_GetCmdResp3(SDIOx);
  932. return errorstate;
  933. }
  934. /**
  935. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
  936. * @param SDIOx: Pointer to SDIO register base
  937. * @parame Argument: Argument used for the command
  938. * @retval HAL status
  939. */
  940. uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
  941. {
  942. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  943. uint32_t errorstate = SDMMC_ERROR_NONE;
  944. sdmmc_cmdinit.Argument = Argument;
  945. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  946. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  947. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  948. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  949. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  950. /* Check for error conditions */
  951. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
  952. return errorstate;
  953. }
  954. /**
  955. * @}
  956. */
  957. /* Private function ----------------------------------------------------------*/
  958. /** @addtogroup SD_Private_Functions
  959. * @{
  960. */
  961. /**
  962. * @brief Checks for error conditions for CMD0.
  963. * @param hsd: SD handle
  964. * @retval SD Card error state
  965. */
  966. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
  967. {
  968. /* 8 is the number of required instructions cycles for the below loop statement.
  969. The SDMMC_CMDTIMEOUT is expressed in ms */
  970. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  971. do
  972. {
  973. if (count-- == 0U)
  974. {
  975. return SDMMC_ERROR_TIMEOUT;
  976. }
  977. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
  978. /* Clear all the static flags */
  979. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  980. return SDMMC_ERROR_NONE;
  981. }
  982. /**
  983. * @brief Checks for error conditions for R1 response.
  984. * @param hsd: SD handle
  985. * @param SD_CMD: The sent command index
  986. * @retval SD Card error state
  987. */
  988. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
  989. {
  990. uint32_t response_r1;
  991. /* 8 is the number of required instructions cycles for the below loop statement.
  992. The Timeout is expressed in ms */
  993. register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
  994. do
  995. {
  996. if (count-- == 0U)
  997. {
  998. return SDMMC_ERROR_TIMEOUT;
  999. }
  1000. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1001. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1002. {
  1003. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1004. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1005. }
  1006. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1007. {
  1008. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1009. return SDMMC_ERROR_CMD_CRC_FAIL;
  1010. }
  1011. /* Check response received is of desired command */
  1012. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1013. {
  1014. return SDMMC_ERROR_CMD_CRC_FAIL;
  1015. }
  1016. /* Clear all the static flags */
  1017. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1018. /* We have received response, retrieve it for analysis */
  1019. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1020. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1021. {
  1022. return SDMMC_ERROR_NONE;
  1023. }
  1024. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1025. {
  1026. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1027. }
  1028. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1029. {
  1030. return SDMMC_ERROR_ADDR_MISALIGNED;
  1031. }
  1032. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1033. {
  1034. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1035. }
  1036. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1037. {
  1038. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1039. }
  1040. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1041. {
  1042. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1043. }
  1044. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1045. {
  1046. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1047. }
  1048. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1049. {
  1050. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1051. }
  1052. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1053. {
  1054. return SDMMC_ERROR_COM_CRC_FAILED;
  1055. }
  1056. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1057. {
  1058. return SDMMC_ERROR_ILLEGAL_CMD;
  1059. }
  1060. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1061. {
  1062. return SDMMC_ERROR_CARD_ECC_FAILED;
  1063. }
  1064. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1065. {
  1066. return SDMMC_ERROR_CC_ERR;
  1067. }
  1068. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1069. {
  1070. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1071. }
  1072. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1073. {
  1074. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1075. }
  1076. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1077. {
  1078. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1079. }
  1080. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1081. {
  1082. return SDMMC_ERROR_WP_ERASE_SKIP;
  1083. }
  1084. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1085. {
  1086. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1087. }
  1088. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1089. {
  1090. return SDMMC_ERROR_ERASE_RESET;
  1091. }
  1092. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1093. {
  1094. return SDMMC_ERROR_AKE_SEQ_ERR;
  1095. }
  1096. else
  1097. {
  1098. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1099. }
  1100. }
  1101. /**
  1102. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1103. * @param hsd: SD handle
  1104. * @retval SD Card error state
  1105. */
  1106. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
  1107. {
  1108. /* 8 is the number of required instructions cycles for the below loop statement.
  1109. The SDMMC_CMDTIMEOUT is expressed in ms */
  1110. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1111. do
  1112. {
  1113. if (count-- == 0U)
  1114. {
  1115. return SDMMC_ERROR_TIMEOUT;
  1116. }
  1117. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1118. if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1119. {
  1120. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1121. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1122. }
  1123. else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1124. {
  1125. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1126. return SDMMC_ERROR_CMD_CRC_FAIL;
  1127. }
  1128. else
  1129. {
  1130. /* No error flag set */
  1131. /* Clear all the static flags */
  1132. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1133. }
  1134. return SDMMC_ERROR_NONE;
  1135. }
  1136. /**
  1137. * @brief Checks for error conditions for R3 (OCR) response.
  1138. * @param hsd: SD handle
  1139. * @retval SD Card error state
  1140. */
  1141. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
  1142. {
  1143. /* 8 is the number of required instructions cycles for the below loop statement.
  1144. The SDMMC_CMDTIMEOUT is expressed in ms */
  1145. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1146. do
  1147. {
  1148. if (count-- == 0U)
  1149. {
  1150. return SDMMC_ERROR_TIMEOUT;
  1151. }
  1152. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1153. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1154. {
  1155. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1156. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1157. }
  1158. else
  1159. {
  1160. /* Clear all the static flags */
  1161. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1162. }
  1163. return SDMMC_ERROR_NONE;
  1164. }
  1165. /**
  1166. * @brief Checks for error conditions for R6 (RCA) response.
  1167. * @param hsd: SD handle
  1168. * @param SD_CMD: The sent command index
  1169. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1170. * address RCA
  1171. * @retval SD Card error state
  1172. */
  1173. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
  1174. {
  1175. uint32_t response_r1;
  1176. /* 8 is the number of required instructions cycles for the below loop statement.
  1177. The SDMMC_CMDTIMEOUT is expressed in ms */
  1178. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1179. do
  1180. {
  1181. if (count-- == 0U)
  1182. {
  1183. return SDMMC_ERROR_TIMEOUT;
  1184. }
  1185. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1186. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1187. {
  1188. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1189. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1190. }
  1191. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1192. {
  1193. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1194. return SDMMC_ERROR_CMD_CRC_FAIL;
  1195. }
  1196. /* Check response received is of desired command */
  1197. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1198. {
  1199. return SDMMC_ERROR_CMD_CRC_FAIL;
  1200. }
  1201. /* Clear all the static flags */
  1202. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1203. /* We have received response, retrieve it. */
  1204. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1205. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1206. {
  1207. *pRCA = (uint16_t) (response_r1 >> 16);
  1208. return SDMMC_ERROR_NONE;
  1209. }
  1210. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1211. {
  1212. return SDMMC_ERROR_ILLEGAL_CMD;
  1213. }
  1214. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1215. {
  1216. return SDMMC_ERROR_COM_CRC_FAILED;
  1217. }
  1218. else
  1219. {
  1220. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1221. }
  1222. }
  1223. /**
  1224. * @brief Checks for error conditions for R7 response.
  1225. * @param hsd: SD handle
  1226. * @retval SD Card error state
  1227. */
  1228. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
  1229. {
  1230. /* 8 is the number of required instructions cycles for the below loop statement.
  1231. The SDIO_CMDTIMEOUT is expressed in ms */
  1232. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1233. do
  1234. {
  1235. if (count-- == 0U)
  1236. {
  1237. return SDMMC_ERROR_TIMEOUT;
  1238. }
  1239. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1240. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1241. {
  1242. /* Card is SD V2.0 compliant */
  1243. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1244. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1245. }
  1246. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
  1247. {
  1248. /* Card is SD V2.0 compliant */
  1249. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1250. }
  1251. return SDMMC_ERROR_NONE;
  1252. }
  1253. /**
  1254. * @}
  1255. */
  1256. /**
  1257. * @}
  1258. */
  1259. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
  1260. STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
  1261. STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
  1262. #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
  1263. /**
  1264. * @}
  1265. */
  1266. /**
  1267. * @}
  1268. */
  1269. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/