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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_usart.c
  4. * @author MCD Application Team
  5. * @version V1.7.1
  6. * @date 14-April-2017
  7. * @brief USART LL module driver.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /* Includes ------------------------------------------------------------------*/
  39. #include "stm32f4xx_ll_usart.h"
  40. #include "stm32f4xx_ll_rcc.h"
  41. #include "stm32f4xx_ll_bus.h"
  42. #ifdef USE_FULL_ASSERT
  43. #include "stm32_assert.h"
  44. #else
  45. #define assert_param(expr) ((void)0U)
  46. #endif
  47. /** @addtogroup STM32F4xx_LL_Driver
  48. * @{
  49. */
  50. #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
  51. /** @addtogroup USART_LL
  52. * @{
  53. */
  54. /* Private types -------------------------------------------------------------*/
  55. /* Private variables ---------------------------------------------------------*/
  56. /* Private constants ---------------------------------------------------------*/
  57. /** @addtogroup USART_LL_Private_Constants
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. /* Private macros ------------------------------------------------------------*/
  64. /** @addtogroup USART_LL_Private_Macros
  65. * @{
  66. */
  67. /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  68. * divided by the smallest oversampling used on the USART (i.e. 8) */
  69. #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
  70. #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  71. || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  72. || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  73. || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  74. #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  75. || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  76. || ((__VALUE__) == LL_USART_PARITY_ODD))
  77. #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  78. || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  79. #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  80. || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  81. #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  82. || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  83. #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  84. || ((__VALUE__) == LL_USART_PHASE_2EDGE))
  85. #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
  86. || ((__VALUE__) == LL_USART_POLARITY_HIGH))
  87. #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
  88. || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
  89. #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
  90. || ((__VALUE__) == LL_USART_STOPBITS_1) \
  91. || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
  92. || ((__VALUE__) == LL_USART_STOPBITS_2))
  93. #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
  94. || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
  95. || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
  96. || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
  97. /**
  98. * @}
  99. */
  100. /* Private function prototypes -----------------------------------------------*/
  101. /* Exported functions --------------------------------------------------------*/
  102. /** @addtogroup USART_LL_Exported_Functions
  103. * @{
  104. */
  105. /** @addtogroup USART_LL_EF_Init
  106. * @{
  107. */
  108. /**
  109. * @brief De-initialize USART registers (Registers restored to their default values).
  110. * @param USARTx USART Instance
  111. * @retval An ErrorStatus enumeration value:
  112. * - SUCCESS: USART registers are de-initialized
  113. * - ERROR: USART registers are not de-initialized
  114. */
  115. ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
  116. {
  117. ErrorStatus status = SUCCESS;
  118. /* Check the parameters */
  119. assert_param(IS_UART_INSTANCE(USARTx));
  120. if (USARTx == USART1)
  121. {
  122. /* Force reset of USART clock */
  123. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
  124. /* Release reset of USART clock */
  125. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
  126. }
  127. else if (USARTx == USART2)
  128. {
  129. /* Force reset of USART clock */
  130. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
  131. /* Release reset of USART clock */
  132. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
  133. }
  134. #if defined(USART3)
  135. else if (USARTx == USART3)
  136. {
  137. /* Force reset of USART clock */
  138. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
  139. /* Release reset of USART clock */
  140. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
  141. }
  142. #endif /* USART3 */
  143. #if defined(USART6)
  144. else if (USARTx == USART6)
  145. {
  146. /* Force reset of USART clock */
  147. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
  148. /* Release reset of USART clock */
  149. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
  150. }
  151. #endif /* USART6 */
  152. #if defined(UART4)
  153. else if (USARTx == UART4)
  154. {
  155. /* Force reset of UART clock */
  156. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
  157. /* Release reset of UART clock */
  158. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
  159. }
  160. #endif /* UART4 */
  161. #if defined(UART5)
  162. else if (USARTx == UART5)
  163. {
  164. /* Force reset of UART clock */
  165. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
  166. /* Release reset of UART clock */
  167. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
  168. }
  169. #endif /* UART5 */
  170. #if defined(UART7)
  171. else if (USARTx == UART7)
  172. {
  173. /* Force reset of UART clock */
  174. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
  175. /* Release reset of UART clock */
  176. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
  177. }
  178. #endif /* UART7 */
  179. #if defined(UART8)
  180. else if (USARTx == UART8)
  181. {
  182. /* Force reset of UART clock */
  183. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
  184. /* Release reset of UART clock */
  185. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
  186. }
  187. #endif /* UART8 */
  188. #if defined(UART9)
  189. else if (USARTx == UART9)
  190. {
  191. /* Force reset of UART clock */
  192. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
  193. /* Release reset of UART clock */
  194. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
  195. }
  196. #endif /* UART9 */
  197. #if defined(UART10)
  198. else if (USARTx == UART10)
  199. {
  200. /* Force reset of UART clock */
  201. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10);
  202. /* Release reset of UART clock */
  203. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10);
  204. }
  205. #endif /* UART10 */
  206. else
  207. {
  208. status = ERROR;
  209. }
  210. return (status);
  211. }
  212. /**
  213. * @brief Initialize USART registers according to the specified
  214. * parameters in USART_InitStruct.
  215. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  216. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  217. * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
  218. * @param USARTx USART Instance
  219. * @param USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
  220. * that contains the configuration information for the specified USART peripheral.
  221. * @retval An ErrorStatus enumeration value:
  222. * - SUCCESS: USART registers are initialized according to USART_InitStruct content
  223. * - ERROR: Problem occurred during USART Registers initialization
  224. */
  225. ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
  226. {
  227. ErrorStatus status = ERROR;
  228. uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
  229. LL_RCC_ClocksTypeDef rcc_clocks;
  230. /* Check the parameters */
  231. assert_param(IS_UART_INSTANCE(USARTx));
  232. assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
  233. assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
  234. assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
  235. assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
  236. assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
  237. assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
  238. assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
  239. /* USART needs to be in disabled state, in order to be able to configure some bits in
  240. CRx registers */
  241. if (LL_USART_IsEnabled(USARTx) == 0U)
  242. {
  243. /*---------------------------- USART CR1 Configuration -----------------------
  244. * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
  245. * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
  246. * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
  247. * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
  248. * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
  249. */
  250. MODIFY_REG(USARTx->CR1,
  251. (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
  252. USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
  253. (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
  254. USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
  255. /*---------------------------- USART CR2 Configuration -----------------------
  256. * Configure USARTx CR2 (Stop bits) with parameters:
  257. * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
  258. * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
  259. */
  260. LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
  261. /*---------------------------- USART CR3 Configuration -----------------------
  262. * Configure USARTx CR3 (Hardware Flow Control) with parameters:
  263. * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
  264. */
  265. LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
  266. /*---------------------------- USART BRR Configuration -----------------------
  267. * Retrieve Clock frequency used for USART Peripheral
  268. */
  269. LL_RCC_GetSystemClocksFreq(&rcc_clocks);
  270. if (USARTx == USART1)
  271. {
  272. periphclk = rcc_clocks.PCLK2_Frequency;
  273. }
  274. else if (USARTx == USART2)
  275. {
  276. periphclk = rcc_clocks.PCLK1_Frequency;
  277. }
  278. #if defined(USART3)
  279. else if (USARTx == USART3)
  280. {
  281. periphclk = rcc_clocks.PCLK1_Frequency;
  282. }
  283. #endif /* USART3 */
  284. #if defined(USART6)
  285. else if (USARTx == USART6)
  286. {
  287. periphclk = rcc_clocks.PCLK2_Frequency;
  288. }
  289. #endif /* USART6 */
  290. #if defined(UART4)
  291. else if (USARTx == UART4)
  292. {
  293. periphclk = rcc_clocks.PCLK1_Frequency;
  294. }
  295. #endif /* UART4 */
  296. #if defined(UART5)
  297. else if (USARTx == UART5)
  298. {
  299. periphclk = rcc_clocks.PCLK1_Frequency;
  300. }
  301. #endif /* UART5 */
  302. #if defined(UART7)
  303. else if (USARTx == UART7)
  304. {
  305. periphclk = rcc_clocks.PCLK1_Frequency;
  306. }
  307. #endif /* UART7 */
  308. #if defined(UART8)
  309. else if (USARTx == UART8)
  310. {
  311. periphclk = rcc_clocks.PCLK1_Frequency;
  312. }
  313. #endif /* UART8 */
  314. #if defined(UART9)
  315. else if (USARTx == UART9)
  316. {
  317. periphclk = rcc_clocks.PCLK1_Frequency;
  318. }
  319. #endif /* UART9 */
  320. #if defined(UART10)
  321. else if (USARTx == UART5)
  322. {
  323. periphclk = rcc_clocks.PCLK1_Frequency;
  324. }
  325. #endif /* UART10 */
  326. else
  327. {
  328. /* Nothing to do, as error code is already assigned to ERROR value */
  329. }
  330. /* Configure the USART Baud Rate :
  331. - valid baud rate value (different from 0) is required
  332. - Peripheral clock as returned by RCC service, should be valid (different from 0).
  333. */
  334. if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
  335. && (USART_InitStruct->BaudRate != 0U))
  336. {
  337. status = SUCCESS;
  338. LL_USART_SetBaudRate(USARTx,
  339. periphclk,
  340. USART_InitStruct->OverSampling,
  341. USART_InitStruct->BaudRate);
  342. }
  343. }
  344. /* Endif (=> USART not in Disabled state => return ERROR) */
  345. return (status);
  346. }
  347. /**
  348. * @brief Set each @ref LL_USART_InitTypeDef field to default value.
  349. * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
  350. * whose fields will be set to default values.
  351. * @retval None
  352. */
  353. void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
  354. {
  355. /* Set USART_InitStruct fields to default values */
  356. USART_InitStruct->BaudRate = 9600U;
  357. USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
  358. USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
  359. USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
  360. USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
  361. USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
  362. USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
  363. }
  364. /**
  365. * @brief Initialize USART Clock related settings according to the
  366. * specified parameters in the USART_ClockInitStruct.
  367. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  368. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  369. * @param USARTx USART Instance
  370. * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
  371. * that contains the Clock configuration information for the specified USART peripheral.
  372. * @retval An ErrorStatus enumeration value:
  373. * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
  374. * - ERROR: Problem occurred during USART Registers initialization
  375. */
  376. ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  377. {
  378. ErrorStatus status = SUCCESS;
  379. /* Check USART Instance and Clock signal output parameters */
  380. assert_param(IS_UART_INSTANCE(USARTx));
  381. assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
  382. /* USART needs to be in disabled state, in order to be able to configure some bits in
  383. CRx registers */
  384. if (LL_USART_IsEnabled(USARTx) == 0U)
  385. {
  386. /*---------------------------- USART CR2 Configuration -----------------------*/
  387. /* If Clock signal has to be output */
  388. if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
  389. {
  390. /* Deactivate Clock signal delivery :
  391. * - Disable Clock Output: USART_CR2_CLKEN cleared
  392. */
  393. LL_USART_DisableSCLKOutput(USARTx);
  394. }
  395. else
  396. {
  397. /* Ensure USART instance is USART capable */
  398. assert_param(IS_USART_INSTANCE(USARTx));
  399. /* Check clock related parameters */
  400. assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
  401. assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
  402. assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
  403. /*---------------------------- USART CR2 Configuration -----------------------
  404. * Configure USARTx CR2 (Clock signal related bits) with parameters:
  405. * - Enable Clock Output: USART_CR2_CLKEN set
  406. * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
  407. * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
  408. * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
  409. */
  410. MODIFY_REG(USARTx->CR2,
  411. USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
  412. USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
  413. USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
  414. }
  415. }
  416. /* Else (USART not in Disabled state => return ERROR */
  417. else
  418. {
  419. status = ERROR;
  420. }
  421. return (status);
  422. }
  423. /**
  424. * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
  425. * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
  426. * whose fields will be set to default values.
  427. * @retval None
  428. */
  429. void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  430. {
  431. /* Set LL_USART_ClockInitStruct fields with default values */
  432. USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
  433. USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  434. USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  435. USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  436. }
  437. /**
  438. * @}
  439. */
  440. /**
  441. * @}
  442. */
  443. /**
  444. * @}
  445. */
  446. #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
  447. /**
  448. * @}
  449. */
  450. #endif /* USE_FULL_LL_DRIVER */
  451. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/