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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32L0xx_HAL_PCD_H
  21. #define STM32L0xx_HAL_PCD_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l0xx_ll_usb.h"
  27. #if defined (USB)
  28. /** @addtogroup STM32L0xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PCD
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup PCD_Exported_Types PCD Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief PCD State structure definition
  40. */
  41. typedef enum
  42. {
  43. HAL_PCD_STATE_RESET = 0x00,
  44. HAL_PCD_STATE_READY = 0x01,
  45. HAL_PCD_STATE_ERROR = 0x02,
  46. HAL_PCD_STATE_BUSY = 0x03,
  47. HAL_PCD_STATE_TIMEOUT = 0x04
  48. } PCD_StateTypeDef;
  49. /* Device LPM suspend state */
  50. typedef enum
  51. {
  52. LPM_L0 = 0x00, /* on */
  53. LPM_L1 = 0x01, /* LPM L1 sleep */
  54. LPM_L2 = 0x02, /* suspend */
  55. LPM_L3 = 0x03, /* off */
  56. } PCD_LPM_StateTypeDef;
  57. typedef enum
  58. {
  59. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  60. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  61. } PCD_LPM_MsgTypeDef;
  62. typedef enum
  63. {
  64. PCD_BCD_ERROR = 0xFF,
  65. PCD_BCD_CONTACT_DETECTION = 0xFE,
  66. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  67. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  68. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  69. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  70. } PCD_BCD_MsgTypeDef;
  71. typedef USB_TypeDef PCD_TypeDef;
  72. typedef USB_CfgTypeDef PCD_InitTypeDef;
  73. typedef USB_EPTypeDef PCD_EPTypeDef;
  74. /**
  75. * @brief PCD Handle Structure definition
  76. */
  77. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  78. typedef struct __PCD_HandleTypeDef
  79. #else
  80. typedef struct
  81. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  82. {
  83. PCD_TypeDef *Instance; /*!< Register base address */
  84. PCD_InitTypeDef Init; /*!< PCD required parameters */
  85. __IO uint8_t USB_Address; /*!< USB Address */
  86. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  87. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  88. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  89. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  90. __IO uint32_t ErrorCode; /*!< PCD Error code */
  91. uint32_t Setup[12]; /*!< Setup packet buffer */
  92. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  93. uint32_t BESL;
  94. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  95. This parameter can be set to ENABLE or DISABLE */
  96. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  97. This parameter can be set to ENABLE or DISABLE */
  98. void *pData; /*!< Pointer to upper stack Handler */
  99. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  100. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  101. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  102. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  103. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  104. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  105. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  106. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  107. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  108. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  109. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  110. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  111. void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
  112. void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
  113. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  114. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  115. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  116. } PCD_HandleTypeDef;
  117. /**
  118. * @}
  119. */
  120. /* Include PCD HAL Extended module */
  121. #include "stm32l0xx_hal_pcd_ex.h"
  122. /* Exported constants --------------------------------------------------------*/
  123. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  124. * @{
  125. */
  126. /** @defgroup PCD_Speed PCD Speed
  127. * @{
  128. */
  129. #define PCD_SPEED_FULL 2U
  130. /**
  131. * @}
  132. */
  133. /** @defgroup PCD_PHY_Module PCD PHY Module
  134. * @{
  135. */
  136. #define PCD_PHY_ULPI 1U
  137. #define PCD_PHY_EMBEDDED 2U
  138. #define PCD_PHY_UTMI 3U
  139. /**
  140. * @}
  141. */
  142. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  143. * @{
  144. */
  145. #ifndef USBD_FS_TRDT_VALUE
  146. #define USBD_FS_TRDT_VALUE 5U
  147. #endif /* USBD_HS_TRDT_VALUE */
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  152. * @brief PCD Error Code definition
  153. * @{
  154. */
  155. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  156. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  157. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  158. /**
  159. * @}
  160. */
  161. /**
  162. * @}
  163. */
  164. /* Exported macros -----------------------------------------------------------*/
  165. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  166. * @brief macros to handle interrupts and specific clock configurations
  167. * @{
  168. */
  169. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  170. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  172. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  173. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  174. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  175. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  176. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  177. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  178. do { \
  179. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  180. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  181. } while(0U)
  182. /**
  183. * @}
  184. */
  185. /* Exported functions --------------------------------------------------------*/
  186. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  187. * @{
  188. */
  189. /* Initialization/de-initialization functions ********************************/
  190. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  191. * @{
  192. */
  193. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  194. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  195. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  196. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  197. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  198. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  199. * @brief HAL USB OTG PCD Callback ID enumeration definition
  200. * @{
  201. */
  202. typedef enum
  203. {
  204. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  205. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  206. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  207. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  208. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  209. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  210. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  211. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  212. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  213. } HAL_PCD_CallbackIDTypeDef;
  214. /**
  215. * @}
  216. */
  217. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  218. * @brief HAL USB OTG PCD Callback pointer definition
  219. * @{
  220. */
  221. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  222. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  223. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  224. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  225. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  226. typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
  227. typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
  228. /**
  229. * @}
  230. */
  231. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  232. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  233. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  234. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  235. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  236. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  237. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  238. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  239. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  240. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  241. HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
  242. HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
  243. HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
  244. HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
  245. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  246. /**
  247. * @}
  248. */
  249. /* I/O operation functions ***************************************************/
  250. /* Non-Blocking mode: Interrupt */
  251. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  252. * @{
  253. */
  254. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  255. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  256. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  257. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  258. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  259. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  260. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  261. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  262. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  263. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  264. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  265. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  266. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  267. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  268. /**
  269. * @}
  270. */
  271. /* Peripheral Control functions **********************************************/
  272. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  273. * @{
  274. */
  275. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  276. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  277. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  278. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  279. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  280. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  281. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  282. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  283. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  284. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  285. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  286. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  287. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  288. /**
  289. * @}
  290. */
  291. /* Peripheral State functions ************************************************/
  292. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  293. * @{
  294. */
  295. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  296. /**
  297. * @}
  298. */
  299. /**
  300. * @}
  301. */
  302. /* Private constants ---------------------------------------------------------*/
  303. /** @defgroup PCD_Private_Constants PCD Private Constants
  304. * @{
  305. */
  306. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  307. * @{
  308. */
  309. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  310. /**
  311. * @}
  312. */
  313. #define EP_ADDR_MSK 0x7U
  314. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  315. * @{
  316. */
  317. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  318. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  319. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  320. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  321. /**
  322. * @}
  323. */
  324. /** @defgroup PCD_ENDP PCD ENDP
  325. * @{
  326. */
  327. #define PCD_ENDP0 0U
  328. #define PCD_ENDP1 1U
  329. #define PCD_ENDP2 2U
  330. #define PCD_ENDP3 3U
  331. #define PCD_ENDP4 4U
  332. #define PCD_ENDP5 5U
  333. #define PCD_ENDP6 6U
  334. #define PCD_ENDP7 7U
  335. /**
  336. * @}
  337. */
  338. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  339. * @{
  340. */
  341. #define PCD_SNG_BUF 0U
  342. #define PCD_DBL_BUF 1U
  343. /**
  344. * @}
  345. */
  346. /**
  347. * @}
  348. */
  349. /* Private macros ------------------------------------------------------------*/
  350. /** @defgroup PCD_Private_Macros PCD Private Macros
  351. * @{
  352. */
  353. /******************** Bit definition for USB_COUNTn_RX register *************/
  354. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  355. #define USB_CNTRX_BLSIZE (0x1U << 15)
  356. /* SetENDPOINT */
  357. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  358. /* GetENDPOINT */
  359. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  360. /* ENDPOINT transfer */
  361. #define USB_EP0StartXfer USB_EPStartXfer
  362. /**
  363. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  364. * @param USBx USB peripheral instance register address.
  365. * @param bEpNum Endpoint Number.
  366. * @param wType Endpoint Type.
  367. * @retval None
  368. */
  369. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  370. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  371. /**
  372. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  373. * @param USBx USB peripheral instance register address.
  374. * @param bEpNum Endpoint Number.
  375. * @retval Endpoint Type
  376. */
  377. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  378. /**
  379. * @brief free buffer used from the application realizing it to the line
  380. * toggles bit SW_BUF in the double buffered endpoint register
  381. * @param USBx USB device.
  382. * @param bEpNum, bDir
  383. * @retval None
  384. */
  385. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  386. if ((bDir) == 0U) \
  387. { \
  388. /* OUT double buffered endpoint */ \
  389. PCD_TX_DTOG((USBx), (bEpNum)); \
  390. } \
  391. else if ((bDir) == 1U) \
  392. { \
  393. /* IN double buffered endpoint */ \
  394. PCD_RX_DTOG((USBx), (bEpNum)); \
  395. } \
  396. } while(0)
  397. /**
  398. * @brief gets direction of the double buffered endpoint
  399. * @param USBx USB peripheral instance register address.
  400. * @param bEpNum Endpoint Number.
  401. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  402. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  403. */
  404. #define PCD_GET_DB_DIR(USBx, bEpNum) do { \
  405. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U) \
  406. { \
  407. return 0U; \
  408. } \
  409. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U) \
  410. { \
  411. return 1U; \
  412. } \
  413. else \
  414. { \
  415. /* ..*/ \
  416. } \
  417. } while(0)
  418. /**
  419. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  420. * @param USBx USB peripheral instance register address.
  421. * @param bEpNum Endpoint Number.
  422. * @param wState new state
  423. * @retval None
  424. */
  425. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  426. register uint16_t _wRegVal; \
  427. \
  428. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  429. /* toggle first bit ? */ \
  430. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  431. { \
  432. _wRegVal ^= USB_EPTX_DTOG1; \
  433. } \
  434. /* toggle second bit ? */ \
  435. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  436. { \
  437. _wRegVal ^= USB_EPTX_DTOG2; \
  438. } \
  439. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  440. } while(0) /* PCD_SET_EP_TX_STATUS */
  441. /**
  442. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  443. * @param USBx USB peripheral instance register address.
  444. * @param bEpNum Endpoint Number.
  445. * @param wState new state
  446. * @retval None
  447. */
  448. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  449. register uint16_t _wRegVal; \
  450. \
  451. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  452. /* toggle first bit ? */ \
  453. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  454. { \
  455. _wRegVal ^= USB_EPRX_DTOG1; \
  456. } \
  457. /* toggle second bit ? */ \
  458. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  459. { \
  460. _wRegVal ^= USB_EPRX_DTOG2; \
  461. } \
  462. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  463. } while(0) /* PCD_SET_EP_RX_STATUS */
  464. /**
  465. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  466. * @param USBx USB peripheral instance register address.
  467. * @param bEpNum Endpoint Number.
  468. * @param wStaterx new state.
  469. * @param wStatetx new state.
  470. * @retval None
  471. */
  472. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  473. register uint16_t _wRegVal; \
  474. \
  475. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  476. /* toggle first bit ? */ \
  477. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  478. { \
  479. _wRegVal ^= USB_EPRX_DTOG1; \
  480. } \
  481. /* toggle second bit ? */ \
  482. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  483. { \
  484. _wRegVal ^= USB_EPRX_DTOG2; \
  485. } \
  486. /* toggle first bit ? */ \
  487. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  488. { \
  489. _wRegVal ^= USB_EPTX_DTOG1; \
  490. } \
  491. /* toggle second bit ? */ \
  492. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  493. { \
  494. _wRegVal ^= USB_EPTX_DTOG2; \
  495. } \
  496. \
  497. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  498. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  499. /**
  500. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  501. * /STAT_RX[1:0])
  502. * @param USBx USB peripheral instance register address.
  503. * @param bEpNum Endpoint Number.
  504. * @retval status
  505. */
  506. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  507. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  508. /**
  509. * @brief sets directly the VALID tx/rx-status into the endpoint register
  510. * @param USBx USB peripheral instance register address.
  511. * @param bEpNum Endpoint Number.
  512. * @retval None
  513. */
  514. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  515. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  516. /**
  517. * @brief checks stall condition in an endpoint.
  518. * @param USBx USB peripheral instance register address.
  519. * @param bEpNum Endpoint Number.
  520. * @retval TRUE = endpoint in stall condition.
  521. */
  522. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  523. == USB_EP_TX_STALL)
  524. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  525. == USB_EP_RX_STALL)
  526. /**
  527. * @brief set & clear EP_KIND bit.
  528. * @param USBx USB peripheral instance register address.
  529. * @param bEpNum Endpoint Number.
  530. * @retval None
  531. */
  532. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  533. register uint16_t _wRegVal; \
  534. \
  535. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  536. \
  537. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  538. } while(0) /* PCD_SET_EP_KIND */
  539. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  540. register uint16_t _wRegVal; \
  541. \
  542. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  543. \
  544. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  545. } while(0) /* PCD_CLEAR_EP_KIND */
  546. /**
  547. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  548. * @param USBx USB peripheral instance register address.
  549. * @param bEpNum Endpoint Number.
  550. * @retval None
  551. */
  552. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  553. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  554. /**
  555. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  556. * @param USBx USB peripheral instance register address.
  557. * @param bEpNum Endpoint Number.
  558. * @retval None
  559. */
  560. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  561. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  562. /**
  563. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  564. * @param USBx USB peripheral instance register address.
  565. * @param bEpNum Endpoint Number.
  566. * @retval None
  567. */
  568. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  569. register uint16_t _wRegVal; \
  570. \
  571. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  572. \
  573. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  574. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  575. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  576. register uint16_t _wRegVal; \
  577. \
  578. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  579. \
  580. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  581. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  582. /**
  583. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  584. * @param USBx USB peripheral instance register address.
  585. * @param bEpNum Endpoint Number.
  586. * @retval None
  587. */
  588. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  589. register uint16_t _wEPVal; \
  590. \
  591. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  592. \
  593. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  594. } while(0) /* PCD_RX_DTOG */
  595. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  596. register uint16_t _wEPVal; \
  597. \
  598. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  599. \
  600. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  601. } while(0) /* PCD_TX_DTOG */
  602. /**
  603. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  604. * @param USBx USB peripheral instance register address.
  605. * @param bEpNum Endpoint Number.
  606. * @retval None
  607. */
  608. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  609. register uint16_t _wRegVal; \
  610. \
  611. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  612. \
  613. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  614. { \
  615. PCD_RX_DTOG((USBx), (bEpNum)); \
  616. } \
  617. } while(0) /* PCD_CLEAR_RX_DTOG */
  618. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  619. register uint16_t _wRegVal; \
  620. \
  621. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  622. \
  623. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  624. { \
  625. PCD_TX_DTOG((USBx), (bEpNum)); \
  626. } \
  627. } while(0) /* PCD_CLEAR_TX_DTOG */
  628. /**
  629. * @brief Sets address in an endpoint register.
  630. * @param USBx USB peripheral instance register address.
  631. * @param bEpNum Endpoint Number.
  632. * @param bAddr Address.
  633. * @retval None
  634. */
  635. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  636. register uint16_t _wRegVal; \
  637. \
  638. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  639. \
  640. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  641. } while(0) /* PCD_SET_EP_ADDRESS */
  642. /**
  643. * @brief Gets address in an endpoint register.
  644. * @param USBx USB peripheral instance register address.
  645. * @param bEpNum Endpoint Number.
  646. * @retval None
  647. */
  648. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  649. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  650. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  651. /**
  652. * @brief sets address of the tx/rx buffer.
  653. * @param USBx USB peripheral instance register address.
  654. * @param bEpNum Endpoint Number.
  655. * @param wAddr address to be set (must be word aligned).
  656. * @retval None
  657. */
  658. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  659. register uint16_t *_wRegVal; \
  660. register uint32_t _wRegBase = (uint32_t)USBx; \
  661. \
  662. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  663. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  664. *_wRegVal = ((wAddr) >> 1) << 1; \
  665. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  666. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  667. register uint16_t *_wRegVal; \
  668. register uint32_t _wRegBase = (uint32_t)USBx; \
  669. \
  670. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  671. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  672. *_wRegVal = ((wAddr) >> 1) << 1; \
  673. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  674. /**
  675. * @brief Gets address of the tx/rx buffer.
  676. * @param USBx USB peripheral instance register address.
  677. * @param bEpNum Endpoint Number.
  678. * @retval address of the buffer.
  679. */
  680. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  681. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  682. /**
  683. * @brief Sets counter of rx buffer with no. of blocks.
  684. * @param pdwReg Register pointer
  685. * @param wCount Counter.
  686. * @param wNBlocks no. of Blocks.
  687. * @retval None
  688. */
  689. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  690. (wNBlocks) = (wCount) >> 5; \
  691. *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  692. } while(0) /* PCD_CALC_BLK32 */
  693. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  694. (wNBlocks) = (wCount) >> 1; \
  695. if (((wCount) & 0x1U) != 0U) \
  696. { \
  697. (wNBlocks)++; \
  698. } \
  699. *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  700. } while(0) /* PCD_CALC_BLK2 */
  701. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
  702. uint32_t wNBlocks; \
  703. if ((wCount) == 0U) \
  704. { \
  705. *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  706. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  707. } \
  708. else if((wCount) < 62U) \
  709. { \
  710. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  711. } \
  712. else \
  713. { \
  714. PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \
  715. } \
  716. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  717. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  718. register uint32_t _wRegBase = (uint32_t)(USBx); \
  719. uint16_t *pdwReg; \
  720. \
  721. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  722. pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  723. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  724. } while(0)
  725. /**
  726. * @brief sets counter for the tx/rx buffer.
  727. * @param USBx USB peripheral instance register address.
  728. * @param bEpNum Endpoint Number.
  729. * @param wCount Counter value.
  730. * @retval None
  731. */
  732. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  733. register uint32_t _wRegBase = (uint32_t)(USBx); \
  734. uint16_t *_wRegVal; \
  735. \
  736. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  737. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  738. *_wRegVal = (uint16_t)(wCount); \
  739. } while(0)
  740. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  741. register uint32_t _wRegBase = (uint32_t)(USBx); \
  742. uint16_t *_wRegVal; \
  743. \
  744. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  745. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  746. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  747. } while(0)
  748. /**
  749. * @brief gets counter of the tx buffer.
  750. * @param USBx USB peripheral instance register address.
  751. * @param bEpNum Endpoint Number.
  752. * @retval Counter value
  753. */
  754. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  755. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  756. /**
  757. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  758. * @param USBx USB peripheral instance register address.
  759. * @param bEpNum Endpoint Number.
  760. * @param wBuf0Addr buffer 0 address.
  761. * @retval Counter value
  762. */
  763. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  764. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  765. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  766. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  767. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  768. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  769. /**
  770. * @brief Sets addresses in a double buffer endpoint.
  771. * @param USBx USB peripheral instance register address.
  772. * @param bEpNum Endpoint Number.
  773. * @param wBuf0Addr: buffer 0 address.
  774. * @param wBuf1Addr = buffer 1 address.
  775. * @retval None
  776. */
  777. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  778. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  779. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  780. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  781. /**
  782. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  783. * @param USBx USB peripheral instance register address.
  784. * @param bEpNum Endpoint Number.
  785. * @retval None
  786. */
  787. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  788. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  789. /**
  790. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  791. * @param USBx USB peripheral instance register address.
  792. * @param bEpNum Endpoint Number.
  793. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  794. * EP_DBUF_IN = IN
  795. * @param wCount: Counter value
  796. * @retval None
  797. */
  798. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  799. if ((bDir) == 0U) \
  800. /* OUT endpoint */ \
  801. { \
  802. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  803. } \
  804. else \
  805. { \
  806. if ((bDir) == 1U) \
  807. { \
  808. /* IN endpoint */ \
  809. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  810. } \
  811. } \
  812. } while(0) /* SetEPDblBuf0Count*/
  813. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  814. register uint32_t _wBase = (uint32_t)(USBx); \
  815. uint16_t *_wEPRegVal; \
  816. \
  817. if ((bDir) == 0U) \
  818. { \
  819. /* OUT endpoint */ \
  820. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  821. } \
  822. else \
  823. { \
  824. if ((bDir) == 1U) \
  825. { \
  826. /* IN endpoint */ \
  827. _wBase += (uint32_t)(USBx)->BTABLE; \
  828. _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  829. *_wEPRegVal = (uint16_t)(wCount); \
  830. } \
  831. } \
  832. } while(0) /* SetEPDblBuf1Count */
  833. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  834. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  835. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  836. } while(0) /* PCD_SET_EP_DBUF_CNT */
  837. /**
  838. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  839. * @param USBx USB peripheral instance register address.
  840. * @param bEpNum Endpoint Number.
  841. * @retval None
  842. */
  843. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  844. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  845. /**
  846. * @}
  847. */
  848. /**
  849. * @}
  850. */
  851. /**
  852. * @}
  853. */
  854. #endif /* defined (USB) */
  855. #ifdef __cplusplus
  856. }
  857. #endif
  858. #endif /* STM32L0xx_HAL_PCD_H */
  859. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/