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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_dac_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended DAC HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of DAC extension peripheral:
  8. * + Extended features functions
  9. *
  10. *
  11. @verbatim
  12. ==============================================================================
  13. ##### How to use this driver #####
  14. ==============================================================================
  15. [..]
  16. (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
  17. Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
  18. HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
  19. (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
  20. (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
  21. @endverbatim
  22. ******************************************************************************
  23. * @attention
  24. *
  25. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  26. * All rights reserved.</center></h2>
  27. *
  28. * This software component is licensed by ST under BSD 3-Clause license,
  29. * the "License"; You may not use this file except in compliance with the
  30. * License. You may obtain a copy of the License at:
  31. * opensource.org/licenses/BSD-3-Clause
  32. *
  33. ******************************************************************************
  34. */
  35. #if !defined (STM32L010xB) && !defined (STM32L010x8) && !defined (STM32L010x6) && !defined (STM32L010x4) && !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32l0xx_hal.h"
  38. #ifdef HAL_DAC_MODULE_ENABLED
  39. /** @addtogroup STM32L0xx_HAL_Driver
  40. * @{
  41. */
  42. /** @addtogroup DACEx DACEx
  43. * @brief DAC driver modules
  44. * @{
  45. */
  46. /** @addtogroup DACEx_Private
  47. * @{
  48. */
  49. /* Private typedef -----------------------------------------------------------*/
  50. /* Private define ------------------------------------------------------------*/
  51. /* Private macro -------------------------------------------------------------*/
  52. /* Private variables ---------------------------------------------------------*/
  53. /* Private function prototypes -----------------------------------------------*/
  54. /* Private functions ---------------------------------------------------------*/
  55. #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
  56. static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
  57. static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
  58. static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
  59. #endif
  60. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
  61. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
  62. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
  63. /**
  64. * @}
  65. */
  66. /** @addtogroup DACEx_Exported_Functions
  67. * @{
  68. */
  69. /** @addtogroup DACEx_Exported_Functions_Group1
  70. * @brief Extended features functions
  71. *
  72. * @{
  73. */
  74. #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
  75. /**
  76. * @brief Returns the last data output value of the selected DAC channel.
  77. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  78. * the configuration information for the specified DAC.
  79. * @retval The selected DAC channel data output value.
  80. */
  81. uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
  82. {
  83. uint32_t tmp = 0U;
  84. tmp |= hdac->Instance->DOR1;
  85. tmp |= hdac->Instance->DOR2 << 16U;
  86. /* Returns the DAC channel data output register value */
  87. return tmp;
  88. }
  89. #endif
  90. /**
  91. * @brief Enable or disable the selected DAC channel wave generation.
  92. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  93. * the configuration information for the specified DAC.
  94. * @param Channel The selected DAC channel.
  95. * This parameter can be one of the following values:
  96. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  97. * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
  98. * @param Amplitude Select max triangle amplitude.
  99. * This parameter can be one of the following values:
  100. * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
  101. * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
  102. * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
  103. * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
  104. * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
  105. * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
  106. * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
  107. * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
  108. * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
  109. * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
  110. * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
  111. * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
  112. * @retval HAL status
  113. */
  114. HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  115. {
  116. /* Check the parameters */
  117. assert_param(IS_DAC_CHANNEL(Channel));
  118. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  119. /* Process locked */
  120. __HAL_LOCK(hdac);
  121. /* Change DAC state */
  122. hdac->State = HAL_DAC_STATE_BUSY;
  123. /* Enable the triangle wave generation for the selected DAC channel */
  124. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
  125. /* Change DAC state */
  126. hdac->State = HAL_DAC_STATE_READY;
  127. /* Process unlocked */
  128. __HAL_UNLOCK(hdac);
  129. /* Return function status */
  130. return HAL_OK;
  131. }
  132. /**
  133. * @brief Enable or disable the selected DAC channel wave generation.
  134. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  135. * the configuration information for the specified DAC.
  136. * @param Channel The selected DAC channel.
  137. * This parameter can be one of the following values:
  138. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  139. * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
  140. * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
  141. * This parameter can be one of the following values:
  142. * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
  143. * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
  144. * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
  145. * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
  146. * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
  147. * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
  148. * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
  149. * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
  150. * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
  151. * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
  152. * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
  153. * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
  154. * @retval HAL status
  155. */
  156. HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  157. {
  158. /* Check the parameters */
  159. assert_param(IS_DAC_CHANNEL(Channel));
  160. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  161. /* Process locked */
  162. __HAL_LOCK(hdac);
  163. /* Change DAC state */
  164. hdac->State = HAL_DAC_STATE_BUSY;
  165. /* Enable the noise wave generation for the selected DAC channel */
  166. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
  167. /* Change DAC state */
  168. hdac->State = HAL_DAC_STATE_READY;
  169. /* Process unlocked */
  170. __HAL_UNLOCK(hdac);
  171. /* Return function status */
  172. return HAL_OK;
  173. }
  174. #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
  175. /**
  176. * @brief Set the specified data holding register value for dual DAC channel.
  177. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  178. * the configuration information for the specified DAC.
  179. * @param Alignment Specifies the data alignment for dual channel DAC.
  180. * This parameter can be one of the following values:
  181. * DAC_ALIGN_8B_R: 8bit right data alignment selected
  182. * DAC_ALIGN_12B_L: 12bit left data alignment selected
  183. * DAC_ALIGN_12B_R: 12bit right data alignment selected
  184. * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
  185. * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
  186. * @note In dual mode, a unique register access is required to write in both
  187. * DAC channels at the same time.
  188. * @retval HAL status
  189. */
  190. HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
  191. {
  192. uint32_t data = 0U, tmp = 0U;
  193. /* Check the parameters */
  194. assert_param(IS_DAC_ALIGN(Alignment));
  195. assert_param(IS_DAC_DATA(Data1));
  196. assert_param(IS_DAC_DATA(Data2));
  197. /* Calculate and set dual DAC data holding register value */
  198. if (Alignment == DAC_ALIGN_8B_R)
  199. {
  200. data = ((uint32_t)Data2 << 8U) | Data1;
  201. }
  202. else
  203. {
  204. data = ((uint32_t)Data2 << 16U) | Data1;
  205. }
  206. tmp = (uint32_t)hdac->Instance;
  207. tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
  208. /* Set the dual DAC selected data holding register */
  209. *(__IO uint32_t *)tmp = data;
  210. /* Return function status */
  211. return HAL_OK;
  212. }
  213. /**
  214. * @brief Conversion complete callback in non blocking mode for Channel2
  215. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  216. * the configuration information for the specified DAC.
  217. * @retval None
  218. */
  219. __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  220. {
  221. /* Prevent unused argument(s) compilation warning */
  222. UNUSED(hdac);
  223. /* NOTE : This function should not be modified, when the callback is needed,
  224. the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
  225. */
  226. }
  227. /**
  228. * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
  229. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  230. * the configuration information for the specified DAC.
  231. * @retval None
  232. */
  233. __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  234. {
  235. /* Prevent unused argument(s) compilation warning */
  236. UNUSED(hdac);
  237. /* NOTE : This function should not be modified, when the callback is needed,
  238. the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
  239. */
  240. }
  241. /**
  242. * @brief Error DAC callback for Channel2.
  243. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  244. * the configuration information for the specified DAC.
  245. * @retval None
  246. */
  247. __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
  248. {
  249. /* Prevent unused argument(s) compilation warning */
  250. UNUSED(hdac);
  251. /* NOTE : This function should not be modified, when the callback is needed,
  252. the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
  253. */
  254. }
  255. /**
  256. * @brief DMA underrun DAC callback for Channel2.
  257. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  258. * the configuration information for the specified DAC.
  259. * @retval None
  260. */
  261. __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
  262. {
  263. /* Prevent unused argument(s) compilation warning */
  264. UNUSED(hdac);
  265. /* NOTE : This function should not be modified, when the callback is needed,
  266. the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
  267. */
  268. }
  269. /**
  270. * @brief Enables DAC and starts conversion of channel.
  271. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  272. * the configuration information for the specified DAC.
  273. * @param Channel The selected DAC channel.
  274. * This parameter can be one of the following values:
  275. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  276. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  277. * @retval HAL status
  278. */
  279. HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
  280. {
  281. uint32_t tmp1 = 0U, tmp2 = 0U;
  282. /* Check the parameters */
  283. assert_param(IS_DAC_CHANNEL(Channel));
  284. /* Process locked */
  285. __HAL_LOCK(hdac);
  286. /* Change DAC state */
  287. hdac->State = HAL_DAC_STATE_BUSY;
  288. /* Enable the Peripharal */
  289. __HAL_DAC_ENABLE(hdac, Channel);
  290. if(Channel == DAC_CHANNEL_1)
  291. {
  292. tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
  293. tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
  294. /* Check if software trigger enabled */
  295. if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
  296. {
  297. /* Enable the selected DAC software conversion */
  298. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
  299. }
  300. }
  301. else
  302. {
  303. tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
  304. tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
  305. /* Check if software trigger enabled */
  306. if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
  307. {
  308. /* Enable the selected DAC software conversion*/
  309. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
  310. }
  311. }
  312. /* Change DAC state */
  313. hdac->State = HAL_DAC_STATE_READY;
  314. /* Process unlocked */
  315. __HAL_UNLOCK(hdac);
  316. /* Return function status */
  317. return HAL_OK;
  318. }
  319. /**
  320. * @brief Enables DAC and starts conversion of channel using DMA.
  321. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  322. * the configuration information for the specified DAC.
  323. * @param Channel The selected DAC channel.
  324. * This parameter can be one of the following values:
  325. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  326. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  327. * @param pData The destination peripheral Buffer address.
  328. * @param Length The length of data to be transferred from memory to DAC peripheral
  329. * @param Alignment Specifies the data alignment for DAC channel.
  330. * This parameter can be one of the following values:
  331. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  332. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  333. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  334. * @retval HAL status
  335. */
  336. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  337. {
  338. uint32_t tmpreg = 0U;
  339. /* Check the parameters */
  340. assert_param(IS_DAC_CHANNEL(Channel));
  341. assert_param(IS_DAC_ALIGN(Alignment));
  342. /* Process locked */
  343. __HAL_LOCK(hdac);
  344. /* Change DAC state */
  345. hdac->State = HAL_DAC_STATE_BUSY;
  346. if(Channel == DAC_CHANNEL_1)
  347. {
  348. /* Set the DMA transfer complete callback for channel1 */
  349. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  350. /* Set the DMA half transfer complete callback for channel1 */
  351. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  352. /* Set the DMA error callback for channel1 */
  353. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  354. /* Enable the selected DAC channel1 DMA request */
  355. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  356. /* Case of use of channel 1 */
  357. switch(Alignment)
  358. {
  359. case DAC_ALIGN_12B_R:
  360. /* Get DHR12R1 address */
  361. tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  362. break;
  363. case DAC_ALIGN_12B_L:
  364. /* Get DHR12L1 address */
  365. tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  366. break;
  367. case DAC_ALIGN_8B_R:
  368. /* Get DHR8R1 address */
  369. tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  370. break;
  371. default:
  372. break;
  373. }
  374. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
  375. }
  376. else
  377. {
  378. /* Set the DMA transfer complete callback for channel2 */
  379. hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  380. /* Set the DMA half transfer complete callback for channel2 */
  381. hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  382. /* Set the DMA error callback for channel2 */
  383. hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  384. /* Enable the selected DAC channel2 DMA request */
  385. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  386. /* Case of use of channel 2 */
  387. switch(Alignment)
  388. {
  389. case DAC_ALIGN_12B_R:
  390. /* Get DHR12R2 address */
  391. tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
  392. break;
  393. case DAC_ALIGN_12B_L:
  394. /* Get DHR12L2 address */
  395. tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
  396. break;
  397. case DAC_ALIGN_8B_R:
  398. /* Get DHR8R2 address */
  399. tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
  400. break;
  401. default:
  402. break;
  403. }
  404. }
  405. /* Enable the DMA Stream */
  406. if(Channel == DAC_CHANNEL_1)
  407. {
  408. /* Enable the DAC DMA underrun interrupt */
  409. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  410. /* Enable the DMA Stream */
  411. HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  412. }
  413. else
  414. {
  415. /* Enable the DAC DMA underrun interrupt */
  416. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  417. /* Enable the DMA Stream */
  418. HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  419. }
  420. /* Enable the Peripharal */
  421. __HAL_DAC_ENABLE(hdac, Channel);
  422. /* Process Unlocked */
  423. __HAL_UNLOCK(hdac);
  424. /* Return function status */
  425. return HAL_OK;
  426. }
  427. /**
  428. * @brief Disables DAC and stop conversion of channel.
  429. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  430. * the configuration information for the specified DAC.
  431. * @param Channel The selected DAC channel.
  432. * This parameter can be one of the following values:
  433. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  434. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  435. * @retval HAL status
  436. */
  437. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  438. {
  439. HAL_StatusTypeDef status = HAL_OK;
  440. /* Check the parameters */
  441. assert_param(IS_DAC_CHANNEL(Channel));
  442. /* Disable the selected DAC channel DMA request */
  443. CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
  444. /* Disable the Peripharal */
  445. __HAL_DAC_DISABLE(hdac, Channel);
  446. /* Disable the DMA Channel */
  447. /* Channel1 is used */
  448. if(Channel == DAC_CHANNEL_1)
  449. {
  450. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  451. }
  452. else /* Channel2 is used for */
  453. {
  454. status = HAL_DMA_Abort(hdac->DMA_Handle2);
  455. }
  456. /* Check if DMA Channel effectively disabled */
  457. if(status != HAL_OK)
  458. {
  459. /* Update DAC state machine to error */
  460. hdac->State = HAL_DAC_STATE_ERROR;
  461. }
  462. else
  463. {
  464. /* Change DAC state */
  465. hdac->State = HAL_DAC_STATE_READY;
  466. }
  467. /* Return function status */
  468. return status;
  469. }
  470. /**
  471. * @brief Returns the last data output value of the selected DAC channel.
  472. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  473. * the configuration information for the specified DAC.
  474. * @param Channel The selected DAC channel.
  475. * This parameter can be one of the following values:
  476. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  477. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  478. * @retval The selected DAC channel data output value.
  479. */
  480. uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
  481. {
  482. /* Check the parameters */
  483. assert_param(IS_DAC_CHANNEL(Channel));
  484. /* Returns the DAC channel data output register value */
  485. if(Channel == DAC_CHANNEL_1)
  486. {
  487. return hdac->Instance->DOR1;
  488. }
  489. else
  490. {
  491. return hdac->Instance->DOR2;
  492. }
  493. }
  494. /**
  495. * @brief Handles DAC interrupt request
  496. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  497. * the configuration information for the specified DAC.
  498. * @retval None
  499. */
  500. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  501. {
  502. /* Check underrun flag of DAC channel 1 */
  503. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  504. {
  505. /* Change DAC state to error state */
  506. hdac->State = HAL_DAC_STATE_ERROR;
  507. /* Set DAC error code to chanel1 DMA underrun error */
  508. hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
  509. /* Clear the underrun flag */
  510. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  511. /* Disable the selected DAC channel1 DMA request */
  512. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  513. /* Error callback */
  514. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  515. hdac->DMAUnderrunCallbackCh1(hdac);
  516. #else
  517. HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  518. #endif
  519. }
  520. /* Check underrun flag of DAC channel 2 */
  521. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
  522. {
  523. /* Change DAC state to error state */
  524. hdac->State = HAL_DAC_STATE_ERROR;
  525. /* Set DAC error code to channel2 DMA underrun error */
  526. hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
  527. /* Clear the underrun flag */
  528. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
  529. /* Disable the selected DAC channel1 DMA request */
  530. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  531. /* Error callback */
  532. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  533. hdac->DMAUnderrunCallbackCh2(hdac);
  534. #else
  535. HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
  536. #endif
  537. }
  538. }
  539. /**
  540. * @brief Set the specified data holding register value for DAC channel.
  541. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  542. * the configuration information for the specified DAC.
  543. * @param Channel The selected DAC channel.
  544. * This parameter can be one of the following values:
  545. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  546. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  547. * @param Alignment Specifies the data alignment.
  548. * This parameter can be one of the following values:
  549. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  550. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  551. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  552. * @param Data Data to be loaded in the selected data holding register.
  553. * @retval HAL status
  554. */
  555. HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
  556. {
  557. __IO uint32_t tmp = 0U;
  558. /* Check the parameters */
  559. assert_param(IS_DAC_CHANNEL(Channel));
  560. assert_param(IS_DAC_ALIGN(Alignment));
  561. assert_param(IS_DAC_DATA(Data));
  562. tmp = (uint32_t)hdac->Instance;
  563. if(Channel == DAC_CHANNEL_1)
  564. {
  565. tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
  566. }
  567. else
  568. {
  569. tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
  570. }
  571. /* Set the DAC channel selected data holding register */
  572. *(__IO uint32_t *) tmp = Data;
  573. /* Return function status */
  574. return HAL_OK;
  575. }
  576. #else /* All products with only one channel */
  577. /**
  578. * @brief Enables DAC and starts conversion of channel.
  579. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  580. * the configuration information for the specified DAC.
  581. * @param Channel The selected DAC channel.
  582. * This parameter can be one of the following values:
  583. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  584. * @retval HAL status
  585. */
  586. HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
  587. {
  588. uint32_t tmp1 = 0U, tmp2 = 0U;
  589. /* Check the parameters */
  590. assert_param(IS_DAC_CHANNEL(Channel));
  591. /* Process locked */
  592. __HAL_LOCK(hdac);
  593. /* Change DAC state */
  594. hdac->State = HAL_DAC_STATE_BUSY;
  595. /* Enable the Peripharal */
  596. __HAL_DAC_ENABLE(hdac, Channel);
  597. tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
  598. tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
  599. /* Check if software trigger enabled */
  600. if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
  601. {
  602. /* Enable the selected DAC software conversion */
  603. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
  604. }
  605. /* Change DAC state */
  606. hdac->State = HAL_DAC_STATE_READY;
  607. /* Process unlocked */
  608. __HAL_UNLOCK(hdac);
  609. /* Return function status */
  610. return HAL_OK;
  611. }
  612. /**
  613. * @brief Enables DAC and starts conversion of channel using DMA.
  614. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  615. * the configuration information for the specified DAC.
  616. * @param Channel The selected DAC channel.
  617. * This parameter can be one of the following values:
  618. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  619. * @param pData The destination peripheral Buffer address.
  620. * @param Length The length of data to be transferred from memory to DAC peripheral
  621. * @param Alignment Specifies the data alignment for DAC channel.
  622. * This parameter can be one of the following values:
  623. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  624. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  625. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  626. * @retval HAL status
  627. */
  628. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  629. {
  630. uint32_t tmpreg = 0U;
  631. /* Check the parameters */
  632. assert_param(IS_DAC_CHANNEL(Channel));
  633. assert_param(IS_DAC_ALIGN(Alignment));
  634. /* Process locked */
  635. __HAL_LOCK(hdac);
  636. /* Change DAC state */
  637. hdac->State = HAL_DAC_STATE_BUSY;
  638. /* Set the DMA transfer complete callback for channel1 */
  639. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  640. /* Set the DMA half transfer complete callback for channel1 */
  641. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  642. /* Set the DMA error callback for channel1 */
  643. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  644. /* Enable the selected DAC channel1 DMA request */
  645. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  646. /* Case of use of channel 1 */
  647. switch(Alignment)
  648. {
  649. case DAC_ALIGN_12B_R:
  650. /* Get DHR12R1 address */
  651. tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  652. break;
  653. case DAC_ALIGN_12B_L:
  654. /* Get DHR12L1 address */
  655. tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  656. break;
  657. case DAC_ALIGN_8B_R:
  658. /* Get DHR8R1 address */
  659. tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  660. break;
  661. default:
  662. break;
  663. }
  664. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
  665. /* Enable the DMA Stream */
  666. /* Enable the DAC DMA underrun interrupt */
  667. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  668. /* Enable the DMA Stream */
  669. HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  670. /* Enable the Peripharal */
  671. __HAL_DAC_ENABLE(hdac, Channel);
  672. /* Process Unlocked */
  673. __HAL_UNLOCK(hdac);
  674. /* Return function status */
  675. return HAL_OK;
  676. }
  677. /**
  678. * @brief Disables DAC and stop conversion of channel.
  679. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  680. * the configuration information for the specified DAC.
  681. * @param Channel The selected DAC channel.
  682. * This parameter can be one of the following values:
  683. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  684. * @retval HAL status
  685. */
  686. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  687. {
  688. HAL_StatusTypeDef status = HAL_OK;
  689. /* Check the parameters */
  690. assert_param(IS_DAC_CHANNEL(Channel));
  691. /* Disable the selected DAC channel DMA request */
  692. CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
  693. /* Disable the Peripharal */
  694. __HAL_DAC_DISABLE(hdac, Channel);
  695. /* Disable the DMA Channel */
  696. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  697. /* Check if DMA Channel effectively disabled */
  698. if(status != HAL_OK)
  699. {
  700. /* Update DAC state machine to error */
  701. hdac->State = HAL_DAC_STATE_ERROR;
  702. }
  703. else
  704. {
  705. /* Change DAC state */
  706. hdac->State = HAL_DAC_STATE_READY;
  707. }
  708. /* Return function status */
  709. return status;
  710. }
  711. /**
  712. * @brief Returns the last data output value of the selected DAC channel.
  713. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  714. * the configuration information for the specified DAC.
  715. * @param Channel The selected DAC channel.
  716. * This parameter can be one of the following values:
  717. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  718. * @retval The selected DAC channel data output value.
  719. */
  720. uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
  721. {
  722. /* Check the parameters */
  723. assert_param(IS_DAC_CHANNEL(Channel));
  724. /* Returns the DAC channel data output register value */
  725. return hdac->Instance->DOR1;
  726. }
  727. /**
  728. * @brief Handles DAC interrupt request
  729. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  730. * the configuration information for the specified DAC.
  731. * @retval None
  732. */
  733. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  734. {
  735. /* Check underrun flag of DAC channel 1 */
  736. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  737. {
  738. /* Change DAC state to error state */
  739. hdac->State = HAL_DAC_STATE_ERROR;
  740. /* Set DAC error code to chanel1 DMA underrun error */
  741. hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
  742. /* Clear the underrun flag */
  743. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  744. /* Disable the selected DAC channel1 DMA request */
  745. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  746. /* Error callback */
  747. HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  748. }
  749. }
  750. /**
  751. * @brief Set the specified data holding register value for DAC channel.
  752. * @param hdac pointer to a DAC_HandleTypeDef structure that contains
  753. * the configuration information for the specified DAC.
  754. * @param Channel The selected DAC channel.
  755. * This parameter can be one of the following values:
  756. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  757. * @param Alignment Specifies the data alignment.
  758. * This parameter can be one of the following values:
  759. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  760. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  761. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  762. * @param Data Data to be loaded in the selected data holding register.
  763. * @retval HAL status
  764. */
  765. HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
  766. {
  767. __IO uint32_t tmp = 0U;
  768. /* Check the parameters */
  769. assert_param(IS_DAC_CHANNEL(Channel));
  770. assert_param(IS_DAC_ALIGN(Alignment));
  771. assert_param(IS_DAC_DATA(Data));
  772. tmp = (uint32_t)hdac->Instance;
  773. tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
  774. /* Set the DAC channel selected data holding register */
  775. *(__IO uint32_t *) tmp = Data;
  776. /* Return function status */
  777. return HAL_OK;
  778. }
  779. #endif /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
  780. /**
  781. * @}
  782. */
  783. /**
  784. * @}
  785. */
  786. /** @addtogroup DACEx_Private
  787. * @{
  788. */
  789. #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
  790. /**
  791. * @brief DMA conversion complete callback.
  792. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  793. * the configuration information for the specified DMA module.
  794. * @retval None
  795. */
  796. static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
  797. {
  798. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  799. HAL_DACEx_ConvCpltCallbackCh2(hdac);
  800. hdac->State= HAL_DAC_STATE_READY;
  801. }
  802. /**
  803. * @brief DMA half transfer complete callback.
  804. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  805. * the configuration information for the specified DMA module.
  806. * @retval None
  807. */
  808. static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
  809. {
  810. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  811. /* Conversion complete callback */
  812. HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
  813. }
  814. /**
  815. * @brief DMA error callback
  816. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  817. * the configuration information for the specified DMA module.
  818. * @retval None
  819. */
  820. static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
  821. {
  822. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  823. /* Set DAC error code to DMA error */
  824. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  825. HAL_DACEx_ErrorCallbackCh2(hdac);
  826. hdac->State= HAL_DAC_STATE_READY;
  827. }
  828. #endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
  829. /**
  830. * @brief DMA conversion complete callback.
  831. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  832. * the configuration information for the specified DMA module.
  833. * @retval None
  834. */
  835. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
  836. {
  837. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  838. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  839. hdac->ConvCpltCallbackCh1(hdac);
  840. #else
  841. HAL_DAC_ConvCpltCallbackCh1(hdac);
  842. #endif
  843. hdac->State= HAL_DAC_STATE_READY;
  844. }
  845. /**
  846. * @brief DMA half transfer complete callback.
  847. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  848. * the configuration information for the specified DMA module.
  849. * @retval None
  850. */
  851. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
  852. {
  853. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  854. /* Conversion complete callback */
  855. #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  856. hdac->ConvHalfCpltCallbackCh1(hdac);
  857. #else
  858. HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
  859. #endif
  860. }
  861. /**
  862. * @brief DMA error callback
  863. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  864. * the configuration information for the specified DMA module.
  865. * @retval None
  866. */
  867. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
  868. {
  869. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  870. /* Set DAC error code to DMA error */
  871. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  872. HAL_DAC_ErrorCallbackCh1(hdac);
  873. hdac->State= HAL_DAC_STATE_READY;
  874. }
  875. /**
  876. * @}
  877. */
  878. /**
  879. * @}
  880. */
  881. /**
  882. * @}
  883. */
  884. #endif /* HAL_DAC_MODULE_ENABLED */
  885. #endif /* #if !defined (STM32L010xB) && !defined (STM32L010x8) && !defined (STM32L010x6) && !defined (STM32L010x4) && !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
  886. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/