You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 

940 lines
44 KiB

  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_flash.h
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief Header file of FLASH HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L4xx_HAL_FLASH_H
  39. #define __STM32L4xx_HAL_FLASH_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32l4xx_hal_def.h"
  45. /** @addtogroup STM32L4xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup FLASH
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup FLASH_Exported_Types FLASH Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief FLASH Erase structure definition
  57. */
  58. typedef struct
  59. {
  60. uint32_t TypeErase; /*!< Mass erase or page erase.
  61. This parameter can be a value of @ref FLASH_Type_Erase */
  62. uint32_t Banks; /*!< Select bank to erase.
  63. This parameter must be a value of @ref FLASH_Banks
  64. (FLASH_BANK_BOTH should be used only for mass erase) */
  65. uint32_t Page; /*!< Initial Flash page to erase when page erase is disabled
  66. This parameter must be a value between 0 and (max number of pages in the bank - 1)
  67. (eg : 255 for 1MB dual bank) */
  68. uint32_t NbPages; /*!< Number of pages to be erased.
  69. This parameter must be a value between 1 and (max number of pages in the bank - value of initial page)*/
  70. } FLASH_EraseInitTypeDef;
  71. /**
  72. * @brief FLASH Option Bytes Program structure definition
  73. */
  74. typedef struct
  75. {
  76. uint32_t OptionType; /*!< Option byte to be configured.
  77. This parameter can be a combination of the values of @ref FLASH_OB_Type */
  78. uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP).
  79. Only one WRP area could be programmed at the same time.
  80. This parameter can be value of @ref FLASH_OB_WRP_Area */
  81. uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP).
  82. This parameter must be a value between 0 and (max number of pages in the bank - 1)
  83. (eg : 25 for 1MB dual bank) */
  84. uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP).
  85. This parameter must be a value between WRPStartOffset and (max number of pages in the bank - 1) */
  86. uint32_t RDPLevel; /*!< Set the read protection level.. (used for OPTIONBYTE_RDP).
  87. This parameter can be a value of @ref FLASH_OB_Read_Protection */
  88. uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER).
  89. This parameter can be a combination of @ref FLASH_OB_USER_Type */
  90. uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER).
  91. This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
  92. @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
  93. @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW,
  94. @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
  95. @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_BFB2,
  96. @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_nBOOT1,
  97. @ref FLASH_OB_USER_SRAM2_PE and @ref FLASH_OB_USER_SRAM2_RST */
  98. uint32_t PCROPConfig; /*!< Configuration of the PCROP (used for OPTIONBYTE_PCROP).
  99. This parameter must be a combination of @ref FLASH_Banks (except FLASH_BANK_BOTH)
  100. and @ref FLASH_OB_PCROP_RDP */
  101. uint32_t PCROPStartAddr; /*!< PCROP Start address (used for OPTIONBYTE_PCROP).
  102. This parameter must be a value between begin and end of bank
  103. => Be careful of the bank swapping for the address */
  104. uint32_t PCROPEndAddr; /*!< PCROP End address (used for OPTIONBYTE_PCROP).
  105. This parameter must be a value between PCROP Start address and end of bank */
  106. } FLASH_OBProgramInitTypeDef;
  107. /**
  108. * @brief FLASH Procedure structure definition
  109. */
  110. typedef enum
  111. {
  112. FLASH_PROC_NONE = 0,
  113. FLASH_PROC_PAGE_ERASE,
  114. FLASH_PROC_MASS_ERASE,
  115. FLASH_PROC_PROGRAM,
  116. FLASH_PROC_PROGRAM_LAST
  117. } FLASH_ProcedureTypeDef;
  118. /**
  119. * @brief FLASH Cache structure definition
  120. */
  121. typedef enum
  122. {
  123. FLASH_CACHE_DISABLED = 0,
  124. FLASH_CACHE_ICACHE_ENABLED,
  125. FLASH_CACHE_DCACHE_ENABLED,
  126. FLASH_CACHE_ICACHE_DCACHE_ENABLED
  127. } FLASH_CacheTypeDef;
  128. /**
  129. * @brief FLASH handle Structure definition
  130. */
  131. typedef struct
  132. {
  133. HAL_LockTypeDef Lock; /* FLASH locking object */
  134. __IO uint32_t ErrorCode; /* FLASH error code */
  135. __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */
  136. __IO uint32_t Address; /* Internal variable to save address selected for program in IT context */
  137. __IO uint32_t Bank; /* Internal variable to save current bank selected during erase in IT context */
  138. __IO uint32_t Page; /* Internal variable to define the current page which is erasing in IT context */
  139. __IO uint32_t NbPagesToErase; /* Internal variable to save the remaining pages to erase in IT context */
  140. __IO FLASH_CacheTypeDef CacheToReactivate; /* Internal variable to indicate which caches should be reactivated */
  141. }FLASH_ProcessTypeDef;
  142. /**
  143. * @}
  144. */
  145. /* Exported constants --------------------------------------------------------*/
  146. /** @defgroup FLASH_Exported_Constants FLASH Exported Constants
  147. * @{
  148. */
  149. /** @defgroup FLASH_Error FLASH Error
  150. * @{
  151. */
  152. #define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000)
  153. #define HAL_FLASH_ERROR_OP ((uint32_t)0x00000001)
  154. #define HAL_FLASH_ERROR_PROG ((uint32_t)0x00000002)
  155. #define HAL_FLASH_ERROR_WRP ((uint32_t)0x00000004)
  156. #define HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008)
  157. #define HAL_FLASH_ERROR_SIZ ((uint32_t)0x00000010)
  158. #define HAL_FLASH_ERROR_PGS ((uint32_t)0x00000020)
  159. #define HAL_FLASH_ERROR_MIS ((uint32_t)0x00000040)
  160. #define HAL_FLASH_ERROR_FAST ((uint32_t)0x00000080)
  161. #define HAL_FLASH_ERROR_RD ((uint32_t)0x00000100)
  162. #define HAL_FLASH_ERROR_OPTV ((uint32_t)0x00000200)
  163. #define HAL_FLASH_ERROR_ECCD ((uint32_t)0x00000400)
  164. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
  165. defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx)
  166. #define HAL_FLASH_ERROR_PEMPTY ((uint32_t)0x00000800)
  167. #endif
  168. /**
  169. * @}
  170. */
  171. /** @defgroup FLASH_Type_Erase FLASH Erase Type
  172. * @{
  173. */
  174. #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
  175. #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!<Flash mass erase activation*/
  176. /**
  177. * @}
  178. */
  179. /** @defgroup FLASH_Banks FLASH Banks
  180. * @{
  181. */
  182. #define FLASH_BANK_1 ((uint32_t)0x01) /*!< Bank 1 */
  183. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  184. defined (STM32L496xx) || defined (STM32L4A6xx)
  185. #define FLASH_BANK_2 ((uint32_t)0x02) /*!< Bank 2 */
  186. #define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) /*!< Bank1 and Bank2 */
  187. #else
  188. #define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1)) /*!< Bank 1 */
  189. #endif
  190. /**
  191. * @}
  192. */
  193. /** @defgroup FLASH_Type_Program FLASH Program Type
  194. * @{
  195. */
  196. #define FLASH_TYPEPROGRAM_DOUBLEWORD ((uint32_t)0x00) /*!<Program a double-word (64-bit) at a specified address.*/
  197. #define FLASH_TYPEPROGRAM_FAST ((uint32_t)0x01) /*!<Fast program a 32 row double-word (64-bit) at a specified address.
  198. And another 32 row double-word (64-bit) will be programmed */
  199. #define FLASH_TYPEPROGRAM_FAST_AND_LAST ((uint32_t)0x02) /*!<Fast program a 32 row double-word (64-bit) at a specified address.
  200. And this is the last 32 row double-word (64-bit) programmed */
  201. /**
  202. * @}
  203. */
  204. /** @defgroup FLASH_OB_Type FLASH Option Bytes Type
  205. * @{
  206. */
  207. #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */
  208. #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */
  209. #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */
  210. #define OPTIONBYTE_PCROP ((uint32_t)0x08) /*!< PCROP option byte configuration */
  211. /**
  212. * @}
  213. */
  214. /** @defgroup FLASH_OB_WRP_Area FLASH WRP Area
  215. * @{
  216. */
  217. #define OB_WRPAREA_BANK1_AREAA ((uint32_t)0x00) /*!< Flash Bank 1 Area A */
  218. #define OB_WRPAREA_BANK1_AREAB ((uint32_t)0x01) /*!< Flash Bank 1 Area B */
  219. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  220. defined (STM32L496xx) || defined (STM32L4A6xx)
  221. #define OB_WRPAREA_BANK2_AREAA ((uint32_t)0x02) /*!< Flash Bank 2 Area A */
  222. #define OB_WRPAREA_BANK2_AREAB ((uint32_t)0x04) /*!< Flash Bank 2 Area B */
  223. #endif
  224. /**
  225. * @}
  226. */
  227. /** @defgroup FLASH_OB_Read_Protection FLASH Option Bytes Read Protection
  228. * @{
  229. */
  230. #define OB_RDP_LEVEL_0 ((uint32_t)0xAA)
  231. #define OB_RDP_LEVEL_1 ((uint32_t)0xBB)
  232. #define OB_RDP_LEVEL_2 ((uint32_t)0xCC) /*!< Warning: When enabling read protection level 2
  233. it's no more possible to go back to level 1 or 0 */
  234. /**
  235. * @}
  236. */
  237. /** @defgroup FLASH_OB_USER_Type FLASH Option Bytes User Type
  238. * @{
  239. */
  240. #define OB_USER_BOR_LEV ((uint32_t)0x0001) /*!< BOR reset Level */
  241. #define OB_USER_nRST_STOP ((uint32_t)0x0002) /*!< Reset generated when entering the stop mode */
  242. #define OB_USER_nRST_STDBY ((uint32_t)0x0004) /*!< Reset generated when entering the standby mode */
  243. #define OB_USER_IWDG_SW ((uint32_t)0x0008) /*!< Independent watchdog selection */
  244. #define OB_USER_IWDG_STOP ((uint32_t)0x0010) /*!< Independent watchdog counter freeze in stop mode */
  245. #define OB_USER_IWDG_STDBY ((uint32_t)0x0020) /*!< Independent watchdog counter freeze in standby mode */
  246. #define OB_USER_WWDG_SW ((uint32_t)0x0040) /*!< Window watchdog selection */
  247. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  248. defined (STM32L496xx) || defined (STM32L4A6xx)
  249. #define OB_USER_BFB2 ((uint32_t)0x0080) /*!< Dual-bank boot */
  250. #define OB_USER_DUALBANK ((uint32_t)0x0100) /*!< Dual-Bank on 512KB or 256KB Flash memory devices */
  251. #endif
  252. #define OB_USER_nBOOT1 ((uint32_t)0x0200) /*!< Boot configuration */
  253. #define OB_USER_SRAM2_PE ((uint32_t)0x0400) /*!< SRAM2 parity check enable */
  254. #define OB_USER_SRAM2_RST ((uint32_t)0x0800) /*!< SRAM2 Erase when system reset */
  255. #define OB_USER_nRST_SHDW ((uint32_t)0x1000) /*!< Reset generated when entering the shutdown mode */
  256. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \
  257. defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
  258. defined (STM32L496xx) || defined (STM32L4A6xx)
  259. #define OB_USER_nSWBOOT0 ((uint32_t)0x2000) /*!< Software BOOT0 */
  260. #define OB_USER_nBOOT0 ((uint32_t)0x4000) /*!< nBOOT0 option bit */
  261. #endif
  262. /**
  263. * @}
  264. */
  265. /** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level
  266. * @{
  267. */
  268. #define OB_BOR_LEVEL_0 ((uint32_t)FLASH_OPTR_BOR_LEV_0) /*!< Reset level threshold is around 1.7V */
  269. #define OB_BOR_LEVEL_1 ((uint32_t)FLASH_OPTR_BOR_LEV_1) /*!< Reset level threshold is around 2.0V */
  270. #define OB_BOR_LEVEL_2 ((uint32_t)FLASH_OPTR_BOR_LEV_2) /*!< Reset level threshold is around 2.2V */
  271. #define OB_BOR_LEVEL_3 ((uint32_t)FLASH_OPTR_BOR_LEV_3) /*!< Reset level threshold is around 2.5V */
  272. #define OB_BOR_LEVEL_4 ((uint32_t)FLASH_OPTR_BOR_LEV_4) /*!< Reset level threshold is around 2.8V */
  273. /**
  274. * @}
  275. */
  276. /** @defgroup FLASH_OB_USER_nRST_STOP FLASH Option Bytes User Reset On Stop
  277. * @{
  278. */
  279. #define OB_STOP_RST ((uint32_t)0x0000) /*!< Reset generated when entering the stop mode */
  280. #define OB_STOP_NORST ((uint32_t)FLASH_OPTR_nRST_STOP) /*!< No reset generated when entering the stop mode */
  281. /**
  282. * @}
  283. */
  284. /** @defgroup FLASH_OB_USER_nRST_STANDBY FLASH Option Bytes User Reset On Standby
  285. * @{
  286. */
  287. #define OB_STANDBY_RST ((uint32_t)0x0000) /*!< Reset generated when entering the standby mode */
  288. #define OB_STANDBY_NORST ((uint32_t)FLASH_OPTR_nRST_STDBY) /*!< No reset generated when entering the standby mode */
  289. /**
  290. * @}
  291. */
  292. /** @defgroup FLASH_OB_USER_nRST_SHUTDOWN FLASH Option Bytes User Reset On Shutdown
  293. * @{
  294. */
  295. #define OB_SHUTDOWN_RST ((uint32_t)0x0000) /*!< Reset generated when entering the shutdown mode */
  296. #define OB_SHUTDOWN_NORST ((uint32_t)FLASH_OPTR_nRST_SHDW) /*!< No reset generated when entering the shutdown mode */
  297. /**
  298. * @}
  299. */
  300. /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG Type
  301. * @{
  302. */
  303. #define OB_IWDG_HW ((uint32_t)0x00000) /*!< Hardware independent watchdog */
  304. #define OB_IWDG_SW ((uint32_t)FLASH_OPTR_IWDG_SW) /*!< Software independent watchdog */
  305. /**
  306. * @}
  307. */
  308. /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Mode On Stop
  309. * @{
  310. */
  311. #define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Stop mode */
  312. #define OB_IWDG_STOP_RUN ((uint32_t)FLASH_OPTR_IWDG_STOP) /*!< Independent watchdog counter is running in Stop mode */
  313. /**
  314. * @}
  315. */
  316. /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Mode On Standby
  317. * @{
  318. */
  319. #define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Standby mode */
  320. #define OB_IWDG_STDBY_RUN ((uint32_t)FLASH_OPTR_IWDG_STDBY) /*!< Independent watchdog counter is running in Standby mode */
  321. /**
  322. * @}
  323. */
  324. /** @defgroup FLASH_OB_USER_WWDG_SW FLASH Option Bytes User WWDG Type
  325. * @{
  326. */
  327. #define OB_WWDG_HW ((uint32_t)0x00000) /*!< Hardware window watchdog */
  328. #define OB_WWDG_SW ((uint32_t)FLASH_OPTR_WWDG_SW) /*!< Software window watchdog */
  329. /**
  330. * @}
  331. */
  332. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  333. defined (STM32L496xx) || defined (STM32L4A6xx)
  334. /** @defgroup FLASH_OB_USER_BFB2 FLASH Option Bytes User BFB2 Mode
  335. * @{
  336. */
  337. #define OB_BFB2_DISABLE ((uint32_t)0x000000) /*!< Dual-bank boot disable */
  338. #define OB_BFB2_ENABLE ((uint32_t)FLASH_OPTR_BFB2) /*!< Dual-bank boot enable */
  339. /**
  340. * @}
  341. */
  342. /** @defgroup FLASH_OB_USER_DUALBANK FLASH Option Bytes User Dual-bank Type
  343. * @{
  344. */
  345. #define OB_DUALBANK_SINGLE ((uint32_t)0x000000) /*!< 256 KB/512 KB Single-bank Flash */
  346. #define OB_DUALBANK_DUAL ((uint32_t)FLASH_OPTR_DUALBANK) /*!< 256 KB/512 KB Dual-bank Flash */
  347. /**
  348. * @}
  349. */
  350. #endif
  351. /** @defgroup FLASH_OB_USER_nBOOT1 FLASH Option Bytes User BOOT1 Type
  352. * @{
  353. */
  354. #define OB_BOOT1_SRAM ((uint32_t)0x000000) /*!< Embedded SRAM1 is selected as boot space (if BOOT0=1) */
  355. #define OB_BOOT1_SYSTEM ((uint32_t)FLASH_OPTR_nBOOT1) /*!< System memory is selected as boot space (if BOOT0=1) */
  356. /**
  357. * @}
  358. */
  359. /** @defgroup FLASH_OB_USER_SRAM2_PE FLASH Option Bytes User SRAM2 Parity Check Type
  360. * @{
  361. */
  362. #define OB_SRAM2_PARITY_ENABLE ((uint32_t)0x0000000) /*!< SRAM2 parity check enable */
  363. #define OB_SRAM2_PARITY_DISABLE ((uint32_t)FLASH_OPTR_SRAM2_PE) /*!< SRAM2 parity check disable */
  364. /**
  365. * @}
  366. */
  367. /** @defgroup FLASH_OB_USER_SRAM2_RST FLASH Option Bytes User SRAM2 Erase On Reset Type
  368. * @{
  369. */
  370. #define OB_SRAM2_RST_ERASE ((uint32_t)0x0000000) /*!< SRAM2 erased when a system reset occurs */
  371. #define OB_SRAM2_RST_NOT_ERASE ((uint32_t)FLASH_OPTR_SRAM2_RST) /*!< SRAM2 is not erased when a system reset occurs */
  372. /**
  373. * @}
  374. */
  375. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \
  376. defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
  377. defined (STM32L496xx) || defined (STM32L4A6xx)
  378. /** @defgroup OB_USER_nSWBOOT0 FLASH Option Bytes User Software BOOT0
  379. * @{
  380. */
  381. #define OB_BOOT0_FROM_OB ((uint32_t)0x0000000) /*!< BOOT0 taken from the option bit nBOOT0 */
  382. #define OB_BOOT0_FROM_PIN ((uint32_t)FLASH_OPTR_nSWBOOT0) /*!< BOOT0 taken from PH3/BOOT0 pin */
  383. /**
  384. * @}
  385. */
  386. /** @defgroup OB_USER_nBOOT0 FLASH Option Bytes User nBOOT0 option bit
  387. * @{
  388. */
  389. #define OB_BOOT0_RESET ((uint32_t)0x0000000) /*!< nBOOT0 = 0 */
  390. #define OB_BOOT0_SET ((uint32_t)FLASH_OPTR_nBOOT0) /*!< nBOOT0 = 1 */
  391. /**
  392. * @}
  393. */
  394. #endif
  395. /** @defgroup FLASH_OB_PCROP_RDP FLASH Option Bytes PCROP On RDP Level Type
  396. * @{
  397. */
  398. #define OB_PCROP_RDP_NOT_ERASE ((uint32_t)0x00000000) /*!< PCROP area is not erased when the RDP level
  399. is decreased from Level 1 to Level 0 */
  400. #define OB_PCROP_RDP_ERASE ((uint32_t)FLASH_PCROP1ER_PCROP_RDP) /*!< PCROP area is erased when the RDP level is
  401. decreased from Level 1 to Level 0 (full mass erase) */
  402. /**
  403. * @}
  404. */
  405. /** @defgroup FLASH_Latency FLASH Latency
  406. * @{
  407. */
  408. #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero wait state */
  409. #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One wait state */
  410. #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two wait states */
  411. #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three wait states */
  412. #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four wait states */
  413. /**
  414. * @}
  415. */
  416. /** @defgroup FLASH_Keys FLASH Keys
  417. * @{
  418. */
  419. #define FLASH_KEY1 ((uint32_t)0x45670123U) /*!< Flash key1 */
  420. #define FLASH_KEY2 ((uint32_t)0xCDEF89ABU) /*!< Flash key2: used with FLASH_KEY1
  421. to unlock the FLASH registers access */
  422. #define FLASH_PDKEY1 ((uint32_t)0x04152637U) /*!< Flash power down key1 */
  423. #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1
  424. to unlock the RUN_PD bit in FLASH_ACR */
  425. #define FLASH_OPTKEY1 ((uint32_t)0x08192A3BU) /*!< Flash option byte key1 */
  426. #define FLASH_OPTKEY2 ((uint32_t)0x4C5D6E7FU) /*!< Flash option byte key2: used with FLASH_OPTKEY1
  427. to allow option bytes operations */
  428. /**
  429. * @}
  430. */
  431. /** @defgroup FLASH_Flags FLASH Flags Definition
  432. * @{
  433. */
  434. #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of operation flag */
  435. #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< FLASH Operation error flag */
  436. #define FLASH_FLAG_PROGERR FLASH_SR_PROGERR /*!< FLASH Programming error flag */
  437. #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protection error flag */
  438. #define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming alignment error flag */
  439. #define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */
  440. #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< FLASH Programming sequence error flag */
  441. #define FLASH_FLAG_MISERR FLASH_SR_MISERR /*!< FLASH Fast programming data miss error flag */
  442. #define FLASH_FLAG_FASTERR FLASH_SR_FASTERR /*!< FLASH Fast programming error flag */
  443. #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< FLASH PCROP read error flag */
  444. #define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option validity error flag */
  445. #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
  446. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
  447. defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx)
  448. #define FLASH_FLAG_PEMPTY FLASH_SR_PEMPTY /*!< FLASH Program empty */
  449. #endif
  450. #define FLASH_FLAG_ECCC FLASH_ECCR_ECCC /*!< FLASH ECC correction */
  451. #define FLASH_FLAG_ECCD FLASH_ECCR_ECCD /*!< FLASH ECC detection */
  452. #define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \
  453. FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | FLASH_FLAG_PGSERR | \
  454. FLASH_FLAG_MISERR | FLASH_FLAG_FASTERR | FLASH_FLAG_RDERR | \
  455. FLASH_FLAG_OPTVERR | FLASH_FLAG_ECCD)
  456. /**
  457. * @}
  458. */
  459. /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition
  460. * @brief FLASH Interrupt definition
  461. * @{
  462. */
  463. #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
  464. #define FLASH_IT_OPERR FLASH_CR_ERRIE /*!< Error Interrupt source */
  465. #define FLASH_IT_RDERR FLASH_CR_RDERRIE /*!< PCROP Read Error Interrupt source*/
  466. #define FLASH_IT_ECCC (FLASH_ECCR_ECCIE >> 24) /*!< ECC Correction Interrupt source */
  467. /**
  468. * @}
  469. */
  470. /**
  471. * @}
  472. */
  473. /* Exported macros -----------------------------------------------------------*/
  474. /** @defgroup FLASH_Exported_Macros FLASH Exported Macros
  475. * @brief macros to control FLASH features
  476. * @{
  477. */
  478. /**
  479. * @brief Set the FLASH Latency.
  480. * @param __LATENCY__: FLASH Latency
  481. * This parameter can be one of the following values :
  482. * @arg FLASH_LATENCY_0: FLASH Zero wait state
  483. * @arg FLASH_LATENCY_1: FLASH One wait state
  484. * @arg FLASH_LATENCY_2: FLASH Two wait states
  485. * @arg FLASH_LATENCY_3: FLASH Three wait states
  486. * @arg FLASH_LATENCY_4: FLASH Four wait states
  487. * @retval None
  488. */
  489. #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__)))
  490. /**
  491. * @brief Get the FLASH Latency.
  492. * @retval FLASH Latency
  493. * This parameter can be one of the following values :
  494. * @arg FLASH_LATENCY_0: FLASH Zero wait state
  495. * @arg FLASH_LATENCY_1: FLASH One wait state
  496. * @arg FLASH_LATENCY_2: FLASH Two wait states
  497. * @arg FLASH_LATENCY_3: FLASH Three wait states
  498. * @arg FLASH_LATENCY_4: FLASH Four wait states
  499. */
  500. #define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)
  501. /**
  502. * @brief Enable the FLASH prefetch buffer.
  503. * @retval None
  504. */
  505. #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN)
  506. /**
  507. * @brief Disable the FLASH prefetch buffer.
  508. * @retval None
  509. */
  510. #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN)
  511. /**
  512. * @brief Enable the FLASH instruction cache.
  513. * @retval none
  514. */
  515. #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN)
  516. /**
  517. * @brief Disable the FLASH instruction cache.
  518. * @retval none
  519. */
  520. #define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN)
  521. /**
  522. * @brief Enable the FLASH data cache.
  523. * @retval none
  524. */
  525. #define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN)
  526. /**
  527. * @brief Disable the FLASH data cache.
  528. * @retval none
  529. */
  530. #define __HAL_FLASH_DATA_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN)
  531. /**
  532. * @brief Reset the FLASH instruction Cache.
  533. * @note This function must be used only when the Instruction Cache is disabled.
  534. * @retval None
  535. */
  536. #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \
  537. CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \
  538. } while (0)
  539. /**
  540. * @brief Reset the FLASH data Cache.
  541. * @note This function must be used only when the data Cache is disabled.
  542. * @retval None
  543. */
  544. #define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \
  545. CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); \
  546. } while (0)
  547. /**
  548. * @brief Enable the FLASH power down during Low-power run mode.
  549. * @note Writing this bit to 0 this bit, automatically the keys are
  550. * loss and a new unlock sequence is necessary to re-write it to 1.
  551. */
  552. #define __HAL_FLASH_POWER_DOWN_ENABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \
  553. WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \
  554. SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \
  555. } while (0)
  556. /**
  557. * @brief Disable the FLASH power down during Low-power run mode.
  558. * @note Writing this bit to 0 this bit, automatically the keys are
  559. * loss and a new unlock sequence is necessary to re-write it to 1.
  560. */
  561. #define __HAL_FLASH_POWER_DOWN_DISABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \
  562. WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \
  563. CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \
  564. } while (0)
  565. /**
  566. * @brief Enable the FLASH power down during Low-Power sleep mode
  567. * @retval none
  568. */
  569. #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
  570. /**
  571. * @brief Disable the FLASH power down during Low-Power sleep mode
  572. * @retval none
  573. */
  574. #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
  575. /**
  576. * @}
  577. */
  578. /** @defgroup FLASH_Interrupt FLASH Interrupts Macros
  579. * @brief macros to handle FLASH interrupts
  580. * @{
  581. */
  582. /**
  583. * @brief Enable the specified FLASH interrupt.
  584. * @param __INTERRUPT__: FLASH interrupt
  585. * This parameter can be any combination of the following values:
  586. * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
  587. * @arg FLASH_IT_OPERR: Error Interrupt
  588. * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt
  589. * @arg FLASH_IT_ECCC: ECC Correction Interrupt
  590. * @retval none
  591. */
  592. #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\
  593. if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\
  594. } while(0)
  595. /**
  596. * @brief Disable the specified FLASH interrupt.
  597. * @param __INTERRUPT__: FLASH interrupt
  598. * This parameter can be any combination of the following values:
  599. * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
  600. * @arg FLASH_IT_OPERR: Error Interrupt
  601. * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt
  602. * @arg FLASH_IT_ECCC: ECC Correction Interrupt
  603. * @retval none
  604. */
  605. #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\
  606. if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\
  607. } while(0)
  608. /**
  609. * @brief Check whether the specified FLASH flag is set or not.
  610. * @param __FLAG__: specifies the FLASH flag to check.
  611. * This parameter can be one of the following values:
  612. * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
  613. * @arg FLASH_FLAG_OPERR: FLASH Operation error flag
  614. * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag
  615. * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag
  616. * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag
  617. * @arg FLASH_FLAG_SIZERR: FLASH Size error flag
  618. * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag
  619. * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag
  620. * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag
  621. * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag
  622. * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag
  623. * @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag
  624. * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices)
  625. * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected
  626. * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected
  627. * @retval The new state of FLASH_FLAG (SET or RESET).
  628. */
  629. #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) ? \
  630. (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
  631. (READ_BIT(FLASH->SR, (__FLAG__)) == (__FLAG__)))
  632. /**
  633. * @brief Clear the FLASH's pending flags.
  634. * @param __FLAG__: specifies the FLASH flags to clear.
  635. * This parameter can be any combination of the following values:
  636. * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
  637. * @arg FLASH_FLAG_OPERR: FLASH Operation error flag
  638. * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag
  639. * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag
  640. * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag
  641. * @arg FLASH_FLAG_SIZERR: FLASH Size error flag
  642. * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag
  643. * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag
  644. * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag
  645. * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag
  646. * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag
  647. * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected
  648. * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected
  649. * @arg FLASH_FLAG_ALL_ERRORS: FLASH All errors flags
  650. * @retval None
  651. */
  652. #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\
  653. if((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { WRITE_REG(FLASH->SR, ((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\
  654. } while(0)
  655. /**
  656. * @}
  657. */
  658. /* Include FLASH HAL Extended module */
  659. #include "stm32l4xx_hal_flash_ex.h"
  660. #include "stm32l4xx_hal_flash_ramfunc.h"
  661. /* Exported functions --------------------------------------------------------*/
  662. /** @addtogroup FLASH_Exported_Functions
  663. * @{
  664. */
  665. /* Program operation functions ***********************************************/
  666. /** @addtogroup FLASH_Exported_Functions_Group1
  667. * @{
  668. */
  669. HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
  670. HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
  671. /* FLASH IRQ handler method */
  672. void HAL_FLASH_IRQHandler(void);
  673. /* Callbacks in non blocking modes */
  674. void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
  675. void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
  676. /**
  677. * @}
  678. */
  679. /* Peripheral Control functions **********************************************/
  680. /** @addtogroup FLASH_Exported_Functions_Group2
  681. * @{
  682. */
  683. HAL_StatusTypeDef HAL_FLASH_Unlock(void);
  684. HAL_StatusTypeDef HAL_FLASH_Lock(void);
  685. /* Option bytes control */
  686. HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
  687. HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
  688. HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
  689. /**
  690. * @}
  691. */
  692. /* Peripheral State functions ************************************************/
  693. /** @addtogroup FLASH_Exported_Functions_Group3
  694. * @{
  695. */
  696. uint32_t HAL_FLASH_GetError(void);
  697. /**
  698. * @}
  699. */
  700. /**
  701. * @}
  702. */
  703. /* Private constants --------------------------------------------------------*/
  704. /** @defgroup FLASH_Private_Constants FLASH Private Constants
  705. * @{
  706. */
  707. #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
  708. #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  709. #define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x200 << 10) : \
  710. (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10))
  711. #else
  712. #define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x400 << 10) : \
  713. (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10))
  714. #endif
  715. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  716. defined (STM32L496xx) || defined (STM32L4A6xx)
  717. #define FLASH_BANK_SIZE (FLASH_SIZE >> 1)
  718. #else
  719. #define FLASH_BANK_SIZE (FLASH_SIZE)
  720. #endif
  721. #define FLASH_PAGE_SIZE ((uint32_t)0x800)
  722. #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
  723. /**
  724. * @}
  725. */
  726. /* Private macros ------------------------------------------------------------*/
  727. /** @defgroup FLASH_Private_Macros FLASH Private Macros
  728. * @{
  729. */
  730. #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \
  731. ((VALUE) == FLASH_TYPEERASE_MASSERASE))
  732. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  733. defined (STM32L496xx) || defined (STM32L4A6xx)
  734. #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
  735. ((BANK) == FLASH_BANK_2) || \
  736. ((BANK) == FLASH_BANK_BOTH))
  737. #define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \
  738. ((BANK) == FLASH_BANK_2))
  739. #else
  740. #define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1)
  741. #define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1)
  742. #endif
  743. #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \
  744. ((VALUE) == FLASH_TYPEPROGRAM_FAST) || \
  745. ((VALUE) == FLASH_TYPEPROGRAM_FAST_AND_LAST))
  746. #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? \
  747. ((ADDRESS) <= FLASH_BASE+0xFFFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? \
  748. ((ADDRESS) <= FLASH_BASE+0x7FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? \
  749. ((ADDRESS) <= FLASH_BASE+0x3FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? \
  750. ((ADDRESS) <= FLASH_BASE+0x1FFFF) : ((ADDRESS) <= FLASH_BASE+0xFFFFF))))))
  751. #define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= 0x1FFF7000) && ((ADDRESS) <= 0x1FFF73FF))
  752. #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) || IS_FLASH_OTP_ADDRESS(ADDRESS))
  753. #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx)
  754. #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? ((PAGE) < 256) : \
  755. ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \
  756. ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \
  757. ((PAGE) < 256)))))
  758. #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  759. #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 256) : \
  760. ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \
  761. ((PAGE) < 256))))
  762. #else
  763. #define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \
  764. ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \
  765. ((PAGE) < 128))))
  766. #endif
  767. #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP)))
  768. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  769. defined (STM32L496xx) || defined (STM32L4A6xx)
  770. #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB) || \
  771. ((VALUE) == OB_WRPAREA_BANK2_AREAA) || ((VALUE) == OB_WRPAREA_BANK2_AREAB))
  772. #else
  773. #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB))
  774. #endif
  775. #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
  776. ((LEVEL) == OB_RDP_LEVEL_1)/* ||\
  777. ((LEVEL) == OB_RDP_LEVEL_2)*/)
  778. #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx)
  779. #define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x1FFF) && ((TYPE) != 0))
  780. #else
  781. #define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x7E7F) && ((TYPE) != 0) && (((TYPE)&0x0180) == 0))
  782. #endif
  783. #define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \
  784. ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \
  785. ((LEVEL) == OB_BOR_LEVEL_4))
  786. #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST))
  787. #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST))
  788. #define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST))
  789. #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW))
  790. #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN))
  791. #define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN))
  792. #define IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW))
  793. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  794. defined (STM32L496xx) || defined (STM32L4A6xx)
  795. #define IS_OB_USER_BFB2(VALUE) (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE))
  796. #define IS_OB_USER_DUALBANK(VALUE) (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL))
  797. #endif
  798. #define IS_OB_USER_BOOT1(VALUE) (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM))
  799. #define IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE))
  800. #define IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE))
  801. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \
  802. defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
  803. defined (STM32L496xx) || defined (STM32L4A6xx)
  804. #define IS_OB_USER_SWBOOT0(VALUE) (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN))
  805. #define IS_OB_USER_BOOT0(VALUE) (((VALUE) == OB_BOOT0_RESET) || ((VALUE) == OB_BOOT0_SET))
  806. #endif
  807. #define IS_OB_PCROP_RDP(VALUE) (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE))
  808. #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
  809. ((LATENCY) == FLASH_LATENCY_1) || \
  810. ((LATENCY) == FLASH_LATENCY_2) || \
  811. ((LATENCY) == FLASH_LATENCY_3) || \
  812. ((LATENCY) == FLASH_LATENCY_4))
  813. /**
  814. * @}
  815. */
  816. /**
  817. * @}
  818. */
  819. /**
  820. * @}
  821. */
  822. #ifdef __cplusplus
  823. }
  824. #endif
  825. #endif /* __STM32L4xx_HAL_FLASH_H */
  826. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/