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stm32lib/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32l4xx_hal_tim_ex.h

  4.   * @author  MCD Application Team

  5.   * @version V1.7.2

  6.   * @date    16-June-2017

  7.   * @brief   Header file of TIM HAL Extended module.

  8.   ******************************************************************************

  9.   * @attention

  10.   *

  11.   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>

  12.   *

  13.   * Redistribution and use in source and binary forms, with or without modification,

  14.   * are permitted provided that the following conditions are met:

  15.   *   1. Redistributions of source code must retain the above copyright notice,

  16.   *      this list of conditions and the following disclaimer.

  17.   *   2. Redistributions in binary form must reproduce the above copyright notice,

  18.   *      this list of conditions and the following disclaimer in the documentation

  19.   *      and/or other materials provided with the distribution.

  20.   *   3. Neither the name of STMicroelectronics nor the names of its contributors

  21.   *      may be used to endorse or promote products derived from this software

  22.   *      without specific prior written permission.

  23.   *

  24.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  25.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  26.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  27.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  28.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  29.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  30.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  31.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  32.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  33.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  34.   *

  35.   ******************************************************************************

  36.   */

  37. 

  38. /* Define to prevent recursive inclusion -------------------------------------*/

  39. #ifndef __STM32L4xx_HAL_TIM_EX_H

  40. #define __STM32L4xx_HAL_TIM_EX_H

  41. 

  42. #ifdef __cplusplus

  43.  extern "C" {

  44. #endif

  45. 

  46. /* Includes ------------------------------------------------------------------*/

  47. #include "stm32l4xx_hal_def.h"

  48. 

  49. /** @addtogroup STM32L4xx_HAL_Driver

  50.   * @{

  51.   */

  52. 

  53. /** @addtogroup TIMEx

  54.   * @{

  55.   */

  56. 

  57. /* Exported types ------------------------------------------------------------*/

  58. /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types

  59.   * @{

  60.   */

  61. 

  62. /**

  63.   * @brief  TIM Hall sensor Configuration Structure definition

  64.   */

  65. 

  66. typedef struct

  67. {

  68. 

  69.   uint32_t IC1Polarity;         /*!< Specifies the active edge of the input signal.

  70.                                      This parameter can be a value of @ref TIM_Input_Capture_Polarity */

  71. 

  72.   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.

  73.                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */

  74. 

  75.   uint32_t IC1Filter;           /*!< Specifies the input capture filter.

  76.                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */

  77. 

  78.   uint32_t Commutation_Delay;   /*!< Specifies the pulse value to be loaded into the Capture Compare Register.

  79.                                      This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */

  80. } TIM_HallSensor_InitTypeDef;

  81. 

  82. /**

  83.   * @brief  TIM Break/Break2 input configuration

  84.   */

  85. typedef struct {

  86.   uint32_t Source;         /*!< Specifies the source of the timer break input.

  87.                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */

  88.   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.

  89.                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */

  90.   uint32_t Polarity;       /*!< Specifies the break input source polarity.

  91.                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity

  92.                                 Not relevant when analog watchdog output of the DFSDM1 used as break input source */

  93. } TIMEx_BreakInputConfigTypeDef;

  94. 

  95. /**

  96.   * @}

  97.   */

  98. /* End of exported types -----------------------------------------------------*/

  99. 

  100. /* Exported constants --------------------------------------------------------*/

  101. /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants

  102.   * @{

  103.   */

  104. 

  105. /** @defgroup TIMEx_Remap TIM  Extended Remapping

  106.   * @{

  107.   */

  108. #define TIM_TIM1_ETR_ADC1_NONE      ((uint32_t)(0x00000000))                              /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/

  109. #define TIM_TIM1_ETR_ADC1_AWD1      (TIM1_OR1_ETR_ADC1_RMP_0)                             /* !< TIM1_ETR is connected to ADC1 AWD1 */

  110. #define TIM_TIM1_ETR_ADC1_AWD2      (TIM1_OR1_ETR_ADC1_RMP_1)                             /* !< TIM1_ETR is connected to ADC1 AWD2 */

  111. #define TIM_TIM1_ETR_ADC1_AWD3      (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0)   /* !< TIM1_ETR is connected to ADC1 AWD3 */

  112. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  113.     defined (STM32L496xx) || defined (STM32L4A6xx)

  114. #define TIM_TIM1_ETR_ADC3_NONE      ((uint32_t)(0x00000000))                              /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/

  115. #define TIM_TIM1_ETR_ADC3_AWD1      (TIM1_OR1_ETR_ADC3_RMP_0)                             /* !< TIM1_ETR is connected to ADC3 AWD1 */

  116. #define TIM_TIM1_ETR_ADC3_AWD2      (TIM1_OR1_ETR_ADC3_RMP_1)                             /* !< TIM1_ETR is connected to ADC3 AWD2 */

  117. #define TIM_TIM1_ETR_ADC3_AWD3      (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0)   /* !< TIM1_ETR is connected to ADC3 AWD3 */

  118. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  119.        /* STM32L496xx || STM32L4A6xx */

  120. #define TIM_TIM1_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM1 TI1 is connected to GPIO */

  121. #define TIM_TIM1_TI1_COMP1          (TIM1_OR1_TI1_RMP)                                    /* !< TIM1 TI1 is connected to COMP1 */

  122. #define TIM_TIM1_ETR_COMP1          (TIM1_OR2_ETRSEL_0)                                   /* !< TIM1_ETR is connected to COMP1 output */

  123. #define TIM_TIM1_ETR_COMP2          (TIM1_OR2_ETRSEL_1)                                   /* !< TIM1_ETR is connected to COMP2 output */

  124. 

  125. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  126.     defined (STM32L496xx) || defined (STM32L4A6xx)

  127. #define TIM_TIM2_ITR1_TIM8_TRGO     ((uint32_t)(0x00000000))                              /* !< TIM2_ITR1 is connected to TIM8_TRGO */

  128. #define TIM_TIM2_ITR1_OTG_FS_SOF    (TIM2_OR1_ITR1_RMP)                                   /* !< TIM2_ITR1 is connected to OTG_FS SOF */

  129. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  130.        /* STM32L496xx || STM32L4A6xx */

  131. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \

  132.     defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)

  133. #define TIM_TIM2_ITR1_NONE          ((uint32_t)(0x00000000))                              /* !< No internal trigger on TIM2_ITR1 */

  134. #define TIM_TIM2_ITR1_USB_SOF       (TIM2_OR1_ITR1_RMP)                                   /* !< TIM2_ITR1 is connected to USB SOF */

  135. #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */

  136.        /* STM32L451xx || STM32L452xx || STM32L462xx */

  137. #define TIM_TIM2_ETR_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM2_ETR is connected to GPIO */

  138. #define TIM_TIM2_ETR_LSE            (TIM2_OR1_ETR1_RMP)                                   /* !< TIM2_ETR is connected to LSE */

  139. #define TIM_TIM2_ETR_COMP1          (TIM2_OR2_ETRSEL_0)                                   /* !< TIM2_ETR is connected to COMP1 output */

  140. #define TIM_TIM2_ETR_COMP2          (TIM2_OR2_ETRSEL_1)                                   /* !< TIM2_ETR is connected to COMP2 output */

  141. #define TIM_TIM2_TI4_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM2 TI4 is connected to GPIO */

  142. #define TIM_TIM2_TI4_COMP1          (TIM2_OR1_TI4_RMP_0)                                  /* !< TIM2 TI4 is connected to COMP1 output */

  143. #define TIM_TIM2_TI4_COMP2          (TIM2_OR1_TI4_RMP_1)                                  /* !< TIM2 TI4 is connected to COMP2 output */

  144. #define TIM_TIM2_TI4_COMP1_COMP2    (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0)              /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */

  145. 

  146. #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \

  147.     defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  148.     defined (STM32L496xx) || defined (STM32L4A6xx)

  149. #define TIM_TIM3_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM3 TI1 is connected to GPIO */

  150. #define TIM_TIM3_TI1_COMP1          (TIM3_OR1_TI1_RMP_0)                                  /* !< TIM3 TI1 is connected to COMP1 output */

  151. #define TIM_TIM3_TI1_COMP2          (TIM3_OR1_TI1_RMP_1)                                  /* !< TIM3 TI1 is connected to COMP2 output */

  152. #define TIM_TIM3_TI1_COMP1_COMP2    (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0)             /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */

  153. #define TIM_TIM3_ETR_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM3_ETR is connected to GPIO */

  154. #define TIM_TIM3_ETR_COMP1          (TIM3_OR2_ETRSEL_0)                                   /* !< TIM3_ETR is connected to COMP1 output */

  155. #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */

  156.        /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  157.        /* STM32L496xx || STM32L4A6xx */

  158. 

  159. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  160.     defined (STM32L496xx) || defined (STM32L4A6xx)

  161. #define TIM_TIM8_ETR_ADC2_NONE      ((uint32_t)(0x00000000))                              /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/

  162. #define TIM_TIM8_ETR_ADC2_AWD1      (TIM8_OR1_ETR_ADC2_RMP_0)                             /* !< TIM8_ETR is connected to ADC2 AWD1 */

  163. #define TIM_TIM8_ETR_ADC2_AWD2      (TIM8_OR1_ETR_ADC2_RMP_1)                             /* !< TIM8_ETR is connected to ADC2 AWD2 */

  164. #define TIM_TIM8_ETR_ADC2_AWD3      (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0)   /* !< TIM8_ETR is connected to ADC2 AWD3 */

  165. #define TIM_TIM8_ETR_ADC3_NONE      ((uint32_t)(0x00000000))                              /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/

  166. #define TIM_TIM8_ETR_ADC3_AWD1      (TIM8_OR1_ETR_ADC3_RMP_0)                             /* !< TIM8_ETR is connected to ADC3 AWD1 */

  167. #define TIM_TIM8_ETR_ADC3_AWD2      (TIM8_OR1_ETR_ADC3_RMP_1)                             /* !< TIM8_ETR is connected to ADC3 AWD2 */

  168. #define TIM_TIM8_ETR_ADC3_AWD3      (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0)   /* !< TIM8_ETR is connected to ADC3 AWD3 */

  169. #define TIM_TIM8_ETR_COMP1          (TIM8_OR2_ETRSEL_0)                                   /* !< TIM8_ETR is connected to COMP1 output */

  170. #define TIM_TIM8_ETR_COMP2          (TIM8_OR2_ETRSEL_1)                                   /* !< TIM8_ETR is connected to COMP2 output */

  171. #define TIM_TIM8_TI1_GPIO           ((uint32_t)(0x00000000))                              /* !< TIM8 TI1 is connected to GPIO */

  172. #define TIM_TIM8_TI1_COMP2          (TIM8_OR1_TI1_RMP)                                    /* !< TIM8 TI1 is connected to COMP1 */

  173. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  174.        /* STM32L496xx || STM32L4A6xx */

  175. 

  176. #define TIM_TIM15_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM15 TI1 is connected to GPIO */

  177. #define TIM_TIM15_TI1_LSE           (TIM15_OR1_TI1_RMP)                                   /* !< TIM15 TI1 is connected to LSE */

  178. #define TIM_TIM15_ENCODERMODE_NONE  ((uint32_t)(0x00000000))                              /* !< No redirection */

  179. #define TIM_TIM15_ENCODERMODE_TIM2  (TIM15_OR1_ENCODER_MODE_0)                            /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */

  180. #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \

  181.     defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  182.     defined (STM32L496xx) || defined (STM32L4A6xx)

  183. #define TIM_TIM15_ENCODERMODE_TIM3  (TIM15_OR1_ENCODER_MODE_1)                            /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */

  184. #endif /* STM32L451xx || STM32L452xx || STM32L462xx */

  185.        /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  186.        /* STM32L496xx || STM32L4A6xx */

  187. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  188.     defined (STM32L496xx) || defined (STM32L4A6xx)

  189. #define TIM_TIM15_ENCODERMODE_TIM4  (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */

  190. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  191.        /* STM32L496xx || STM32L4A6xx */

  192. 

  193. #define TIM_TIM16_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM16 TI1 is connected to GPIO */

  194. #define TIM_TIM16_TI1_LSI           (TIM16_OR1_TI1_RMP_0)                                 /* !< TIM16 TI1 is connected to LSI */

  195. #define TIM_TIM16_TI1_LSE           (TIM16_OR1_TI1_RMP_1)                                 /* !< TIM16 TI1 is connected to LSE */

  196. #define TIM_TIM16_TI1_RTC           (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0)           /* !< TIM16 TI1 is connected to RTC wakeup interrupt */

  197. #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \

  198.     defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \

  199.     defined (STM32L496xx) || defined (STM32L4A6xx)

  200. #define TIM_TIM16_TI1_MSI           (TIM16_OR1_TI1_RMP_2)                                 /* !< TIM16 TI1 is connected to MSI */

  201. #define TIM_TIM16_TI1_HSE_32        (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0)           /* !< TIM16 TI1 is connected to HSE div 32 */

  202. #define TIM_TIM16_TI1_MCO           (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1)           /* !< TIM16 TI1 is connected to MCO */

  203. #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */

  204.        /* STM32L451xx || STM32L452xx || STM32L462xx || */

  205.        /* STM32L496xx || STM32L4A6xx */

  206. 

  207. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  208.     defined (STM32L496xx) || defined (STM32L4A6xx)

  209. #define TIM_TIM17_TI1_GPIO          ((uint32_t)(0x00000000))                              /* !< TIM17 TI1 is connected to GPIO */

  210. #define TIM_TIM17_TI1_MSI           (TIM17_OR1_TI1_RMP_0)                                 /* !< TIM17 TI1 is connected to MSI */

  211. #define TIM_TIM17_TI1_HSE_32        (TIM17_OR1_TI1_RMP_1)                                 /* !< TIM17 TI1 is connected to HSE div 32 */

  212. #define TIM_TIM17_TI1_MCO           (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0)           /* !< TIM17 TI1 is connected to MCO */

  213. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  214.        /* STM32L496xx || STM32L4A6xx */

  215. /**

  216.   * @}

  217.   */

  218. 

  219. /** @defgroup TIMEx_Break_Input TIM  Extended Break input

  220.   * @{

  221.   */

  222. #define TIM_BREAKINPUT_BRK     ((uint32_t)(0x00000001)) /* !< Timer break input  */

  223. #define TIM_BREAKINPUT_BRK2    ((uint32_t)(0x00000002)) /* !< Timer break2 input */

  224. /**

  225.   * @}

  226.   */

  227. 

  228. /** @defgroup TIMEx_Break_Input_Source TIM  Extended Break input source

  229.   * @{

  230.   */

  231. #define TIM_BREAKINPUTSOURCE_BKIN     ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin  */

  232. #define TIM_BREAKINPUTSOURCE_COMP1    ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */

  233. #define TIM_BREAKINPUTSOURCE_COMP2    ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */

  234. #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \

  235.     defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  236.     defined (STM32L496xx) || defined (STM32L4A6xx)

  237. #define TIM_BREAKINPUTSOURCE_DFSDM1   ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */

  238. #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */

  239.        /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */

  240.        /* STM32L496xx || STM32L4A6xx */

  241. /**

  242.   * @}

  243.   */

  244. 

  245. /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling

  246.   * @{

  247.   */

  248. #define TIM_BREAKINPUTSOURCE_DISABLE     ((uint32_t)(0x00000000)) /* !< Break input source is disabled */

  249. #define TIM_BREAKINPUTSOURCE_ENABLE      ((uint32_t)(0x00000001)) /* !< Break input source is enabled */

  250. /**

  251.   * @}

  252.   */

  253. 

  254. /** @defgroup TIMEx_Break_Input_Source_Polarity TIM  Extended Break input polarity

  255.   * @{

  256.   */

  257. #define TIM_BREAKINPUTSOURCE_POLARITY_LOW     ((uint32_t)(0x00000001)) /* !< Break input source is active low */

  258. #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH    ((uint32_t)(0x00000000)) /* !< Break input source is active_high */

  259. /**

  260.   * @}

  261.   */

  262. 

  263. /**

  264.   * @}

  265.   */

  266. /* End of exported constants -------------------------------------------------*/

  267. 

  268. /* Exported macro ------------------------------------------------------------*/

  269. /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros

  270.   * @{

  271.   */

  272. 

  273. /**

  274.   * @}

  275.   */

  276. /* End of exported macro -----------------------------------------------------*/

  277. 

  278. /* Private macro -------------------------------------------------------------*/

  279. /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros

  280.   * @{

  281.   */

  282. #define IS_TIM_REMAP(__REMAP__)    (((__REMAP__) <= (uint32_t)0x0001C01F))

  283. 

  284. #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \

  285.                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))

  286. 

  287. #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \

  288.     defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \

  289.     defined (STM32L496xx) || defined (STM32L4A6xx)

  290. #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)  || \

  291.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \

  292.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \

  293.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))

  294. #else

  295. #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)  || \

  296.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \

  297.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2))

  298. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */

  299. 

  300. #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \

  301.                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))

  302. 

  303. #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)  (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW)  || \

  304.                                                          ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))

  305. /**

  306.   * @}

  307.   */

  308. /* End of private macro ------------------------------------------------------*/

  309. 

  310. /* Exported functions --------------------------------------------------------*/

  311. /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions

  312.   * @{

  313.   */

  314. 

  315. /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions

  316.  *  @brief    Timer Hall Sensor functions

  317.  * @{

  318.  */

  319. /*  Timer Hall Sensor functions  **********************************************/

  320. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);

  321. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);

  322. 

  323. void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);

  324. void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);

  325. 

  326.  /* Blocking mode: Polling */

  327. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);

  328. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);

  329. /* Non-Blocking mode: Interrupt */

  330. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);

  331. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);

  332. /* Non-Blocking mode: DMA */

  333. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);

  334. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);

  335. /**

  336.   * @}

  337.   */

  338. 

  339. /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions

  340.  *  @brief   Timer Complementary Output Compare functions

  341.  * @{

  342.  */

  343. /*  Timer Complementary Output Compare functions  *****************************/

  344. /* Blocking mode: Polling */

  345. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);

  346. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

  347. 

  348. /* Non-Blocking mode: Interrupt */

  349. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

  350. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

  351. 

  352. /* Non-Blocking mode: DMA */

  353. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);

  354. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);

  355. /**

  356.   * @}

  357.   */

  358. 

  359. /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions

  360.  *  @brief    Timer Complementary PWM functions

  361.  * @{

  362.  */

  363. /*  Timer Complementary PWM functions  ****************************************/

  364. /* Blocking mode: Polling */

  365. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);

  366. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

  367. 

  368. /* Non-Blocking mode: Interrupt */

  369. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

  370. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

  371. /* Non-Blocking mode: DMA */

  372. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);

  373. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);

  374. /**

  375.   * @}

  376.   */

  377. 

  378. /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions

  379.  *  @brief    Timer Complementary One Pulse functions

  380.  * @{

  381.  */

  382. /*  Timer Complementary One Pulse functions  **********************************/

  383. /* Blocking mode: Polling */

  384. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);

  385. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);

  386. 

  387. /* Non-Blocking mode: Interrupt */

  388. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);

  389. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);

  390. /**

  391.   * @}

  392.   */

  393. 

  394. /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions

  395.  *  @brief    Peripheral Control functions

  396.  * @{

  397.  */

  398. /* Extended Control functions  ************************************************/

  399. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  400. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  401. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  402. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);

  403. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);

  404. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);

  405. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);

  406. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);

  407. 

  408. /**

  409.   * @}

  410.   */

  411. 

  412. /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions

  413.   * @brief    Extended Callbacks functions

  414.   * @{

  415.   */

  416. /* Extended Callback **********************************************************/

  417. void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);

  418. void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);

  419. /**

  420.   * @}

  421.   */

  422. 

  423. /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions

  424.   * @brief    Extended Peripheral State functions

  425.   * @{

  426.   */

  427. /* Extended Peripheral State functions  ***************************************/

  428. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);

  429. /**

  430.   * @}

  431.   */

  432. 

  433. /**

  434.   * @}

  435.   */

  436. /* End of exported functions -------------------------------------------------*/

  437. 

  438. /* Private functions----------------------------------------------------------*/

  439. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions

  440. * @{

  441. */

  442. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);

  443. /**

  444. * @}

  445. */

  446. /* End of private functions --------------------------------------------------*/

  447. 

  448. /**

  449.   * @}

  450.   */

  451. 

  452. /**

  453.   * @}

  454.   */

  455. 

  456. #ifdef __cplusplus

  457. }

  458. #endif

  459. 

  460. 

  461. #endif /* __STM32L4xx_HAL_TIM_EX_H */

  462. 

  463. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/