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stm32lib/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tsc.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32l4xx_hal_tsc.h

  4.   * @author  MCD Application Team

  5.   * @version V1.7.2

  6.   * @date    16-June-2017

  7.   * @brief   Header file of TSC HAL module.

  8.   ******************************************************************************

  9.   * @attention

  10.   *

  11.   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>

  12.   *

  13.   * Redistribution and use in source and binary forms, with or without modification,

  14.   * are permitted provided that the following conditions are met:

  15.   *   1. Redistributions of source code must retain the above copyright notice,

  16.   *      this list of conditions and the following disclaimer.

  17.   *   2. Redistributions in binary form must reproduce the above copyright notice,

  18.   *      this list of conditions and the following disclaimer in the documentation

  19.   *      and/or other materials provided with the distribution.

  20.   *   3. Neither the name of STMicroelectronics nor the names of its contributors

  21.   *      may be used to endorse or promote products derived from this software

  22.   *      without specific prior written permission.

  23.   *

  24.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  25.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  26.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  27.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  28.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  29.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  30.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  31.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  32.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  33.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  34.   *

  35.   ******************************************************************************

  36.   */

  37. 

  38. /* Define to prevent recursive inclusion -------------------------------------*/

  39. #ifndef __STM32L4xx_HAL_TSC_H

  40. #define __STM32L4xx_HAL_TSC_H

  41. 

  42. #ifdef __cplusplus

  43.  extern "C" {

  44. #endif

  45. 

  46. /* Includes ------------------------------------------------------------------*/

  47. #include "stm32l4xx_hal_def.h"

  48. 

  49. /** @addtogroup STM32L4xx_HAL_Driver

  50.   * @{

  51.   */

  52. 

  53. /** @addtogroup TSC

  54.   * @{

  55.   */

  56. 

  57. /* Exported types ------------------------------------------------------------*/

  58. /** @defgroup TSC_Exported_Types TSC Exported Types

  59.   * @{

  60.   */

  61. 

  62. /**

  63.   * @brief TSC state structure definition

  64.   */

  65. typedef enum

  66. {

  67.   HAL_TSC_STATE_RESET  = 0x00, /*!< TSC registers have their reset value */

  68.   HAL_TSC_STATE_READY  = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */

  69.   HAL_TSC_STATE_BUSY   = 0x02, /*!< TSC initialization or acquisition is on-going */

  70.   HAL_TSC_STATE_ERROR  = 0x03  /*!< Acquisition is completed with max count error */

  71. } HAL_TSC_StateTypeDef;

  72. 

  73. /**

  74.   * @brief TSC group status structure definition

  75.   */

  76. typedef enum

  77. {

  78.   TSC_GROUP_ONGOING   = 0x00, /*!< Acquisition on group is on-going or not started */

  79.   TSC_GROUP_COMPLETED = 0x01  /*!< Acquisition on group is completed with success (no max count error) */

  80. } TSC_GroupStatusTypeDef;

  81. 

  82. /**

  83.   * @brief TSC init structure definition

  84.   */

  85. typedef struct

  86. {

  87.   uint32_t CTPulseHighLength;       /*!< Charge-transfer high pulse length

  88.                                          This parameter can be a value of @ref TSC_CTPulseHL_Config  */

  89.   uint32_t CTPulseLowLength;        /*!< Charge-transfer low pulse length

  90.                                          This parameter can be a value of @ref TSC_CTPulseLL_Config  */

  91.   uint32_t SpreadSpectrum;          /*!< Spread spectrum activation

  92.                                          This parameter can be a value of @ref TSC_CTPulseLL_Config  */

  93.   uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation

  94.                                          This parameter must be a number between Min_Data = 0 and Max_Data = 127 */

  95.   uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler

  96.                                          This parameter can be a value of @ref TSC_SpreadSpec_Prescaler */

  97.   uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler

  98.                                          This parameter can be a value of @ref TSC_PulseGenerator_Prescaler */

  99.   uint32_t MaxCountValue;           /*!< Max count value

  100.                                          This parameter can be a value of @ref TSC_MaxCount_Value  */

  101.   uint32_t IODefaultMode;           /*!< IO default mode

  102.                                          This parameter can be a value of @ref TSC_IO_Default_Mode  */

  103.   uint32_t SynchroPinPolarity;      /*!< Synchro pin polarity

  104.                                          This parameter can be a value of @ref TSC_Synchro_Pin_Polarity */

  105.   uint32_t AcquisitionMode;         /*!< Acquisition mode

  106.                                          This parameter can be a value of @ref TSC_Acquisition_Mode  */

  107.   uint32_t MaxCountInterrupt;       /*!< Max count interrupt activation

  108.                                          This parameter can be set to ENABLE or DISABLE. */

  109.   uint32_t ChannelIOs;              /*!< Channel IOs mask */

  110.   uint32_t ShieldIOs;               /*!< Shield IOs mask */

  111.   uint32_t SamplingIOs;             /*!< Sampling IOs mask */

  112. } TSC_InitTypeDef;

  113. 

  114. /**

  115.   * @brief TSC IOs configuration structure definition

  116.   */

  117. typedef struct

  118. {

  119.   uint32_t ChannelIOs;  /*!< Channel IOs mask */

  120.   uint32_t ShieldIOs;   /*!< Shield IOs mask */

  121.   uint32_t SamplingIOs; /*!< Sampling IOs mask */

  122. } TSC_IOConfigTypeDef;

  123. 

  124. /**

  125.   * @brief  TSC handle Structure definition

  126.   */

  127. typedef struct

  128. {

  129.   TSC_TypeDef               *Instance; /*!< Register base address */

  130.   TSC_InitTypeDef           Init;      /*!< Initialization parameters */

  131.   __IO HAL_TSC_StateTypeDef State;     /*!< Peripheral state */

  132.   HAL_LockTypeDef           Lock;      /*!< Lock feature */

  133. } TSC_HandleTypeDef;

  134. 

  135. /**

  136.   * @}

  137.   */

  138. 

  139. /* Exported constants --------------------------------------------------------*/

  140. /** @defgroup TSC_Exported_Constants TSC Exported Constants

  141.   * @{

  142.   */

  143. 

  144. /** @defgroup TSC_CTPulseHL_Config CTPulse High Length

  145.   * @{

  146.   */

  147. #define TSC_CTPH_1CYCLE   ((uint32_t)((uint32_t) 0 << 28))

  148. #define TSC_CTPH_2CYCLES  ((uint32_t)((uint32_t) 1 << 28))

  149. #define TSC_CTPH_3CYCLES  ((uint32_t)((uint32_t) 2 << 28))

  150. #define TSC_CTPH_4CYCLES  ((uint32_t)((uint32_t) 3 << 28))

  151. #define TSC_CTPH_5CYCLES  ((uint32_t)((uint32_t) 4 << 28))

  152. #define TSC_CTPH_6CYCLES  ((uint32_t)((uint32_t) 5 << 28))

  153. #define TSC_CTPH_7CYCLES  ((uint32_t)((uint32_t) 6 << 28))

  154. #define TSC_CTPH_8CYCLES  ((uint32_t)((uint32_t) 7 << 28))

  155. #define TSC_CTPH_9CYCLES  ((uint32_t)((uint32_t) 8 << 28))

  156. #define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28))

  157. #define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28))

  158. #define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28))

  159. #define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28))

  160. #define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28))

  161. #define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28))

  162. #define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28))

  163. /**

  164.   * @}

  165.   */

  166. 

  167. /** @defgroup TSC_CTPulseLL_Config CTPulse Low Length

  168.   * @{

  169.   */

  170. #define TSC_CTPL_1CYCLE   ((uint32_t)((uint32_t) 0 << 24))

  171. #define TSC_CTPL_2CYCLES  ((uint32_t)((uint32_t) 1 << 24))

  172. #define TSC_CTPL_3CYCLES  ((uint32_t)((uint32_t) 2 << 24))

  173. #define TSC_CTPL_4CYCLES  ((uint32_t)((uint32_t) 3 << 24))

  174. #define TSC_CTPL_5CYCLES  ((uint32_t)((uint32_t) 4 << 24))

  175. #define TSC_CTPL_6CYCLES  ((uint32_t)((uint32_t) 5 << 24))

  176. #define TSC_CTPL_7CYCLES  ((uint32_t)((uint32_t) 6 << 24))

  177. #define TSC_CTPL_8CYCLES  ((uint32_t)((uint32_t) 7 << 24))

  178. #define TSC_CTPL_9CYCLES  ((uint32_t)((uint32_t) 8 << 24))

  179. #define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24))

  180. #define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24))

  181. #define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24))

  182. #define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24))

  183. #define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24))

  184. #define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24))

  185. #define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24))

  186. /**

  187.   * @}

  188.   */

  189. 

  190. /** @defgroup TSC_SpreadSpec_Prescaler Spread Spectrum Prescaler

  191.   * @{

  192.   */

  193. #define TSC_SS_PRESC_DIV1 ((uint32_t)0)

  194. #define TSC_SS_PRESC_DIV2  (TSC_CR_SSPSC)

  195. /**

  196.   * @}

  197.   */

  198. 

  199. /** @defgroup TSC_PulseGenerator_Prescaler Pulse Generator Prescaler

  200.   * @{

  201.   */

  202. #define TSC_PG_PRESC_DIV1   ((uint32_t)(0 << 12))

  203. #define TSC_PG_PRESC_DIV2   ((uint32_t)(1 << 12))

  204. #define TSC_PG_PRESC_DIV4   ((uint32_t)(2 << 12))

  205. #define TSC_PG_PRESC_DIV8   ((uint32_t)(3 << 12))

  206. #define TSC_PG_PRESC_DIV16  ((uint32_t)(4 << 12))

  207. #define TSC_PG_PRESC_DIV32  ((uint32_t)(5 << 12))

  208. #define TSC_PG_PRESC_DIV64  ((uint32_t)(6 << 12))

  209. #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12))

  210. /**

  211.   * @}

  212.   */

  213. 

  214. /** @defgroup TSC_MaxCount_Value Max Count Value

  215.   * @{

  216.   */

  217. #define TSC_MCV_255   ((uint32_t)(0 << 5))

  218. #define TSC_MCV_511   ((uint32_t)(1 << 5))

  219. #define TSC_MCV_1023  ((uint32_t)(2 << 5))

  220. #define TSC_MCV_2047  ((uint32_t)(3 << 5))

  221. #define TSC_MCV_4095  ((uint32_t)(4 << 5))

  222. #define TSC_MCV_8191  ((uint32_t)(5 << 5))

  223. #define TSC_MCV_16383 ((uint32_t)(6 << 5))

  224. /**

  225.   * @}

  226.   */

  227. 

  228. /** @defgroup TSC_IO_Default_Mode IO Default Mode

  229.   * @{

  230.   */

  231. #define TSC_IODEF_OUT_PP_LOW ((uint32_t)0)

  232. #define TSC_IODEF_IN_FLOAT   (TSC_CR_IODEF)

  233. /**

  234.   * @}

  235.   */

  236. 

  237. /** @defgroup TSC_Synchro_Pin_Polarity Synchro Pin Polarity

  238.   * @{

  239.   */

  240. #define TSC_SYNC_POLARITY_FALLING  ((uint32_t)0)

  241. #define TSC_SYNC_POLARITY_RISING   (TSC_CR_SYNCPOL)

  242. /**

  243.   * @}

  244.   */

  245. 

  246. /** @defgroup TSC_Acquisition_Mode Acquisition Mode

  247.   * @{

  248.   */

  249. #define TSC_ACQ_MODE_NORMAL  ((uint32_t)0)

  250. #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)

  251. /**

  252.   * @}

  253.   */

  254. 

  255. /** @defgroup TSC_IO_Mode IO Mode

  256.   * @{

  257.   */

  258. #define TSC_IOMODE_UNUSED   ((uint32_t)0)

  259. #define TSC_IOMODE_CHANNEL  ((uint32_t)1)

  260. #define TSC_IOMODE_SHIELD   ((uint32_t)2)

  261. #define TSC_IOMODE_SAMPLING ((uint32_t)3)

  262. /**

  263.   * @}

  264.   */

  265. 

  266. /** @defgroup TSC_interrupts_definition Interrupts definition

  267.   * @{

  268.   */

  269. #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)

  270. #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)

  271. /**

  272.   * @}

  273.   */

  274. 

  275. /** @defgroup TSC_flags_definition Flags definition

  276.   * @{

  277.   */

  278. #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)

  279. #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)

  280. /**

  281.   * @}

  282.   */

  283. 

  284. /** @defgroup TSC_Group_definition Group definition

  285.   * @{

  286.   */

  287. #define TSC_NB_OF_GROUPS (8)

  288. 

  289. #define TSC_GROUP1 ((uint32_t)0x00000001)

  290. #define TSC_GROUP2 ((uint32_t)0x00000002)

  291. #define TSC_GROUP3 ((uint32_t)0x00000004)

  292. #define TSC_GROUP4 ((uint32_t)0x00000008)

  293. #define TSC_GROUP5 ((uint32_t)0x00000010)

  294. #define TSC_GROUP6 ((uint32_t)0x00000020)

  295. #define TSC_GROUP7 ((uint32_t)0x00000040)

  296. #define TSC_GROUP8 ((uint32_t)0x00000080)

  297. #define TSC_ALL_GROUPS ((uint32_t)0x000000FF)

  298. 

  299. #define TSC_GROUP1_IDX ((uint32_t)0)

  300. #define TSC_GROUP2_IDX ((uint32_t)1)

  301. #define TSC_GROUP3_IDX ((uint32_t)2)

  302. #define TSC_GROUP4_IDX ((uint32_t)3)

  303. #define TSC_GROUP5_IDX ((uint32_t)4)

  304. #define TSC_GROUP6_IDX ((uint32_t)5)

  305. #define TSC_GROUP7_IDX ((uint32_t)6)

  306. #define TSC_GROUP8_IDX ((uint32_t)7)

  307. 

  308. #define TSC_GROUP1_IO1 ((uint32_t)0x00000001)

  309. #define TSC_GROUP1_IO2 ((uint32_t)0x00000002)

  310. #define TSC_GROUP1_IO3 ((uint32_t)0x00000004)

  311. #define TSC_GROUP1_IO4 ((uint32_t)0x00000008)

  312. #define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F)

  313. 

  314. #define TSC_GROUP2_IO1 ((uint32_t)0x00000010)

  315. #define TSC_GROUP2_IO2 ((uint32_t)0x00000020)

  316. #define TSC_GROUP2_IO3 ((uint32_t)0x00000040)

  317. #define TSC_GROUP2_IO4 ((uint32_t)0x00000080)

  318. #define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0)

  319. 

  320. #define TSC_GROUP3_IO1 ((uint32_t)0x00000100)

  321. #define TSC_GROUP3_IO2 ((uint32_t)0x00000200)

  322. #define TSC_GROUP3_IO3 ((uint32_t)0x00000400)

  323. #define TSC_GROUP3_IO4 ((uint32_t)0x00000800)

  324. #define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00)

  325. 

  326. #define TSC_GROUP4_IO1 ((uint32_t)0x00001000)

  327. #define TSC_GROUP4_IO2 ((uint32_t)0x00002000)

  328. #define TSC_GROUP4_IO3 ((uint32_t)0x00004000)

  329. #define TSC_GROUP4_IO4 ((uint32_t)0x00008000)

  330. #define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000)

  331. 

  332. #define TSC_GROUP5_IO1 ((uint32_t)0x00010000)

  333. #define TSC_GROUP5_IO2 ((uint32_t)0x00020000)

  334. #define TSC_GROUP5_IO3 ((uint32_t)0x00040000)

  335. #define TSC_GROUP5_IO4 ((uint32_t)0x00080000)

  336. #define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000)

  337. 

  338. #define TSC_GROUP6_IO1 ((uint32_t)0x00100000)

  339. #define TSC_GROUP6_IO2 ((uint32_t)0x00200000)

  340. #define TSC_GROUP6_IO3 ((uint32_t)0x00400000)

  341. #define TSC_GROUP6_IO4 ((uint32_t)0x00800000)

  342. #define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000)

  343. 

  344. #define TSC_GROUP7_IO1 ((uint32_t)0x01000000)

  345. #define TSC_GROUP7_IO2 ((uint32_t)0x02000000)

  346. #define TSC_GROUP7_IO3 ((uint32_t)0x04000000)

  347. #define TSC_GROUP7_IO4 ((uint32_t)0x08000000)

  348. #define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000)

  349. 

  350. #define TSC_GROUP8_IO1 ((uint32_t)0x10000000)

  351. #define TSC_GROUP8_IO2 ((uint32_t)0x20000000)

  352. #define TSC_GROUP8_IO3 ((uint32_t)0x40000000)

  353. #define TSC_GROUP8_IO4 ((uint32_t)0x80000000)

  354. #define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000)

  355. 

  356. #define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF)

  357. /**

  358.   * @}

  359.   */

  360. 

  361. /**

  362.   * @}

  363.   */

  364. 

  365. /* Exported macros -----------------------------------------------------------*/

  366. 

  367. /** @defgroup TSC_Exported_Macros TSC Exported Macros

  368.   * @{

  369.   */

  370. 

  371. /** @brief Reset TSC handle state.

  372.   * @param  __HANDLE__: TSC handle

  373.   * @retval None

  374.   */

  375. #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)

  376. 

  377. /**

  378.   * @brief Enable the TSC peripheral.

  379.   * @param  __HANDLE__: TSC handle

  380.   * @retval None

  381.   */

  382. #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)

  383. 

  384. /**

  385.   * @brief Disable the TSC peripheral.

  386.   * @param  __HANDLE__: TSC handle

  387.   * @retval None

  388.   */

  389. #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))

  390. 

  391. /**

  392.   * @brief Start acquisition.

  393.   * @param  __HANDLE__: TSC handle

  394.   * @retval None

  395.   */

  396. #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)

  397. 

  398. /**

  399.   * @brief Stop acquisition.

  400.   * @param  __HANDLE__: TSC handle

  401.   * @retval None

  402.   */

  403. #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))

  404. 

  405. /**

  406.   * @brief Set IO default mode to output push-pull low.

  407.   * @param  __HANDLE__: TSC handle

  408.   * @retval None

  409.   */

  410. #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))

  411. 

  412. /**

  413.   * @brief Set IO default mode to input floating.

  414.   * @param  __HANDLE__: TSC handle

  415.   * @retval None

  416.   */

  417. #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)

  418. 

  419. /**

  420.   * @brief Set synchronization polarity to falling edge.

  421.   * @param  __HANDLE__: TSC handle

  422.   * @retval None

  423.   */

  424. #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))

  425. 

  426. /**

  427.   * @brief Set synchronization polarity to rising edge and high level.

  428.   * @param  __HANDLE__: TSC handle

  429.   * @retval None

  430.   */

  431. #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)

  432. 

  433. /**

  434.   * @brief Enable TSC interrupt.

  435.   * @param  __HANDLE__: TSC handle

  436.   * @param  __INTERRUPT__: TSC interrupt

  437.   * @retval None

  438.   */

  439. #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))

  440. 

  441. /**

  442.   * @brief Disable TSC interrupt.

  443.   * @param  __HANDLE__: TSC handle

  444.   * @param  __INTERRUPT__: TSC interrupt

  445.   * @retval None

  446.   */

  447. #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))

  448. 

  449. /** @brief Check whether the specified TSC interrupt source is enabled or not.

  450.   * @param  __HANDLE__: TSC Handle

  451.   * @param  __INTERRUPT__: TSC interrupt

  452.   * @retval SET or RESET

  453.   */

  454. #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

  455. 

  456. /**

  457.   * @brief Check whether the specified TSC flag is set or not.

  458.   * @param  __HANDLE__: TSC handle

  459.   * @param  __FLAG__: TSC flag

  460.   * @retval SET or RESET

  461.   */

  462. #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)

  463. 

  464. /**

  465.   * @brief Clear the TSC's pending flag.

  466.   * @param  __HANDLE__: TSC handle

  467.   * @param  __FLAG__: TSC flag

  468.   * @retval None

  469.   */

  470. #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))

  471. 

  472. /**

  473.   * @brief Enable schmitt trigger hysteresis on a group of IOs.

  474.   * @param  __HANDLE__: TSC handle

  475.   * @param  __GX_IOY_MASK__: IOs mask

  476.   * @retval None

  477.   */

  478. #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))

  479. 

  480. /**

  481.   * @brief Disable schmitt trigger hysteresis on a group of IOs.

  482.   * @param  __HANDLE__: TSC handle

  483.   * @param  __GX_IOY_MASK__: IOs mask

  484.   * @retval None

  485.   */

  486. #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))

  487. 

  488. /**

  489.   * @brief Open analog switch on a group of IOs.

  490.   * @param  __HANDLE__: TSC handle

  491.   * @param  __GX_IOY_MASK__: IOs mask

  492.   * @retval None

  493.   */

  494. #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))

  495. 

  496. /**

  497.   * @brief Close analog switch on a group of IOs.

  498.   * @param  __HANDLE__: TSC handle

  499.   * @param  __GX_IOY_MASK__: IOs mask

  500.   * @retval None

  501.   */

  502. #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))

  503. 

  504. /**

  505.   * @brief Enable a group of IOs in channel mode.

  506.   * @param  __HANDLE__: TSC handle

  507.   * @param  __GX_IOY_MASK__: IOs mask

  508.   * @retval None

  509.   */

  510. #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))

  511. 

  512. /**

  513.   * @brief Disable a group of channel IOs.

  514.   * @param  __HANDLE__: TSC handle

  515.   * @param  __GX_IOY_MASK__: IOs mask

  516.   * @retval None

  517.   */

  518. #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))

  519. 

  520. /**

  521.   * @brief Enable a group of IOs in sampling mode.

  522.   * @param  __HANDLE__: TSC handle

  523.   * @param  __GX_IOY_MASK__: IOs mask

  524.   * @retval None

  525.   */

  526. #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))

  527. 

  528. /**

  529.   * @brief Disable a group of sampling IOs.

  530.   * @param  __HANDLE__: TSC handle

  531.   * @param  __GX_IOY_MASK__: IOs mask

  532.   * @retval None

  533.   */

  534. #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))

  535. 

  536. /**

  537.   * @brief Enable acquisition groups.

  538.   * @param  __HANDLE__: TSC handle

  539.   * @param  __GX_MASK__: Groups mask

  540.   * @retval None

  541.   */

  542. #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))

  543. 

  544. /**

  545.   * @brief Disable acquisition groups.

  546.   * @param  __HANDLE__: TSC handle

  547.   * @param  __GX_MASK__: Groups mask

  548.   * @retval None

  549.   */

  550. #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))

  551. 

  552. /** @brief Gets acquisition group status.

  553.   * @param  __HANDLE__: TSC Handle

  554.   * @param  __GX_INDEX__: Group index

  555.   * @retval SET or RESET

  556.   */

  557. #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \

  558. ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)

  559. 

  560. /**

  561.   * @}

  562.   */

  563. 

  564. /* Private macros ------------------------------------------------------------*/

  565. 

  566. /** @defgroup TSC_Private_Macros TSC Private Macros

  567.   * @{

  568.   */

  569. 

  570. #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \

  571.                           ((VAL) == TSC_CTPH_2CYCLES) || \

  572.                           ((VAL) == TSC_CTPH_3CYCLES) || \

  573.                           ((VAL) == TSC_CTPH_4CYCLES) || \

  574.                           ((VAL) == TSC_CTPH_5CYCLES) || \

  575.                           ((VAL) == TSC_CTPH_6CYCLES) || \

  576.                           ((VAL) == TSC_CTPH_7CYCLES) || \

  577.                           ((VAL) == TSC_CTPH_8CYCLES) || \

  578.                           ((VAL) == TSC_CTPH_9CYCLES) || \

  579.                           ((VAL) == TSC_CTPH_10CYCLES) || \

  580.                           ((VAL) == TSC_CTPH_11CYCLES) || \

  581.                           ((VAL) == TSC_CTPH_12CYCLES) || \

  582.                           ((VAL) == TSC_CTPH_13CYCLES) || \

  583.                           ((VAL) == TSC_CTPH_14CYCLES) || \

  584.                           ((VAL) == TSC_CTPH_15CYCLES) || \

  585.                           ((VAL) == TSC_CTPH_16CYCLES))

  586. 

  587. #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \

  588.                           ((VAL) == TSC_CTPL_2CYCLES) || \

  589.                           ((VAL) == TSC_CTPL_3CYCLES) || \

  590.                           ((VAL) == TSC_CTPL_4CYCLES) || \

  591.                           ((VAL) == TSC_CTPL_5CYCLES) || \

  592.                           ((VAL) == TSC_CTPL_6CYCLES) || \

  593.                           ((VAL) == TSC_CTPL_7CYCLES) || \

  594.                           ((VAL) == TSC_CTPL_8CYCLES) || \

  595.                           ((VAL) == TSC_CTPL_9CYCLES) || \

  596.                           ((VAL) == TSC_CTPL_10CYCLES) || \

  597.                           ((VAL) == TSC_CTPL_11CYCLES) || \

  598.                           ((VAL) == TSC_CTPL_12CYCLES) || \

  599.                           ((VAL) == TSC_CTPL_13CYCLES) || \

  600.                           ((VAL) == TSC_CTPL_14CYCLES) || \

  601.                           ((VAL) == TSC_CTPL_15CYCLES) || \

  602.                           ((VAL) == TSC_CTPL_16CYCLES))

  603. 

  604. #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))

  605. 

  606. #define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128)))

  607. 

  608. #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))

  609. 

  610. #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \

  611.                               ((VAL) == TSC_PG_PRESC_DIV2) || \

  612.                               ((VAL) == TSC_PG_PRESC_DIV4) || \

  613.                               ((VAL) == TSC_PG_PRESC_DIV8) || \

  614.                               ((VAL) == TSC_PG_PRESC_DIV16) || \

  615.                               ((VAL) == TSC_PG_PRESC_DIV32) || \

  616.                               ((VAL) == TSC_PG_PRESC_DIV64) || \

  617.                               ((VAL) == TSC_PG_PRESC_DIV128))

  618. 

  619. #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \

  620.                          ((VAL) == TSC_MCV_511) || \

  621.                          ((VAL) == TSC_MCV_1023) || \

  622.                          ((VAL) == TSC_MCV_2047) || \

  623.                          ((VAL) == TSC_MCV_4095) || \

  624.                          ((VAL) == TSC_MCV_8191) || \

  625.                          ((VAL) == TSC_MCV_16383))

  626. 

  627. #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))

  628. 

  629. #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING))

  630. 

  631. #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))

  632. 

  633. #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \

  634.                             ((VAL) == TSC_IOMODE_CHANNEL) || \

  635.                             ((VAL) == TSC_IOMODE_SHIELD) || \

  636.                             ((VAL) == TSC_IOMODE_SAMPLING))

  637. 

  638. #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))

  639. 

  640. #define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS)))

  641. 

  642. /**

  643.   * @}

  644.   */

  645. 

  646. /* Exported functions --------------------------------------------------------*/

  647. /** @addtogroup TSC_Exported_Functions

  648.   * @{

  649.   */

  650. 

  651. /** @addtogroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions

  652.   * @{

  653.   */

  654. /* Initialization and de-initialization functions *****************************/

  655. HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);

  656. HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);

  657. void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);

  658. void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);

  659. /**

  660.   * @}

  661.   */

  662. 

  663. /** @addtogroup TSC_Exported_Functions_Group2 Input and Output operation functions

  664.   * @{

  665.   */

  666. /* IO operation functions *****************************************************/

  667. HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);

  668. HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);

  669. HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);

  670. HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);

  671. HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);

  672. TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);

  673. uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);

  674. /**

  675.   * @}

  676.   */

  677. 

  678. /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions

  679.   * @{

  680.   */

  681. /* Peripheral Control functions ***********************************************/

  682. HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);

  683. HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);

  684. /**

  685.   * @}

  686.   */

  687. 

  688. /** @addtogroup TSC_Exported_Functions_Group4 Peripheral State and Errors functions

  689.   * @{

  690.   */

  691. /* Peripheral State and Error functions ***************************************/

  692. HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);

  693. /**

  694.   * @}

  695.   */

  696. 

  697. /** @addtogroup TSC_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks

  698.  * @{

  699.  */

  700. /******* TSC IRQHandler and Callbacks used in Interrupt mode */

  701. void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);

  702. void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);

  703. void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);

  704. /**

  705.   * @}

  706.   */

  707. 

  708. /**

  709.   * @}

  710.   */

  711. 

  712. /**

  713.   * @}

  714.   */

  715. 

  716. /**

  717.   * @}

  718.   */

  719. 

  720. #ifdef __cplusplus

  721. }

  722. #endif

  723. 

  724. #endif /* __STM32L4xx_HAL_TSC_H */

  725. 

  726. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/