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stm32lib/CMSIS/STM32F0xx/Source/Templates/gcc/startup_stm32f098xx.s

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  1. /**

  2.   ******************************************************************************

  3.   * @file      startup_stm32f098xx.s

  4.   * @author    MCD Application Team

  5.   * @brief     STM32F098xx devices vector table for GCC toolchain.

  6.   *            This module performs:

  7.   *                - Set the initial SP

  8.   *                - Set the initial PC == Reset_Handler,

  9.   *                - Set the vector table entries with the exceptions ISR address

  10.   *                - Branches to main in the C library (which eventually

  11.   *                  calls main()).

  12.   *            After Reset the Cortex-M0 processor is in Thread mode,

  13.   *            priority is Privileged, and the Stack is set to Main.

  14.   ******************************************************************************

  15.   *

  16.   * Redistribution and use in source and binary forms, with or without modification,

  17.   * are permitted provided that the following conditions are met:

  18.   *   1. Redistributions of source code must retain the above copyright notice,

  19.   *      this list of conditions and the following disclaimer.

  20.   *   2. Redistributions in binary form must reproduce the above copyright notice,

  21.   *      this list of conditions and the following disclaimer in the documentation

  22.   *      and/or other materials provided with the distribution.

  23.   *   3. Neither the name of STMicroelectronics nor the names of its contributors

  24.   *      may be used to endorse or promote products derived from this software

  25.   *      without specific prior written permission.

  26.   *

  27.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  28.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  29.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  30.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  31.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  32.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  33.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  34.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  35.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  36.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  37.   *

  38.   ******************************************************************************

  39.   */

  40. 

  41.   .syntax unified

  42.   .cpu cortex-m0

  43.   .fpu softvfp

  44.   .thumb

  45. 

  46. .global g_pfnVectors

  47. .global Default_Handler

  48. 

  49. /* start address for the initialization values of the .data section.

  50. defined in linker script */

  51. .word _sidata

  52. /* start address for the .data section. defined in linker script */

  53. .word _sdata

  54. /* end address for the .data section. defined in linker script */

  55. .word _edata

  56. /* start address for the .bss section. defined in linker script */

  57. .word _sbss

  58. /* end address for the .bss section. defined in linker script */

  59. .word _ebss

  60. 

  61.   .section .text.Reset_Handler

  62.   .weak Reset_Handler

  63.   .type Reset_Handler, %function

  64. Reset_Handler:

  65.   ldr   r0, =_estack

  66.   mov   sp, r0          /* set stack pointer */

  67. 

  68. /* Copy the data segment initializers from flash to SRAM */

  69.   ldr r0, =_sdata

  70.   ldr r1, =_edata

  71.   ldr r2, =_sidata

  72.   movs r3, #0

  73.   b LoopCopyDataInit

  74. 

  75. CopyDataInit:

  76.   ldr r4, [r2, r3]

  77.   str r4, [r0, r3]

  78.   adds r3, r3, #4

  79. 

  80. LoopCopyDataInit:

  81.   adds r4, r0, r3

  82.   cmp r4, r1

  83.   bcc CopyDataInit

  84. 

  85. /* Zero fill the bss segment. */

  86.   ldr r2, =_sbss

  87.   ldr r4, =_ebss

  88.   movs r3, #0

  89.   b LoopFillZerobss

  90. 

  91. FillZerobss:

  92.   str  r3, [r2]

  93.   adds r2, r2, #4

  94. 

  95. LoopFillZerobss:

  96.   cmp r2, r4

  97.   bcc FillZerobss

  98. 

  99. /* Call the clock system intitialization function.*/

  100.   bl  SystemInit

  101. /* Call static constructors */

  102.   bl __libc_init_array

  103. /* Call the application's entry point.*/

  104.   bl main

  105. 

  106. LoopForever:

  107.     b LoopForever

  108. 

  109. 

  110. .size Reset_Handler, .-Reset_Handler

  111. 

  112. /**

  113.  * @brief  This is the code that gets called when the processor receives an

  114.  *         unexpected interrupt.  This simply enters an infinite loop, preserving

  115.  *         the system state for examination by a debugger.

  116.  *

  117.  * @param  None

  118.  * @retval : None

  119. */

  120.     .section .text.Default_Handler,"ax",%progbits

  121. Default_Handler:

  122. Infinite_Loop:

  123.   b Infinite_Loop

  124.   .size Default_Handler, .-Default_Handler

  125. /******************************************************************************

  126. *

  127. * The minimal vector table for a Cortex M0.  Note that the proper constructs

  128. * must be placed on this to ensure that it ends up at physical address

  129. * 0x0000.0000.

  130. *

  131. ******************************************************************************/

  132.    .section .isr_vector,"a",%progbits

  133.   .type g_pfnVectors, %object

  134.   .size g_pfnVectors, .-g_pfnVectors

  135. 

  136. 

  137. g_pfnVectors:

  138.   .word  _estack

  139.   .word  Reset_Handler

  140.   .word  NMI_Handler

  141.   .word  HardFault_Handler

  142.   .word  0

  143.   .word  0

  144.   .word  0

  145.   .word  0

  146.   .word  0

  147.   .word  0

  148.   .word  0

  149.   .word  SVC_Handler

  150.   .word  0

  151.   .word  0

  152.   .word  PendSV_Handler

  153.   .word  SysTick_Handler

  154.   .word  WWDG_IRQHandler                   /* Window WatchDog              */

  155.   .word  VDDIO2_IRQHandler                 /* VDDIO2 Monitor through EXTI Line 31 */

  156.   .word  RTC_IRQHandler                    /* RTC through the EXTI line    */

  157.   .word  FLASH_IRQHandler                  /* FLASH                        */

  158.   .word  RCC_CRS_IRQHandler                /* RCC and CRS                  */

  159.   .word  EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */

  160.   .word  EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */

  161.   .word  EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */

  162.   .word  TSC_IRQHandler                    /* TSC                          */

  163.   .word  DMA1_Ch1_IRQHandler               /* DMA1 Channel 1               */

  164.   .word  DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler  /* DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 */

  165.   .word  DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler  /* DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 */

  166.   .word  ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2         */

  167.   .word  TIM1_BRK_UP_TRG_COM_IRQHandler    /* TIM1 Break, Update, Trigger and Commutation */

  168.   .word  TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */

  169.   .word  TIM2_IRQHandler                   /* TIM2                         */

  170.   .word  TIM3_IRQHandler                   /* TIM3                         */

  171.   .word  TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */

  172.   .word  TIM7_IRQHandler                   /* TIM7                         */

  173.   .word  TIM14_IRQHandler                  /* TIM14                        */

  174.   .word  TIM15_IRQHandler                  /* TIM15                        */

  175.   .word  TIM16_IRQHandler                  /* TIM16                        */

  176.   .word  TIM17_IRQHandler                  /* TIM17                        */

  177.   .word  I2C1_IRQHandler                   /* I2C1                         */

  178.   .word  I2C2_IRQHandler                   /* I2C2                         */

  179.   .word  SPI1_IRQHandler                   /* SPI1                         */

  180.   .word  SPI2_IRQHandler                   /* SPI2                         */

  181.   .word  USART1_IRQHandler                 /* USART1                       */

  182.   .word  USART2_IRQHandler                 /* USART2                       */

  183.   .word  USART3_8_IRQHandler               /* USART3, USART4, USART5, USART6, USART7, USART8 */

  184.   .word  CEC_CAN_IRQHandler                /* CEC and CAN                  */

  185. 

  186. /*******************************************************************************

  187. *

  188. * Provide weak aliases for each Exception handler to the Default_Handler.

  189. * As they are weak aliases, any function with the same name will override

  190. * this definition.

  191. *

  192. *******************************************************************************/

  193. 

  194.   .weak      NMI_Handler

  195.   .thumb_set NMI_Handler,Default_Handler

  196. 

  197.   .weak      HardFault_Handler

  198.   .thumb_set HardFault_Handler,Default_Handler

  199. 

  200.   .weak      SVC_Handler

  201.   .thumb_set SVC_Handler,Default_Handler

  202. 

  203.   .weak      PendSV_Handler

  204.   .thumb_set PendSV_Handler,Default_Handler

  205. 

  206.   .weak      SysTick_Handler

  207.   .thumb_set SysTick_Handler,Default_Handler

  208. 

  209.   .weak      WWDG_IRQHandler

  210.   .thumb_set WWDG_IRQHandler,Default_Handler

  211. 

  212.   .weak      VDDIO2_IRQHandler

  213.   .thumb_set VDDIO2_IRQHandler,Default_Handler

  214. 

  215.   .weak      RTC_IRQHandler

  216.   .thumb_set RTC_IRQHandler,Default_Handler

  217. 

  218.   .weak      FLASH_IRQHandler

  219.   .thumb_set FLASH_IRQHandler,Default_Handler

  220. 

  221.   .weak      RCC_CRS_IRQHandler

  222.   .thumb_set RCC_CRS_IRQHandler,Default_Handler

  223. 

  224.   .weak      EXTI0_1_IRQHandler

  225.   .thumb_set EXTI0_1_IRQHandler,Default_Handler

  226. 

  227.   .weak      EXTI2_3_IRQHandler

  228.   .thumb_set EXTI2_3_IRQHandler,Default_Handler

  229. 

  230.   .weak      EXTI4_15_IRQHandler

  231.   .thumb_set EXTI4_15_IRQHandler,Default_Handler

  232. 

  233.   .weak      TSC_IRQHandler

  234.   .thumb_set TSC_IRQHandler,Default_Handler

  235. 

  236.   .weak      DMA1_Ch1_IRQHandler

  237.   .thumb_set DMA1_Ch1_IRQHandler,Default_Handler

  238. 

  239.   .weak      DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler

  240.   .thumb_set DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler,Default_Handler

  241. 

  242.   .weak      DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler

  243.   .thumb_set DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler,Default_Handler

  244. 

  245.   .weak      ADC1_COMP_IRQHandler

  246.   .thumb_set ADC1_COMP_IRQHandler,Default_Handler

  247. 

  248.   .weak      TIM1_BRK_UP_TRG_COM_IRQHandler

  249.   .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler

  250. 

  251.   .weak      TIM1_CC_IRQHandler

  252.   .thumb_set TIM1_CC_IRQHandler,Default_Handler

  253. 

  254.   .weak      TIM2_IRQHandler

  255.   .thumb_set TIM2_IRQHandler,Default_Handler

  256. 

  257.   .weak      TIM3_IRQHandler

  258.   .thumb_set TIM3_IRQHandler,Default_Handler

  259. 

  260.   .weak      TIM6_DAC_IRQHandler

  261.   .thumb_set TIM6_DAC_IRQHandler,Default_Handler

  262. 

  263.   .weak      TIM7_IRQHandler

  264.   .thumb_set TIM7_IRQHandler,Default_Handler

  265. 

  266.   .weak      TIM14_IRQHandler

  267.   .thumb_set TIM14_IRQHandler,Default_Handler

  268. 

  269.   .weak      TIM15_IRQHandler

  270.   .thumb_set TIM15_IRQHandler,Default_Handler

  271. 

  272.   .weak      TIM16_IRQHandler

  273.   .thumb_set TIM16_IRQHandler,Default_Handler

  274. 

  275.   .weak      TIM17_IRQHandler

  276.   .thumb_set TIM17_IRQHandler,Default_Handler

  277. 

  278.   .weak      I2C1_IRQHandler

  279.   .thumb_set I2C1_IRQHandler,Default_Handler

  280. 

  281.   .weak      I2C2_IRQHandler

  282.   .thumb_set I2C2_IRQHandler,Default_Handler

  283. 

  284.   .weak      SPI1_IRQHandler

  285.   .thumb_set SPI1_IRQHandler,Default_Handler

  286. 

  287.   .weak      SPI2_IRQHandler

  288.   .thumb_set SPI2_IRQHandler,Default_Handler

  289. 

  290.   .weak      USART1_IRQHandler

  291.   .thumb_set USART1_IRQHandler,Default_Handler

  292. 

  293.   .weak      USART2_IRQHandler

  294.   .thumb_set USART2_IRQHandler,Default_Handler

  295. 

  296.   .weak      USART3_8_IRQHandler

  297.   .thumb_set USART3_8_IRQHandler,Default_Handler

  298. 

  299.   .weak      CEC_CAN_IRQHandler

  300.   .thumb_set CEC_CAN_IRQHandler,Default_Handler

  301. 

  302. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/