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  1. ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f413xx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V2.6.1
  5. ;* Date : 14-February-2017
  6. ;* Description : STM32F413xx devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Branches to __main in the C library (which eventually
  12. ;* calls main()).
  13. ;* After Reset the CortexM4 processor is in Thread mode,
  14. ;* priority is Privileged, and the Stack is set to Main.
  15. ;* <<< Use Configuration Wizard in Context Menu >>>
  16. ;*******************************************************************************
  17. ;
  18. ;* Redistribution and use in source and binary forms, with or without modification,
  19. ;* are permitted provided that the following conditions are met:
  20. ;* 1. Redistributions of source code must retain the above copyright notice,
  21. ;* this list of conditions and the following disclaimer.
  22. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  23. ;* this list of conditions and the following disclaimer in the documentation
  24. ;* and/or other materials provided with the distribution.
  25. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  26. ;* may be used to endorse or promote products derived from this software
  27. ;* without specific prior written permission.
  28. ;*
  29. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. ;
  40. ;*******************************************************************************
  41. ; Amount of memory (in bytes) allocated for Stack
  42. ; Tailor this value to your application needs
  43. ; <h> Stack Configuration
  44. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. Stack_Size EQU 0x00000400
  47. AREA STACK, NOINIT, READWRITE, ALIGN=3
  48. Stack_Mem SPACE Stack_Size
  49. __initial_sp
  50. ; <h> Heap Configuration
  51. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  52. ; </h>
  53. Heap_Size EQU 0x00000200
  54. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  55. __heap_base
  56. Heap_Mem SPACE Heap_Size
  57. __heap_limit
  58. PRESERVE8
  59. THUMB
  60. ; Vector Table Mapped to Address 0 at Reset
  61. AREA RESET, DATA, READONLY
  62. EXPORT __Vectors
  63. EXPORT __Vectors_End
  64. EXPORT __Vectors_Size
  65. __Vectors DCD __initial_sp ; Top of Stack
  66. DCD Reset_Handler ; Reset Handler
  67. DCD NMI_Handler ; NMI Handler
  68. DCD HardFault_Handler ; Hard Fault Handler
  69. DCD MemManage_Handler ; MPU Fault Handler
  70. DCD BusFault_Handler ; Bus Fault Handler
  71. DCD UsageFault_Handler ; Usage Fault Handler
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD 0 ; Reserved
  75. DCD 0 ; Reserved
  76. DCD SVC_Handler ; SVCall Handler
  77. DCD DebugMon_Handler ; Debug Monitor Handler
  78. DCD 0 ; Reserved
  79. DCD PendSV_Handler ; PendSV Handler
  80. DCD SysTick_Handler ; SysTick Handler
  81. ; External Interrupts
  82. DCD WWDG_IRQHandler ; Window WatchDog
  83. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  84. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  85. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  86. DCD FLASH_IRQHandler ; FLASH
  87. DCD RCC_IRQHandler ; RCC
  88. DCD EXTI0_IRQHandler ; EXTI Line0
  89. DCD EXTI1_IRQHandler ; EXTI Line1
  90. DCD EXTI2_IRQHandler ; EXTI Line2
  91. DCD EXTI3_IRQHandler ; EXTI Line3
  92. DCD EXTI4_IRQHandler ; EXTI Line4
  93. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  94. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  95. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  96. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  97. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  98. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  99. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  100. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  101. DCD CAN1_TX_IRQHandler ; CAN1 TX
  102. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  103. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  104. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  105. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  106. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  107. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  108. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  109. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  110. DCD TIM2_IRQHandler ; TIM2
  111. DCD TIM3_IRQHandler ; TIM3
  112. DCD TIM4_IRQHandler ; TIM4
  113. DCD I2C1_EV_IRQHandler ; I2C1 Event
  114. DCD I2C1_ER_IRQHandler ; I2C1 Error
  115. DCD I2C2_EV_IRQHandler ; I2C2 Event
  116. DCD I2C2_ER_IRQHandler ; I2C2 Error
  117. DCD SPI1_IRQHandler ; SPI1
  118. DCD SPI2_IRQHandler ; SPI2
  119. DCD USART1_IRQHandler ; USART1
  120. DCD USART2_IRQHandler ; USART2
  121. DCD USART3_IRQHandler ; USART3
  122. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  123. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  124. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  125. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  126. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  127. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  128. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  129. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  130. DCD FSMC_IRQHandler ; FSMC
  131. DCD SDIO_IRQHandler ; SDIO
  132. DCD TIM5_IRQHandler ; TIM5
  133. DCD SPI3_IRQHandler ; SPI3
  134. DCD UART4_IRQHandler ; UART4
  135. DCD UART5_IRQHandler ; UART5
  136. DCD TIM6_DAC_IRQHandler ; TIM6, DAC1 and DAC2
  137. DCD TIM7_IRQHandler ; TIM7
  138. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  139. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  140. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  141. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  142. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  143. DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global interrupt
  144. DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global interrupt
  145. DCD CAN2_TX_IRQHandler ; CAN2 TX
  146. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  147. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  148. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  149. DCD OTG_FS_IRQHandler ; USB OTG FS
  150. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  151. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  152. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  153. DCD USART6_IRQHandler ; USART6
  154. DCD I2C3_EV_IRQHandler ; I2C3 event
  155. DCD I2C3_ER_IRQHandler ; I2C3 error
  156. DCD CAN3_TX_IRQHandler ; CAN3 TX
  157. DCD CAN3_RX0_IRQHandler ; CAN3 RX0
  158. DCD CAN3_RX1_IRQHandler ; CAN3 RX1
  159. DCD CAN3_SCE_IRQHandler ; CAN3 SCE
  160. DCD 0 ; Reserved
  161. DCD 0 ; Reserved
  162. DCD RNG_IRQHandler ; RNG
  163. DCD FPU_IRQHandler ; FPU
  164. DCD UART7_IRQHandler ; UART7
  165. DCD UART8_IRQHandler ; UART8
  166. DCD SPI4_IRQHandler ; SPI4
  167. DCD SPI5_IRQHandler ; SPI5
  168. DCD 0 ; Reserved
  169. DCD SAI1_IRQHandler ; SAI1
  170. DCD UART9_IRQHandler ; UART9
  171. DCD UART10_IRQHandler ; UART10
  172. DCD 0 ; Reserved
  173. DCD 0 ; Reserved
  174. DCD QUADSPI_IRQHandler ; QuadSPI
  175. DCD 0 ; Reserved
  176. DCD 0 ; Reserved
  177. DCD FMPI2C1_EV_IRQHandler ; FMPI2C1 Event
  178. DCD FMPI2C1_ER_IRQHandler ; FMPI2C1 Error
  179. DCD LPTIM1_IRQHandler ; LPTIM1
  180. DCD DFSDM2_FLT0_IRQHandler ; DFSDM2 Filter0
  181. DCD DFSDM2_FLT1_IRQHandler ; DFSDM2 Filter1
  182. DCD DFSDM2_FLT2_IRQHandler ; DFSDM2 Filter2
  183. DCD DFSDM2_FLT3_IRQHandler ; DFSDM2 Filter3
  184. __Vectors_End
  185. __Vectors_Size EQU __Vectors_End - __Vectors
  186. AREA |.text|, CODE, READONLY
  187. ; Reset handler
  188. Reset_Handler PROC
  189. EXPORT Reset_Handler [WEAK]
  190. IMPORT SystemInit
  191. IMPORT __main
  192. LDR R0, =SystemInit
  193. BLX R0
  194. LDR R0, =__main
  195. BX R0
  196. ENDP
  197. ; Dummy Exception Handlers (infinite loops which can be modified)
  198. NMI_Handler PROC
  199. EXPORT NMI_Handler [WEAK]
  200. B .
  201. ENDP
  202. HardFault_Handler\
  203. PROC
  204. EXPORT HardFault_Handler [WEAK]
  205. B .
  206. ENDP
  207. MemManage_Handler\
  208. PROC
  209. EXPORT MemManage_Handler [WEAK]
  210. B .
  211. ENDP
  212. BusFault_Handler\
  213. PROC
  214. EXPORT BusFault_Handler [WEAK]
  215. B .
  216. ENDP
  217. UsageFault_Handler\
  218. PROC
  219. EXPORT UsageFault_Handler [WEAK]
  220. B .
  221. ENDP
  222. SVC_Handler PROC
  223. EXPORT SVC_Handler [WEAK]
  224. B .
  225. ENDP
  226. DebugMon_Handler\
  227. PROC
  228. EXPORT DebugMon_Handler [WEAK]
  229. B .
  230. ENDP
  231. PendSV_Handler PROC
  232. EXPORT PendSV_Handler [WEAK]
  233. B .
  234. ENDP
  235. SysTick_Handler PROC
  236. EXPORT SysTick_Handler [WEAK]
  237. B .
  238. ENDP
  239. Default_Handler PROC
  240. EXPORT WWDG_IRQHandler [WEAK]
  241. EXPORT PVD_IRQHandler [WEAK]
  242. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  243. EXPORT RTC_WKUP_IRQHandler [WEAK]
  244. EXPORT FLASH_IRQHandler [WEAK]
  245. EXPORT RCC_IRQHandler [WEAK]
  246. EXPORT EXTI0_IRQHandler [WEAK]
  247. EXPORT EXTI1_IRQHandler [WEAK]
  248. EXPORT EXTI2_IRQHandler [WEAK]
  249. EXPORT EXTI3_IRQHandler [WEAK]
  250. EXPORT EXTI4_IRQHandler [WEAK]
  251. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  252. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  253. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  254. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  255. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  256. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  257. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  258. EXPORT ADC_IRQHandler [WEAK]
  259. EXPORT CAN1_TX_IRQHandler [WEAK]
  260. EXPORT CAN1_RX0_IRQHandler [WEAK]
  261. EXPORT CAN1_RX1_IRQHandler [WEAK]
  262. EXPORT CAN1_SCE_IRQHandler [WEAK]
  263. EXPORT EXTI9_5_IRQHandler [WEAK]
  264. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  265. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  266. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  267. EXPORT TIM1_CC_IRQHandler [WEAK]
  268. EXPORT TIM2_IRQHandler [WEAK]
  269. EXPORT TIM3_IRQHandler [WEAK]
  270. EXPORT TIM4_IRQHandler [WEAK]
  271. EXPORT I2C1_EV_IRQHandler [WEAK]
  272. EXPORT I2C1_ER_IRQHandler [WEAK]
  273. EXPORT I2C2_EV_IRQHandler [WEAK]
  274. EXPORT I2C2_ER_IRQHandler [WEAK]
  275. EXPORT SPI1_IRQHandler [WEAK]
  276. EXPORT SPI2_IRQHandler [WEAK]
  277. EXPORT USART1_IRQHandler [WEAK]
  278. EXPORT USART2_IRQHandler [WEAK]
  279. EXPORT USART3_IRQHandler [WEAK]
  280. EXPORT EXTI15_10_IRQHandler [WEAK]
  281. EXPORT RTC_Alarm_IRQHandler [WEAK]
  282. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  283. EXPORT OTG_FS_IRQHandler [WEAK]
  284. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  285. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  286. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  287. EXPORT TIM8_CC_IRQHandler [WEAK]
  288. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  289. EXPORT FSMC_IRQHandler [WEAK]
  290. EXPORT SDIO_IRQHandler [WEAK]
  291. EXPORT TIM5_IRQHandler [WEAK]
  292. EXPORT SPI3_IRQHandler [WEAK]
  293. EXPORT UART4_IRQHandler [WEAK]
  294. EXPORT UART5_IRQHandler [WEAK]
  295. EXPORT TIM6_DAC_IRQHandler [WEAK]
  296. EXPORT TIM7_IRQHandler [WEAK]
  297. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  298. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  299. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  300. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  301. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  302. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  303. EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
  304. EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
  305. EXPORT CAN2_TX_IRQHandler [WEAK]
  306. EXPORT CAN2_RX0_IRQHandler [WEAK]
  307. EXPORT CAN2_RX1_IRQHandler [WEAK]
  308. EXPORT CAN2_SCE_IRQHandler [WEAK]
  309. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  310. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  311. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  312. EXPORT USART6_IRQHandler [WEAK]
  313. EXPORT I2C3_EV_IRQHandler [WEAK]
  314. EXPORT I2C3_ER_IRQHandler [WEAK]
  315. EXPORT CAN3_TX_IRQHandler [WEAK]
  316. EXPORT CAN3_RX0_IRQHandler [WEAK]
  317. EXPORT CAN3_RX1_IRQHandler [WEAK]
  318. EXPORT CAN3_SCE_IRQHandler [WEAK]
  319. EXPORT RNG_IRQHandler [WEAK]
  320. EXPORT FPU_IRQHandler [WEAK]
  321. EXPORT UART7_IRQHandler [WEAK]
  322. EXPORT UART8_IRQHandler [WEAK]
  323. EXPORT SPI4_IRQHandler [WEAK]
  324. EXPORT SPI5_IRQHandler [WEAK]
  325. EXPORT SAI1_IRQHandler [WEAK]
  326. EXPORT UART9_IRQHandler [WEAK]
  327. EXPORT UART10_IRQHandler [WEAK]
  328. EXPORT QUADSPI_IRQHandler [WEAK]
  329. EXPORT FMPI2C1_EV_IRQHandler [WEAK]
  330. EXPORT FMPI2C1_ER_IRQHandler [WEAK]
  331. EXPORT LPTIM1_IRQHandler [WEAK]
  332. EXPORT DFSDM2_FLT0_IRQHandler [WEAK]
  333. EXPORT DFSDM2_FLT1_IRQHandler [WEAK]
  334. EXPORT DFSDM2_FLT2_IRQHandler [WEAK]
  335. EXPORT DFSDM2_FLT3_IRQHandler [WEAK]
  336. WWDG_IRQHandler
  337. PVD_IRQHandler
  338. TAMP_STAMP_IRQHandler
  339. RTC_WKUP_IRQHandler
  340. FLASH_IRQHandler
  341. RCC_IRQHandler
  342. EXTI0_IRQHandler
  343. EXTI1_IRQHandler
  344. EXTI2_IRQHandler
  345. EXTI3_IRQHandler
  346. EXTI4_IRQHandler
  347. DMA1_Stream0_IRQHandler
  348. DMA1_Stream1_IRQHandler
  349. DMA1_Stream2_IRQHandler
  350. DMA1_Stream3_IRQHandler
  351. DMA1_Stream4_IRQHandler
  352. DMA1_Stream5_IRQHandler
  353. DMA1_Stream6_IRQHandler
  354. ADC_IRQHandler
  355. CAN1_TX_IRQHandler
  356. CAN1_RX0_IRQHandler
  357. CAN1_RX1_IRQHandler
  358. CAN1_SCE_IRQHandler
  359. EXTI9_5_IRQHandler
  360. TIM1_BRK_TIM9_IRQHandler
  361. TIM1_UP_TIM10_IRQHandler
  362. TIM1_TRG_COM_TIM11_IRQHandler
  363. TIM1_CC_IRQHandler
  364. TIM2_IRQHandler
  365. TIM3_IRQHandler
  366. TIM4_IRQHandler
  367. I2C1_EV_IRQHandler
  368. I2C1_ER_IRQHandler
  369. I2C2_EV_IRQHandler
  370. I2C2_ER_IRQHandler
  371. SPI1_IRQHandler
  372. SPI2_IRQHandler
  373. USART1_IRQHandler
  374. USART2_IRQHandler
  375. USART3_IRQHandler
  376. EXTI15_10_IRQHandler
  377. RTC_Alarm_IRQHandler
  378. OTG_FS_WKUP_IRQHandler
  379. TIM8_BRK_TIM12_IRQHandler
  380. TIM8_UP_TIM13_IRQHandler
  381. TIM8_TRG_COM_TIM14_IRQHandler
  382. TIM8_CC_IRQHandler
  383. DMA1_Stream7_IRQHandler
  384. FSMC_IRQHandler
  385. SDIO_IRQHandler
  386. TIM5_IRQHandler
  387. SPI3_IRQHandler
  388. UART4_IRQHandler
  389. UART5_IRQHandler
  390. TIM6_DAC_IRQHandler
  391. TIM7_IRQHandler
  392. DMA2_Stream0_IRQHandler
  393. DMA2_Stream1_IRQHandler
  394. DMA2_Stream2_IRQHandler
  395. DMA2_Stream3_IRQHandler
  396. DMA2_Stream4_IRQHandler
  397. DFSDM1_FLT0_IRQHandler
  398. DFSDM1_FLT1_IRQHandler
  399. CAN2_TX_IRQHandler
  400. CAN2_RX0_IRQHandler
  401. CAN2_RX1_IRQHandler
  402. CAN2_SCE_IRQHandler
  403. OTG_FS_IRQHandler
  404. DMA2_Stream5_IRQHandler
  405. DMA2_Stream6_IRQHandler
  406. DMA2_Stream7_IRQHandler
  407. USART6_IRQHandler
  408. I2C3_EV_IRQHandler
  409. I2C3_ER_IRQHandler
  410. CAN3_TX_IRQHandler
  411. CAN3_RX0_IRQHandler
  412. CAN3_RX1_IRQHandler
  413. CAN3_SCE_IRQHandler
  414. RNG_IRQHandler
  415. FPU_IRQHandler
  416. UART7_IRQHandler
  417. UART8_IRQHandler
  418. SPI4_IRQHandler
  419. SPI5_IRQHandler
  420. SAI1_IRQHandler
  421. UART9_IRQHandler
  422. UART10_IRQHandler
  423. QUADSPI_IRQHandler
  424. FMPI2C1_EV_IRQHandler
  425. FMPI2C1_ER_IRQHandler
  426. LPTIM1_IRQHandler
  427. DFSDM2_FLT0_IRQHandler
  428. DFSDM2_FLT1_IRQHandler
  429. DFSDM2_FLT2_IRQHandler
  430. DFSDM2_FLT3_IRQHandler
  431. B .
  432. ENDP
  433. ALIGN
  434. ;*******************************************************************************
  435. ; User Stack and Heap initialization
  436. ;*******************************************************************************
  437. IF :DEF:__MICROLIB
  438. EXPORT __initial_sp
  439. EXPORT __heap_base
  440. EXPORT __heap_limit
  441. ELSE
  442. IMPORT __use_two_region_memory
  443. EXPORT __user_initial_stackheap
  444. __user_initial_stackheap
  445. LDR R0, = Heap_Mem
  446. LDR R1, =(Stack_Mem + Stack_Size)
  447. LDR R2, = (Heap_Mem + Heap_Size)
  448. LDR R3, = Stack_Mem
  449. BX LR
  450. ALIGN
  451. ENDIF
  452. END
  453. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****