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  1. ;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f722xx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V1.2.0
  5. ;* Date : 30-December-2016
  6. ;* Description : STM32F722xx devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Branches to __main in the C library (which eventually
  12. ;* calls main()).
  13. ;* After Reset the CortexM7 processor is in Thread mode,
  14. ;* priority is Privileged, and the Stack is set to Main.
  15. ;* <<< Use Configuration Wizard in Context Menu >>>
  16. ;*******************************************************************************
  17. ;
  18. ;* Redistribution and use in source and binary forms, with or without modification,
  19. ;* are permitted provided that the following conditions are met:
  20. ;* 1. Redistributions of source code must retain the above copyright notice,
  21. ;* this list of conditions and the following disclaimer.
  22. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  23. ;* this list of conditions and the following disclaimer in the documentation
  24. ;* and/or other materials provided with the distribution.
  25. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  26. ;* may be used to endorse or promote products derived from this software
  27. ;* without specific prior written permission.
  28. ;*
  29. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. ;
  40. ;*******************************************************************************
  41. ; Amount of memory (in bytes) allocated for Stack
  42. ; Tailor this value to your application needs
  43. ; <h> Stack Configuration
  44. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. Stack_Size EQU 0x00000400
  47. AREA STACK, NOINIT, READWRITE, ALIGN=3
  48. Stack_Mem SPACE Stack_Size
  49. __initial_sp
  50. ; <h> Heap Configuration
  51. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  52. ; </h>
  53. Heap_Size EQU 0x00000200
  54. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  55. __heap_base
  56. Heap_Mem SPACE Heap_Size
  57. __heap_limit
  58. PRESERVE8
  59. THUMB
  60. ; Vector Table Mapped to Address 0 at Reset
  61. AREA RESET, DATA, READONLY
  62. EXPORT __Vectors
  63. EXPORT __Vectors_End
  64. EXPORT __Vectors_Size
  65. __Vectors DCD __initial_sp ; Top of Stack
  66. DCD Reset_Handler ; Reset Handler
  67. DCD NMI_Handler ; NMI Handler
  68. DCD HardFault_Handler ; Hard Fault Handler
  69. DCD MemManage_Handler ; MPU Fault Handler
  70. DCD BusFault_Handler ; Bus Fault Handler
  71. DCD UsageFault_Handler ; Usage Fault Handler
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD 0 ; Reserved
  75. DCD 0 ; Reserved
  76. DCD SVC_Handler ; SVCall Handler
  77. DCD DebugMon_Handler ; Debug Monitor Handler
  78. DCD 0 ; Reserved
  79. DCD PendSV_Handler ; PendSV Handler
  80. DCD SysTick_Handler ; SysTick Handler
  81. ; External Interrupts
  82. DCD WWDG_IRQHandler ; Window WatchDog
  83. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  84. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  85. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  86. DCD FLASH_IRQHandler ; FLASH
  87. DCD RCC_IRQHandler ; RCC
  88. DCD EXTI0_IRQHandler ; EXTI Line0
  89. DCD EXTI1_IRQHandler ; EXTI Line1
  90. DCD EXTI2_IRQHandler ; EXTI Line2
  91. DCD EXTI3_IRQHandler ; EXTI Line3
  92. DCD EXTI4_IRQHandler ; EXTI Line4
  93. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  94. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  95. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  96. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  97. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  98. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  99. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  100. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  101. DCD CAN1_TX_IRQHandler ; CAN1 TX
  102. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  103. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  104. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  105. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  106. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  107. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  108. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  109. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  110. DCD TIM2_IRQHandler ; TIM2
  111. DCD TIM3_IRQHandler ; TIM3
  112. DCD TIM4_IRQHandler ; TIM4
  113. DCD I2C1_EV_IRQHandler ; I2C1 Event
  114. DCD I2C1_ER_IRQHandler ; I2C1 Error
  115. DCD I2C2_EV_IRQHandler ; I2C2 Event
  116. DCD I2C2_ER_IRQHandler ; I2C2 Error
  117. DCD SPI1_IRQHandler ; SPI1
  118. DCD SPI2_IRQHandler ; SPI2
  119. DCD USART1_IRQHandler ; USART1
  120. DCD USART2_IRQHandler ; USART2
  121. DCD USART3_IRQHandler ; USART3
  122. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  123. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  124. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  125. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  126. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  127. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  128. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  129. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  130. DCD FMC_IRQHandler ; FMC
  131. DCD SDMMC1_IRQHandler ; SDMMC1
  132. DCD TIM5_IRQHandler ; TIM5
  133. DCD SPI3_IRQHandler ; SPI3
  134. DCD UART4_IRQHandler ; UART4
  135. DCD UART5_IRQHandler ; UART5
  136. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  137. DCD TIM7_IRQHandler ; TIM7
  138. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  139. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  140. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  141. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  142. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  143. DCD 0 ; Reserved
  144. DCD 0 ; Reserved
  145. DCD 0 ; Reserved
  146. DCD 0 ; Reserved
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD OTG_FS_IRQHandler ; USB OTG FS
  150. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  151. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  152. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  153. DCD USART6_IRQHandler ; USART6
  154. DCD I2C3_EV_IRQHandler ; I2C3 event
  155. DCD I2C3_ER_IRQHandler ; I2C3 error
  156. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  157. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  158. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  159. DCD OTG_HS_IRQHandler ; USB OTG HS
  160. DCD 0 ; Reserved
  161. DCD 0 ; Reserved
  162. DCD RNG_IRQHandler ; RNG
  163. DCD FPU_IRQHandler ; FPU
  164. DCD UART7_IRQHandler ; UART7
  165. DCD UART8_IRQHandler ; UART8
  166. DCD SPI4_IRQHandler ; SPI4
  167. DCD SPI5_IRQHandler ; SPI5
  168. DCD 0 ; Reserved
  169. DCD SAI1_IRQHandler ; SAI1
  170. DCD 0 ; Reserved
  171. DCD 0 ; Reserved
  172. DCD 0 ; Reserved
  173. DCD SAI2_IRQHandler ; SAI2
  174. DCD QUADSPI_IRQHandler ; QUADSPI
  175. DCD LPTIM1_IRQHandler ; LPTIM1
  176. DCD 0 ; Reserved
  177. DCD 0 ; Reserved
  178. DCD 0 ; Reserved
  179. DCD 0 ; Reserved
  180. DCD 0 ; Reserved
  181. DCD 0 ; Reserved
  182. DCD 0 ; Reserved
  183. DCD 0 ; Reserved
  184. DCD 0 ; Reserved
  185. DCD SDMMC2_IRQHandler ; SDMMC2
  186. __Vectors_End
  187. __Vectors_Size EQU __Vectors_End - __Vectors
  188. AREA |.text|, CODE, READONLY
  189. ; Reset handler
  190. Reset_Handler PROC
  191. EXPORT Reset_Handler [WEAK]
  192. IMPORT SystemInit
  193. IMPORT __main
  194. LDR R0, =SystemInit
  195. BLX R0
  196. LDR R0, =__main
  197. BX R0
  198. ENDP
  199. ; Dummy Exception Handlers (infinite loops which can be modified)
  200. NMI_Handler PROC
  201. EXPORT NMI_Handler [WEAK]
  202. B .
  203. ENDP
  204. HardFault_Handler\
  205. PROC
  206. EXPORT HardFault_Handler [WEAK]
  207. B .
  208. ENDP
  209. MemManage_Handler\
  210. PROC
  211. EXPORT MemManage_Handler [WEAK]
  212. B .
  213. ENDP
  214. BusFault_Handler\
  215. PROC
  216. EXPORT BusFault_Handler [WEAK]
  217. B .
  218. ENDP
  219. UsageFault_Handler\
  220. PROC
  221. EXPORT UsageFault_Handler [WEAK]
  222. B .
  223. ENDP
  224. SVC_Handler PROC
  225. EXPORT SVC_Handler [WEAK]
  226. B .
  227. ENDP
  228. DebugMon_Handler\
  229. PROC
  230. EXPORT DebugMon_Handler [WEAK]
  231. B .
  232. ENDP
  233. PendSV_Handler PROC
  234. EXPORT PendSV_Handler [WEAK]
  235. B .
  236. ENDP
  237. SysTick_Handler PROC
  238. EXPORT SysTick_Handler [WEAK]
  239. B .
  240. ENDP
  241. Default_Handler PROC
  242. EXPORT WWDG_IRQHandler [WEAK]
  243. EXPORT PVD_IRQHandler [WEAK]
  244. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  245. EXPORT RTC_WKUP_IRQHandler [WEAK]
  246. EXPORT FLASH_IRQHandler [WEAK]
  247. EXPORT RCC_IRQHandler [WEAK]
  248. EXPORT EXTI0_IRQHandler [WEAK]
  249. EXPORT EXTI1_IRQHandler [WEAK]
  250. EXPORT EXTI2_IRQHandler [WEAK]
  251. EXPORT EXTI3_IRQHandler [WEAK]
  252. EXPORT EXTI4_IRQHandler [WEAK]
  253. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  254. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  255. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  256. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  257. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  258. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  259. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  260. EXPORT ADC_IRQHandler [WEAK]
  261. EXPORT CAN1_TX_IRQHandler [WEAK]
  262. EXPORT CAN1_RX0_IRQHandler [WEAK]
  263. EXPORT CAN1_RX1_IRQHandler [WEAK]
  264. EXPORT CAN1_SCE_IRQHandler [WEAK]
  265. EXPORT EXTI9_5_IRQHandler [WEAK]
  266. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  267. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  268. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  269. EXPORT TIM1_CC_IRQHandler [WEAK]
  270. EXPORT TIM2_IRQHandler [WEAK]
  271. EXPORT TIM3_IRQHandler [WEAK]
  272. EXPORT TIM4_IRQHandler [WEAK]
  273. EXPORT I2C1_EV_IRQHandler [WEAK]
  274. EXPORT I2C1_ER_IRQHandler [WEAK]
  275. EXPORT I2C2_EV_IRQHandler [WEAK]
  276. EXPORT I2C2_ER_IRQHandler [WEAK]
  277. EXPORT SPI1_IRQHandler [WEAK]
  278. EXPORT SPI2_IRQHandler [WEAK]
  279. EXPORT USART1_IRQHandler [WEAK]
  280. EXPORT USART2_IRQHandler [WEAK]
  281. EXPORT USART3_IRQHandler [WEAK]
  282. EXPORT EXTI15_10_IRQHandler [WEAK]
  283. EXPORT RTC_Alarm_IRQHandler [WEAK]
  284. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  285. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  286. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  287. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  288. EXPORT TIM8_CC_IRQHandler [WEAK]
  289. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  290. EXPORT FMC_IRQHandler [WEAK]
  291. EXPORT SDMMC1_IRQHandler [WEAK]
  292. EXPORT TIM5_IRQHandler [WEAK]
  293. EXPORT SPI3_IRQHandler [WEAK]
  294. EXPORT UART4_IRQHandler [WEAK]
  295. EXPORT UART5_IRQHandler [WEAK]
  296. EXPORT TIM6_DAC_IRQHandler [WEAK]
  297. EXPORT TIM7_IRQHandler [WEAK]
  298. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  299. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  300. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  301. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  302. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  303. EXPORT OTG_FS_IRQHandler [WEAK]
  304. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  305. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  306. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  307. EXPORT USART6_IRQHandler [WEAK]
  308. EXPORT I2C3_EV_IRQHandler [WEAK]
  309. EXPORT I2C3_ER_IRQHandler [WEAK]
  310. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  311. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  312. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  313. EXPORT OTG_HS_IRQHandler [WEAK]
  314. EXPORT RNG_IRQHandler [WEAK]
  315. EXPORT FPU_IRQHandler [WEAK]
  316. EXPORT UART7_IRQHandler [WEAK]
  317. EXPORT UART8_IRQHandler [WEAK]
  318. EXPORT SPI4_IRQHandler [WEAK]
  319. EXPORT SPI5_IRQHandler [WEAK]
  320. EXPORT SAI1_IRQHandler [WEAK]
  321. EXPORT SAI2_IRQHandler [WEAK]
  322. EXPORT QUADSPI_IRQHandler [WEAK]
  323. EXPORT LPTIM1_IRQHandler [WEAK]
  324. EXPORT SDMMC2_IRQHandler [WEAK]
  325. WWDG_IRQHandler
  326. PVD_IRQHandler
  327. TAMP_STAMP_IRQHandler
  328. RTC_WKUP_IRQHandler
  329. FLASH_IRQHandler
  330. RCC_IRQHandler
  331. EXTI0_IRQHandler
  332. EXTI1_IRQHandler
  333. EXTI2_IRQHandler
  334. EXTI3_IRQHandler
  335. EXTI4_IRQHandler
  336. DMA1_Stream0_IRQHandler
  337. DMA1_Stream1_IRQHandler
  338. DMA1_Stream2_IRQHandler
  339. DMA1_Stream3_IRQHandler
  340. DMA1_Stream4_IRQHandler
  341. DMA1_Stream5_IRQHandler
  342. DMA1_Stream6_IRQHandler
  343. ADC_IRQHandler
  344. CAN1_TX_IRQHandler
  345. CAN1_RX0_IRQHandler
  346. CAN1_RX1_IRQHandler
  347. CAN1_SCE_IRQHandler
  348. EXTI9_5_IRQHandler
  349. TIM1_BRK_TIM9_IRQHandler
  350. TIM1_UP_TIM10_IRQHandler
  351. TIM1_TRG_COM_TIM11_IRQHandler
  352. TIM1_CC_IRQHandler
  353. TIM2_IRQHandler
  354. TIM3_IRQHandler
  355. TIM4_IRQHandler
  356. I2C1_EV_IRQHandler
  357. I2C1_ER_IRQHandler
  358. I2C2_EV_IRQHandler
  359. I2C2_ER_IRQHandler
  360. SPI1_IRQHandler
  361. SPI2_IRQHandler
  362. USART1_IRQHandler
  363. USART2_IRQHandler
  364. USART3_IRQHandler
  365. EXTI15_10_IRQHandler
  366. RTC_Alarm_IRQHandler
  367. OTG_FS_WKUP_IRQHandler
  368. TIM8_BRK_TIM12_IRQHandler
  369. TIM8_UP_TIM13_IRQHandler
  370. TIM8_TRG_COM_TIM14_IRQHandler
  371. TIM8_CC_IRQHandler
  372. DMA1_Stream7_IRQHandler
  373. FMC_IRQHandler
  374. SDMMC1_IRQHandler
  375. TIM5_IRQHandler
  376. SPI3_IRQHandler
  377. UART4_IRQHandler
  378. UART5_IRQHandler
  379. TIM6_DAC_IRQHandler
  380. TIM7_IRQHandler
  381. DMA2_Stream0_IRQHandler
  382. DMA2_Stream1_IRQHandler
  383. DMA2_Stream2_IRQHandler
  384. DMA2_Stream3_IRQHandler
  385. DMA2_Stream4_IRQHandler
  386. OTG_FS_IRQHandler
  387. DMA2_Stream5_IRQHandler
  388. DMA2_Stream6_IRQHandler
  389. DMA2_Stream7_IRQHandler
  390. USART6_IRQHandler
  391. I2C3_EV_IRQHandler
  392. I2C3_ER_IRQHandler
  393. OTG_HS_EP1_OUT_IRQHandler
  394. OTG_HS_EP1_IN_IRQHandler
  395. OTG_HS_WKUP_IRQHandler
  396. OTG_HS_IRQHandler
  397. RNG_IRQHandler
  398. FPU_IRQHandler
  399. UART7_IRQHandler
  400. UART8_IRQHandler
  401. SPI4_IRQHandler
  402. SPI5_IRQHandler
  403. SAI1_IRQHandler
  404. SAI2_IRQHandler
  405. QUADSPI_IRQHandler
  406. LPTIM1_IRQHandler
  407. SDMMC2_IRQHandler
  408. B .
  409. ENDP
  410. ALIGN
  411. ;*******************************************************************************
  412. ; User Stack and Heap initialization
  413. ;*******************************************************************************
  414. IF :DEF:__MICROLIB
  415. EXPORT __initial_sp
  416. EXPORT __heap_base
  417. EXPORT __heap_limit
  418. ELSE
  419. IMPORT __use_two_region_memory
  420. EXPORT __user_initial_stackheap
  421. __user_initial_stackheap
  422. LDR R0, = Heap_Mem
  423. LDR R1, =(Stack_Mem + Stack_Size)
  424. LDR R2, = (Heap_Mem + Heap_Size)
  425. LDR R3, = Stack_Mem
  426. BX LR
  427. ALIGN
  428. ENDIF
  429. END
  430. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****