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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32l443xx.s
  4. * @author MCD Application Team
  5. * @version V1.3.2
  6. * @date 16-June-2017
  7. * @brief STM32L443xx devices vector table for GCC toolchain.
  8. * This module performs:
  9. * - Set the initial SP
  10. * - Set the initial PC == Reset_Handler,
  11. * - Set the vector table entries with the exceptions ISR address,
  12. * - Configure the clock system
  13. * - Branches to main in the C library (which eventually
  14. * calls main()).
  15. * After Reset the Cortex-M4 processor is in Thread mode,
  16. * priority is Privileged, and the Stack is set to Main.
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  21. *
  22. * Redistribution and use in source and binary forms, with or without modification,
  23. * are permitted provided that the following conditions are met:
  24. * 1. Redistributions of source code must retain the above copyright notice,
  25. * this list of conditions and the following disclaimer.
  26. * 2. Redistributions in binary form must reproduce the above copyright notice,
  27. * this list of conditions and the following disclaimer in the documentation
  28. * and/or other materials provided with the distribution.
  29. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  30. * may be used to endorse or promote products derived from this software
  31. * without specific prior written permission.
  32. *
  33. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  36. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  37. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  38. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  39. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  40. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  41. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  42. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  43. *
  44. ******************************************************************************
  45. */
  46. .syntax unified
  47. .cpu cortex-m4
  48. .fpu softvfp
  49. .thumb
  50. .global g_pfnVectors
  51. .global Default_Handler
  52. /* start address for the initialization values of the .data section.
  53. defined in linker script */
  54. .word _sidata
  55. /* start address for the .data section. defined in linker script */
  56. .word _sdata
  57. /* end address for the .data section. defined in linker script */
  58. .word _edata
  59. /* start address for the .bss section. defined in linker script */
  60. .word _sbss
  61. /* end address for the .bss section. defined in linker script */
  62. .word _ebss
  63. .equ BootRAM, 0xF1E0F85F
  64. /**
  65. * @brief This is the code that gets called when the processor first
  66. * starts execution following a reset event. Only the absolutely
  67. * necessary set is performed, after which the application
  68. * supplied main() routine is called.
  69. * @param None
  70. * @retval : None
  71. */
  72. .section .text.Reset_Handler
  73. .weak Reset_Handler
  74. .type Reset_Handler, %function
  75. Reset_Handler:
  76. ldr sp, =_estack /* Atollic update: set stack pointer */
  77. /* Copy the data segment initializers from flash to SRAM */
  78. movs r1, #0
  79. b LoopCopyDataInit
  80. CopyDataInit:
  81. ldr r3, =_sidata
  82. ldr r3, [r3, r1]
  83. str r3, [r0, r1]
  84. adds r1, r1, #4
  85. LoopCopyDataInit:
  86. ldr r0, =_sdata
  87. ldr r3, =_edata
  88. adds r2, r0, r1
  89. cmp r2, r3
  90. bcc CopyDataInit
  91. ldr r2, =_sbss
  92. b LoopFillZerobss
  93. /* Zero fill the bss segment. */
  94. FillZerobss:
  95. movs r3, #0
  96. str r3, [r2], #4
  97. LoopFillZerobss:
  98. ldr r3, = _ebss
  99. cmp r2, r3
  100. bcc FillZerobss
  101. /* Call the clock system intitialization function.*/
  102. bl SystemInit
  103. /* Call static constructors */
  104. bl __libc_init_array
  105. /* Call the application's entry point.*/
  106. bl main
  107. LoopForever:
  108. b LoopForever
  109. .size Reset_Handler, .-Reset_Handler
  110. /**
  111. * @brief This is the code that gets called when the processor receives an
  112. * unexpected interrupt. This simply enters an infinite loop, preserving
  113. * the system state for examination by a debugger.
  114. *
  115. * @param None
  116. * @retval : None
  117. */
  118. .section .text.Default_Handler,"ax",%progbits
  119. Default_Handler:
  120. Infinite_Loop:
  121. b Infinite_Loop
  122. .size Default_Handler, .-Default_Handler
  123. /******************************************************************************
  124. *
  125. * The minimal vector table for a Cortex-M4. Note that the proper constructs
  126. * must be placed on this to ensure that it ends up at physical address
  127. * 0x0000.0000.
  128. *
  129. ******************************************************************************/
  130. .section .isr_vector,"a",%progbits
  131. .type g_pfnVectors, %object
  132. .size g_pfnVectors, .-g_pfnVectors
  133. g_pfnVectors:
  134. .word _estack
  135. .word Reset_Handler
  136. .word NMI_Handler
  137. .word HardFault_Handler
  138. .word MemManage_Handler
  139. .word BusFault_Handler
  140. .word UsageFault_Handler
  141. .word 0
  142. .word 0
  143. .word 0
  144. .word 0
  145. .word SVC_Handler
  146. .word DebugMon_Handler
  147. .word 0
  148. .word PendSV_Handler
  149. .word SysTick_Handler
  150. .word WWDG_IRQHandler
  151. .word PVD_PVM_IRQHandler
  152. .word TAMP_STAMP_IRQHandler
  153. .word RTC_WKUP_IRQHandler
  154. .word FLASH_IRQHandler
  155. .word RCC_IRQHandler
  156. .word EXTI0_IRQHandler
  157. .word EXTI1_IRQHandler
  158. .word EXTI2_IRQHandler
  159. .word EXTI3_IRQHandler
  160. .word EXTI4_IRQHandler
  161. .word DMA1_Channel1_IRQHandler
  162. .word DMA1_Channel2_IRQHandler
  163. .word DMA1_Channel3_IRQHandler
  164. .word DMA1_Channel4_IRQHandler
  165. .word DMA1_Channel5_IRQHandler
  166. .word DMA1_Channel6_IRQHandler
  167. .word DMA1_Channel7_IRQHandler
  168. .word ADC1_IRQHandler
  169. .word CAN1_TX_IRQHandler
  170. .word CAN1_RX0_IRQHandler
  171. .word CAN1_RX1_IRQHandler
  172. .word CAN1_SCE_IRQHandler
  173. .word EXTI9_5_IRQHandler
  174. .word TIM1_BRK_TIM15_IRQHandler
  175. .word TIM1_UP_TIM16_IRQHandler
  176. .word TIM1_TRG_COM_IRQHandler
  177. .word TIM1_CC_IRQHandler
  178. .word TIM2_IRQHandler
  179. .word 0
  180. .word 0
  181. .word I2C1_EV_IRQHandler
  182. .word I2C1_ER_IRQHandler
  183. .word I2C2_EV_IRQHandler
  184. .word I2C2_ER_IRQHandler
  185. .word SPI1_IRQHandler
  186. .word SPI2_IRQHandler
  187. .word USART1_IRQHandler
  188. .word USART2_IRQHandler
  189. .word USART3_IRQHandler
  190. .word EXTI15_10_IRQHandler
  191. .word RTC_Alarm_IRQHandler
  192. .word 0
  193. .word 0
  194. .word 0
  195. .word 0
  196. .word 0
  197. .word 0
  198. .word 0
  199. .word SDMMC1_IRQHandler
  200. .word 0
  201. .word SPI3_IRQHandler
  202. .word 0
  203. .word 0
  204. .word TIM6_DAC_IRQHandler
  205. .word TIM7_IRQHandler
  206. .word DMA2_Channel1_IRQHandler
  207. .word DMA2_Channel2_IRQHandler
  208. .word DMA2_Channel3_IRQHandler
  209. .word DMA2_Channel4_IRQHandler
  210. .word DMA2_Channel5_IRQHandler
  211. .word 0
  212. .word 0
  213. .word 0
  214. .word COMP_IRQHandler
  215. .word LPTIM1_IRQHandler
  216. .word LPTIM2_IRQHandler
  217. .word USB_IRQHandler
  218. .word DMA2_Channel6_IRQHandler
  219. .word DMA2_Channel7_IRQHandler
  220. .word LPUART1_IRQHandler
  221. .word QUADSPI_IRQHandler
  222. .word I2C3_EV_IRQHandler
  223. .word I2C3_ER_IRQHandler
  224. .word SAI1_IRQHandler
  225. .word 0
  226. .word SWPMI1_IRQHandler
  227. .word TSC_IRQHandler
  228. .word LCD_IRQHandler
  229. .word AES_IRQHandler
  230. .word RNG_IRQHandler
  231. .word FPU_IRQHandler
  232. .word CRS_IRQHandler
  233. /*******************************************************************************
  234. *
  235. * Provide weak aliases for each Exception handler to the Default_Handler.
  236. * As they are weak aliases, any function with the same name will override
  237. * this definition.
  238. *
  239. *******************************************************************************/
  240. .weak NMI_Handler
  241. .thumb_set NMI_Handler,Default_Handler
  242. .weak HardFault_Handler
  243. .thumb_set HardFault_Handler,Default_Handler
  244. .weak MemManage_Handler
  245. .thumb_set MemManage_Handler,Default_Handler
  246. .weak BusFault_Handler
  247. .thumb_set BusFault_Handler,Default_Handler
  248. .weak UsageFault_Handler
  249. .thumb_set UsageFault_Handler,Default_Handler
  250. .weak SVC_Handler
  251. .thumb_set SVC_Handler,Default_Handler
  252. .weak DebugMon_Handler
  253. .thumb_set DebugMon_Handler,Default_Handler
  254. .weak PendSV_Handler
  255. .thumb_set PendSV_Handler,Default_Handler
  256. .weak SysTick_Handler
  257. .thumb_set SysTick_Handler,Default_Handler
  258. .weak WWDG_IRQHandler
  259. .thumb_set WWDG_IRQHandler,Default_Handler
  260. .weak PVD_PVM_IRQHandler
  261. .thumb_set PVD_PVM_IRQHandler,Default_Handler
  262. .weak TAMP_STAMP_IRQHandler
  263. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  264. .weak RTC_WKUP_IRQHandler
  265. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  266. .weak FLASH_IRQHandler
  267. .thumb_set FLASH_IRQHandler,Default_Handler
  268. .weak RCC_IRQHandler
  269. .thumb_set RCC_IRQHandler,Default_Handler
  270. .weak EXTI0_IRQHandler
  271. .thumb_set EXTI0_IRQHandler,Default_Handler
  272. .weak EXTI1_IRQHandler
  273. .thumb_set EXTI1_IRQHandler,Default_Handler
  274. .weak EXTI2_IRQHandler
  275. .thumb_set EXTI2_IRQHandler,Default_Handler
  276. .weak EXTI3_IRQHandler
  277. .thumb_set EXTI3_IRQHandler,Default_Handler
  278. .weak EXTI4_IRQHandler
  279. .thumb_set EXTI4_IRQHandler,Default_Handler
  280. .weak DMA1_Channel1_IRQHandler
  281. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  282. .weak DMA1_Channel2_IRQHandler
  283. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  284. .weak DMA1_Channel3_IRQHandler
  285. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  286. .weak DMA1_Channel4_IRQHandler
  287. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  288. .weak DMA1_Channel5_IRQHandler
  289. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  290. .weak DMA1_Channel6_IRQHandler
  291. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  292. .weak DMA1_Channel7_IRQHandler
  293. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  294. .weak ADC1_IRQHandler
  295. .thumb_set ADC1_IRQHandler,Default_Handler
  296. .weak CAN1_TX_IRQHandler
  297. .thumb_set CAN1_TX_IRQHandler,Default_Handler
  298. .weak CAN1_RX0_IRQHandler
  299. .thumb_set CAN1_RX0_IRQHandler,Default_Handler
  300. .weak CAN1_RX1_IRQHandler
  301. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  302. .weak CAN1_SCE_IRQHandler
  303. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  304. .weak EXTI9_5_IRQHandler
  305. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  306. .weak TIM1_BRK_TIM15_IRQHandler
  307. .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
  308. .weak TIM1_UP_TIM16_IRQHandler
  309. .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
  310. .weak TIM1_TRG_COM_IRQHandler
  311. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  312. .weak TIM1_CC_IRQHandler
  313. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  314. .weak TIM2_IRQHandler
  315. .thumb_set TIM2_IRQHandler,Default_Handler
  316. .weak I2C1_EV_IRQHandler
  317. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  318. .weak I2C1_ER_IRQHandler
  319. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  320. .weak I2C2_EV_IRQHandler
  321. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  322. .weak I2C2_ER_IRQHandler
  323. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  324. .weak SPI1_IRQHandler
  325. .thumb_set SPI1_IRQHandler,Default_Handler
  326. .weak SPI2_IRQHandler
  327. .thumb_set SPI2_IRQHandler,Default_Handler
  328. .weak USART1_IRQHandler
  329. .thumb_set USART1_IRQHandler,Default_Handler
  330. .weak USART2_IRQHandler
  331. .thumb_set USART2_IRQHandler,Default_Handler
  332. .weak USART3_IRQHandler
  333. .thumb_set USART3_IRQHandler,Default_Handler
  334. .weak EXTI15_10_IRQHandler
  335. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  336. .weak RTC_Alarm_IRQHandler
  337. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  338. .weak SDMMC1_IRQHandler
  339. .thumb_set SDMMC1_IRQHandler,Default_Handler
  340. .weak SPI3_IRQHandler
  341. .thumb_set SPI3_IRQHandler,Default_Handler
  342. .weak TIM6_DAC_IRQHandler
  343. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  344. .weak TIM7_IRQHandler
  345. .thumb_set TIM7_IRQHandler,Default_Handler
  346. .weak DMA2_Channel1_IRQHandler
  347. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  348. .weak DMA2_Channel2_IRQHandler
  349. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  350. .weak DMA2_Channel3_IRQHandler
  351. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  352. .weak DMA2_Channel4_IRQHandler
  353. .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
  354. .weak DMA2_Channel5_IRQHandler
  355. .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
  356. .weak COMP_IRQHandler
  357. .thumb_set COMP_IRQHandler,Default_Handler
  358. .weak LPTIM1_IRQHandler
  359. .thumb_set LPTIM1_IRQHandler,Default_Handler
  360. .weak LPTIM2_IRQHandler
  361. .thumb_set LPTIM2_IRQHandler,Default_Handler
  362. .weak USB_IRQHandler
  363. .thumb_set USB_IRQHandler,Default_Handler
  364. .weak DMA2_Channel6_IRQHandler
  365. .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
  366. .weak DMA2_Channel7_IRQHandler
  367. .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
  368. .weak LPUART1_IRQHandler
  369. .thumb_set LPUART1_IRQHandler,Default_Handler
  370. .weak QUADSPI_IRQHandler
  371. .thumb_set QUADSPI_IRQHandler,Default_Handler
  372. .weak I2C3_EV_IRQHandler
  373. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  374. .weak I2C3_ER_IRQHandler
  375. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  376. .weak SAI1_IRQHandler
  377. .thumb_set SAI1_IRQHandler,Default_Handler
  378. .weak SWPMI1_IRQHandler
  379. .thumb_set SWPMI1_IRQHandler,Default_Handler
  380. .weak TSC_IRQHandler
  381. .thumb_set TSC_IRQHandler,Default_Handler
  382. .weak LCD_IRQHandler
  383. .thumb_set LCD_IRQHandler,Default_Handler
  384. .weak AES_IRQHandler
  385. .thumb_set AES_IRQHandler,Default_Handler
  386. .weak RNG_IRQHandler
  387. .thumb_set RNG_IRQHandler,Default_Handler
  388. .weak FPU_IRQHandler
  389. .thumb_set FPU_IRQHandler,Default_Handler
  390. .weak CRS_IRQHandler
  391. .thumb_set CRS_IRQHandler,Default_Handler
  392. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/