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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal.h
  4. * @author MCD Application Team
  5. * @brief This file contains all the functions prototypes for the HAL
  6. * module driver.
  7. ******************************************************************************
  8. * @attention
  9. *
  10. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  11. * All rights reserved.</center></h2>
  12. *
  13. * This software component is licensed by ST under BSD 3-Clause license,
  14. * the "License"; You may not use this file except in compliance with the
  15. * License. You may obtain a copy of the License at:
  16. * opensource.org/licenses/BSD-3-Clause
  17. *
  18. ******************************************************************************
  19. */
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef STM32H7xx_HAL_H
  22. #define STM32H7xx_HAL_H
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26. /* Includes ------------------------------------------------------------------*/
  27. #include "stm32h7xx_hal_conf.h"
  28. /** @addtogroup STM32H7xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup HAL
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup HAL_TICK_FREQ Tick Frequency
  36. * @{
  37. */
  38. typedef enum
  39. {
  40. HAL_TICK_FREQ_10HZ = 100U,
  41. HAL_TICK_FREQ_100HZ = 10U,
  42. HAL_TICK_FREQ_1KHZ = 1U,
  43. HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
  44. } HAL_TickFreqTypeDef;
  45. /**
  46. * @}
  47. */
  48. /* Exported constants --------------------------------------------------------*/
  49. /** @defgroup REV_ID device revision ID
  50. * @{
  51. */
  52. #define REV_ID_Y ((uint32_t)0x1003) /*!< STM32H7 rev.Y */
  53. #define REV_ID_B ((uint32_t)0x2000) /*!< STM32H7 rev.B */
  54. #define REV_ID_X ((uint32_t)0x2001) /*!< STM32H7 rev.X */
  55. #define REV_ID_V ((uint32_t)0x2003) /*!< STM32H7 rev.V */
  56. /**
  57. * @}
  58. */
  59. /** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale
  60. * @{
  61. */
  62. #define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_CSR_VRS_OUT2 /*!< Voltage reference scale 0 (VREF_OUT2) */
  63. #define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_OUT1 /*!< Voltage reference scale 1 (VREF_OUT1) */
  64. #define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_OUT4 /*!< Voltage reference scale 2 (VREF_OUT4) */
  65. #define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_CSR_VRS_OUT3 /*!< Voltage reference scale 3 (VREF_OUT3) */
  66. #define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \
  67. ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1) || \
  68. ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE2) || \
  69. ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE3))
  70. /**
  71. * @}
  72. */
  73. /** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance
  74. * @{
  75. */
  76. #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */
  77. #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */
  78. #define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \
  79. ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE))
  80. #define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
  81. /**
  82. * @}
  83. */
  84. #if !defined(SYSCFG_PMCR_BOOSTEN)
  85. /** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO
  86. * @{
  87. */
  88. /** @brief Fast-mode Plus driving capability on a specific GPIO
  89. */
  90. #define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */
  91. #define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */
  92. #define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */
  93. #define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */
  94. #define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \
  95. (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \
  96. (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
  97. (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
  98. #endif /* ! SYSCFG_PMCR_BOOSTEN */
  99. /**
  100. * @}
  101. */
  102. /** @defgroup SYSCFG_Ethernet_Config Ethernet Config
  103. * @{
  104. */
  105. #define SYSCFG_ETH_MII ((uint32_t)0x00000000) /*!< Select the Media Independent Interface */
  106. #define SYSCFG_ETH_RMII SYSCFG_PMCR_EPIS_SEL_2 /*!< Select the Reduced Media Independent Interface */
  107. #define IS_SYSCFG_ETHERNET_CONFIG(CONFIG) (((CONFIG) == SYSCFG_ETH_MII) || \
  108. ((CONFIG) == SYSCFG_ETH_RMII))
  109. /**
  110. * @}
  111. */
  112. /** @defgroup SYSCFG_Analog_Switch_Config Analog Switch Config
  113. * @{
  114. */
  115. #define SYSCFG_SWITCH_PA0 SYSCFG_PMCR_PA0SO /*!< Select PA0 analog switch */
  116. #define SYSCFG_SWITCH_PA1 SYSCFG_PMCR_PA1SO /*!< Select PA1 analog switch */
  117. #define SYSCFG_SWITCH_PC2 SYSCFG_PMCR_PC2SO /*!< Select PC2 analog switch */
  118. #define SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO /*!< Select PC3 analog switch */
  119. #define IS_SYSCFG_ANALOG_SWITCH(SWITCH) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \
  120. (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \
  121. (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \
  122. (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3))
  123. #define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO /*!< PA0 analog switch opened */
  124. #define SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) /*!< PA0 analog switch closed */
  125. #define SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCR_PA1SO /*!< PA1 analog switch opened */
  126. #define SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) /*!< PA1 analog switch closed*/
  127. #define SYSCFG_SWITCH_PC2_OPEN SYSCFG_PMCR_PC2SO /*!< PC2 analog switch opened */
  128. #define SYSCFG_SWITCH_PC2_CLOSE ((uint32_t)0x00000000) /*!< PC2 analog switch closed */
  129. #define SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO /*!< PC3 analog switch opened */
  130. #define SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) /*!< PC3 analog switch closed */
  131. #define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \
  132. (((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \
  133. (((STATE) & SYSCFG_SWITCH_PA1_OPEN) == SYSCFG_SWITCH_PA1_OPEN) || \
  134. (((STATE) & SYSCFG_SWITCH_PA1_CLOSE) == SYSCFG_SWITCH_PA1_CLOSE) || \
  135. (((STATE) & SYSCFG_SWITCH_PC2_OPEN) == SYSCFG_SWITCH_PC2_OPEN) || \
  136. (((STATE) & SYSCFG_SWITCH_PC2_CLOSE) == SYSCFG_SWITCH_PC2_CLOSE) || \
  137. (((STATE) & SYSCFG_SWITCH_PC3_OPEN) == SYSCFG_SWITCH_PC3_OPEN) || \
  138. (((STATE) & SYSCFG_SWITCH_PC3_CLOSE) == SYSCFG_SWITCH_PC3_CLOSE))
  139. /**
  140. * @}
  141. */
  142. /** @defgroup SYSCFG_Boot_Config Boot Config
  143. * @{
  144. */
  145. #define SYSCFG_BOOT_ADDR0 ((uint32_t)0x00000000) /*!< Select Boot address0 */
  146. #define SYSCFG_BOOT_ADDR1 ((uint32_t)0x00000001) /*!< Select Boot address1 */
  147. #define IS_SYSCFG_BOOT_REGISTER(REGISTER) (((REGISTER) == SYSCFG_BOOT_ADDR0)|| \
  148. ((REGISTER) == SYSCFG_BOOT_ADDR1))
  149. #define IS_SYSCFG_BOOT_ADDRESS(ADDRESS) ((ADDRESS) < PERIPH_BASE)
  150. /**
  151. * @}
  152. */
  153. /** @defgroup SYSCFG_IOCompenstionCell_Config IOCompenstionCell Config
  154. * @{
  155. */
  156. #define SYSCFG_CELL_CODE ((uint32_t)0x00000000) /*!< Select Code from the cell */
  157. #define SYSCFG_REGISTER_CODE SYSCFG_CCCSR_CS /*!< Code from the SYSCFG compensation cell code register */
  158. #define IS_SYSCFG_CODE_SELECT(SELECT) (((SELECT) == SYSCFG_CELL_CODE)|| \
  159. ((SELECT) == SYSCFG_REGISTER_CODE))
  160. #define IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10UL))
  161. /**
  162. * @}
  163. */
  164. /** @defgroup EXTI_Event_Input_Config Event Input Config
  165. * @{
  166. */
  167. #define EXTI_MODE_IT ((uint32_t)0x00010000)
  168. #define EXTI_MODE_EVT ((uint32_t)0x00020000)
  169. #define EXTI_RISING_EDGE ((uint32_t)0x00100000)
  170. #define EXTI_FALLING_EDGE ((uint32_t)0x00200000)
  171. #define IS_EXTI_EDGE_LINE(EDGE) (((EDGE) == EXTI_RISING_EDGE) || ((EDGE) == EXTI_FALLING_EDGE))
  172. #define IS_EXTI_MODE_LINE(MODE) (((MODE) == EXTI_MODE_IT) || ((MODE) == EXTI_MODE_EVT))
  173. #define EXTI_LINE0 ((uint32_t)0x00) /*!< External interrupt LINE 0 */
  174. #define EXTI_LINE1 ((uint32_t)0x01) /*!< External interrupt LINE 1 */
  175. #define EXTI_LINE2 ((uint32_t)0x02) /*!< External interrupt LINE 2 */
  176. #define EXTI_LINE3 ((uint32_t)0x03) /*!< External interrupt LINE 3 */
  177. #define EXTI_LINE4 ((uint32_t)0x04) /*!< External interrupt LINE 4 */
  178. #define EXTI_LINE5 ((uint32_t)0x05) /*!< External interrupt LINE 5 */
  179. #define EXTI_LINE6 ((uint32_t)0x06) /*!< External interrupt LINE 6 */
  180. #define EXTI_LINE7 ((uint32_t)0x07) /*!< External interrupt LINE 7 */
  181. #define EXTI_LINE8 ((uint32_t)0x08) /*!< External interrupt LINE 8 */
  182. #define EXTI_LINE9 ((uint32_t)0x09) /*!< External interrupt LINE 9 */
  183. #define EXTI_LINE10 ((uint32_t)0x0A) /*!< External interrupt LINE 10 */
  184. #define EXTI_LINE11 ((uint32_t)0x0B) /*!< External interrupt LINE 11 */
  185. #define EXTI_LINE12 ((uint32_t)0x0C) /*!< External interrupt LINE 12 */
  186. #define EXTI_LINE13 ((uint32_t)0x0D) /*!< External interrupt LINE 13 */
  187. #define EXTI_LINE14 ((uint32_t)0x0E) /*!< External interrupt LINE 14 */
  188. #define EXTI_LINE15 ((uint32_t)0x0F) /*!< External interrupt LINE 15 */
  189. #define EXTI_LINE16 ((uint32_t)0x10)
  190. #define EXTI_LINE17 ((uint32_t)0x11)
  191. #define EXTI_LINE18 ((uint32_t)0x12)
  192. #define EXTI_LINE19 ((uint32_t)0x13)
  193. #define EXTI_LINE20 ((uint32_t)0x14)
  194. #define EXTI_LINE21 ((uint32_t)0x15)
  195. #define EXTI_LINE22 ((uint32_t)0x16)
  196. #define EXTI_LINE23 ((uint32_t)0x17)
  197. #define EXTI_LINE24 ((uint32_t)0x18)
  198. #define EXTI_LINE25 ((uint32_t)0x19)
  199. #define EXTI_LINE26 ((uint32_t)0x1A)
  200. #define EXTI_LINE27 ((uint32_t)0x1B)
  201. #define EXTI_LINE28 ((uint32_t)0x1C)
  202. #define EXTI_LINE29 ((uint32_t)0x1D)
  203. #define EXTI_LINE30 ((uint32_t)0x1E)
  204. #define EXTI_LINE31 ((uint32_t)0x1F)
  205. #define EXTI_LINE32 ((uint32_t)0x20)
  206. #define EXTI_LINE33 ((uint32_t)0x21)
  207. #define EXTI_LINE34 ((uint32_t)0x22)
  208. #define EXTI_LINE35 ((uint32_t)0x23)
  209. #define EXTI_LINE36 ((uint32_t)0x24)
  210. #define EXTI_LINE37 ((uint32_t)0x25)
  211. #define EXTI_LINE38 ((uint32_t)0x26)
  212. #define EXTI_LINE39 ((uint32_t)0x27)
  213. #define EXTI_LINE40 ((uint32_t)0x28)
  214. #define EXTI_LINE41 ((uint32_t)0x29)
  215. #define EXTI_LINE42 ((uint32_t)0x2A)
  216. #define EXTI_LINE43 ((uint32_t)0x2B)
  217. #define EXTI_LINE44 ((uint32_t)0x2C) /* Not available in all family lines */
  218. /* EXTI_LINE45 Reserved */
  219. #if defined(DUAL_CORE)
  220. #define EXTI_LINE46 ((uint32_t)0x2E)
  221. #else
  222. /* EXTI_LINE46 Reserved */
  223. #endif /* DUAL_CORE */
  224. #define EXTI_LINE47 ((uint32_t)0x2F)
  225. #define EXTI_LINE48 ((uint32_t)0x30)
  226. #define EXTI_LINE49 ((uint32_t)0x31)
  227. #define EXTI_LINE50 ((uint32_t)0x32)
  228. #define EXTI_LINE51 ((uint32_t)0x33)
  229. #define EXTI_LINE52 ((uint32_t)0x34)
  230. #define EXTI_LINE53 ((uint32_t)0x35)
  231. #define EXTI_LINE54 ((uint32_t)0x36)
  232. #define EXTI_LINE55 ((uint32_t)0x37)
  233. #define EXTI_LINE56 ((uint32_t)0x38)
  234. #define EXTI_LINE57 ((uint32_t)0x39)
  235. #define EXTI_LINE58 ((uint32_t)0x3A)
  236. #define EXTI_LINE59 ((uint32_t)0x3B)
  237. #define EXTI_LINE60 ((uint32_t)0x3C)
  238. #define EXTI_LINE61 ((uint32_t)0x3D)
  239. #define EXTI_LINE62 ((uint32_t)0x3E)
  240. #define EXTI_LINE63 ((uint32_t)0x3F)
  241. #define EXTI_LINE64 ((uint32_t)0x40)
  242. #define EXTI_LINE65 ((uint32_t)0x41)
  243. #define EXTI_LINE66 ((uint32_t)0x42)
  244. #define EXTI_LINE67 ((uint32_t)0x43)
  245. #define EXTI_LINE68 ((uint32_t)0x44)
  246. #define EXTI_LINE69 ((uint32_t)0x45)
  247. #define EXTI_LINE70 ((uint32_t)0x46)
  248. #define EXTI_LINE71 ((uint32_t)0x47)
  249. #define EXTI_LINE72 ((uint32_t)0x48)
  250. #define EXTI_LINE73 ((uint32_t)0x49)
  251. #define EXTI_LINE74 ((uint32_t)0x4A)
  252. #define EXTI_LINE75 ((uint32_t)0x4B) /* Not available in all family lines */
  253. #define EXTI_LINE76 ((uint32_t)0x4C) /* Not available in all family lines */
  254. #if defined(DUAL_CORE)
  255. #define EXTI_LINE77 ((uint32_t)0x4D)
  256. #define EXTI_LINE78 ((uint32_t)0x4E)
  257. #define EXTI_LINE79 ((uint32_t)0x4F)
  258. #define EXTI_LINE80 ((uint32_t)0x50)
  259. #else
  260. /* EXTI_LINE77 Reserved */
  261. /* EXTI_LINE78 Reserved */
  262. /* EXTI_LINE79 Reserved */
  263. /* EXTI_LINE80 Reserved */
  264. #endif /* DUAL_CORE */
  265. /* EXTI_LINE81 Reserved */
  266. #if defined(DUAL_CORE)
  267. #define EXTI_LINE82 ((uint32_t)0x52)
  268. #else
  269. /* EXTI_LINE82 Reserved */
  270. #endif /* DUAL_CORE */
  271. /* EXTI_LINE83 Reserved */
  272. #if defined(DUAL_CORE)
  273. #define EXTI_LINE84 ((uint32_t)0x54)
  274. #else
  275. /* EXTI_LINE84 Reserved */
  276. #endif /* DUAL_CORE */
  277. #define EXTI_LINE85 ((uint32_t)0x55)
  278. #define EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */
  279. #define EXTI_LINE87 ((uint32_t)0x57)
  280. #define EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */
  281. #if defined(DUAL_CORE)
  282. #define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  283. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  284. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  285. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  286. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  287. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  288. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  289. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  290. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  291. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  292. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  293. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
  294. ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE84) || \
  295. ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
  296. #else
  297. #define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1)|| \
  298. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  299. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  300. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  301. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  302. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  303. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  304. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  305. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  306. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  307. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  308. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
  309. ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
  310. #endif /* DUAL_CORE */
  311. #if defined(DUAL_CORE)
  312. #define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  313. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  314. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  315. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  316. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  317. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  318. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  319. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  320. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  321. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  322. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  323. ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
  324. ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
  325. ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
  326. ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
  327. ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
  328. ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
  329. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  330. ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
  331. ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
  332. ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
  333. ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
  334. ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
  335. ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
  336. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  337. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  338. ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
  339. ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
  340. ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
  341. ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
  342. ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
  343. ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
  344. ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
  345. ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
  346. ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
  347. ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
  348. ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
  349. ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
  350. ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
  351. ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
  352. ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
  353. ((LINE) == EXTI_LINE78) || \
  354. ((LINE) == EXTI_LINE80) || ((LINE) == EXTI_LINE82))
  355. #else
  356. #define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  357. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  358. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  359. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  360. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  361. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  362. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  363. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  364. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  365. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  366. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  367. ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
  368. ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
  369. ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
  370. ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
  371. ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
  372. ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
  373. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  374. ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
  375. ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
  376. ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
  377. ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
  378. ((LINE) == EXTI_LINE44) || \
  379. ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
  380. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  381. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  382. ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
  383. ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
  384. ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
  385. ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
  386. ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
  387. ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
  388. ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
  389. ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
  390. ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
  391. ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
  392. ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
  393. ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
  394. ((LINE) == EXTI_LINE85) || \
  395. ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
  396. ((LINE) == EXTI_LINE88))
  397. #endif /*DUAL_CORE*/
  398. #if defined(DUAL_CORE)
  399. #define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  400. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  401. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  402. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  403. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  404. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  405. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  406. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  407. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  408. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  409. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  410. ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
  411. ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
  412. ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
  413. ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
  414. ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
  415. ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
  416. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  417. ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
  418. ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
  419. ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
  420. ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
  421. ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
  422. ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
  423. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  424. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  425. ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
  426. ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
  427. ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
  428. ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
  429. ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
  430. ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
  431. ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
  432. ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
  433. ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
  434. ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
  435. ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
  436. ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
  437. ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
  438. ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
  439. ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
  440. #else
  441. #define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  442. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  443. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  444. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  445. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  446. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  447. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  448. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  449. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  450. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  451. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  452. ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
  453. ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
  454. ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
  455. ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
  456. ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
  457. ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
  458. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  459. ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
  460. ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
  461. ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
  462. ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
  463. ((LINE) == EXTI_LINE44) || \
  464. ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
  465. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  466. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  467. ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
  468. ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
  469. ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
  470. ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
  471. ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
  472. ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
  473. ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
  474. ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
  475. ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
  476. ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
  477. ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
  478. ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
  479. ((LINE) == EXTI_LINE85) || \
  480. ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
  481. ((LINE) == EXTI_LINE88))
  482. #endif /*DUAL_CORE*/
  483. #if defined(DUAL_CORE)
  484. #define IS_EXTI_D2_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  485. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  486. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  487. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  488. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  489. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  490. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  491. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  492. ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
  493. ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
  494. ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
  495. ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
  496. ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
  497. ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
  498. ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
  499. ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
  500. ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
  501. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  502. ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
  503. ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
  504. ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
  505. ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
  506. ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
  507. ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
  508. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  509. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  510. ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
  511. ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
  512. ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
  513. ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
  514. ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
  515. ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
  516. ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
  517. ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
  518. ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
  519. ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
  520. ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
  521. ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
  522. ((LINE) == EXTI_LINE78) || ((LINE) == EXTI_LINE80) || \
  523. ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE85) || \
  524. ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
  525. #endif /*DUAL_CORE*/
  526. #if defined(DUAL_CORE)
  527. #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  528. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  529. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  530. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  531. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  532. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  533. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  534. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  535. ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
  536. ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
  537. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  538. ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
  539. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  540. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  541. ((LINE) == EXTI_LINE53))
  542. #elif (POWER_DOMAINS_NUMBER == 3U)
  543. #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  544. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  545. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  546. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  547. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  548. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  549. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  550. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  551. ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
  552. ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
  553. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  554. ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
  555. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  556. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
  557. ((LINE) == EXTI_LINE53))
  558. #else
  559. #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
  560. ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
  561. ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
  562. ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
  563. ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
  564. ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
  565. ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
  566. ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
  567. ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
  568. ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
  569. ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
  570. ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
  571. ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
  572. ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE88))
  573. #endif /*DUAL_CORE*/
  574. #define BDMA_CH6_CLEAR ((uint32_t)0x00000000) /*!< BDMA ch6 event selected as D3 domain pendclear source*/
  575. #define BDMA_CH7_CLEAR ((uint32_t)0x00000001) /*!< BDMA ch7 event selected as D3 domain pendclear source*/
  576. #if defined (LPTIM4)
  577. #define LPTIM4_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM4 out selected as D3 domain pendclear source*/
  578. #else
  579. #define LPTIM2_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM2 out selected as D3 domain pendclear source*/
  580. #endif /* LPTIM4 */
  581. #if defined (LPTIM5)
  582. #define LPTIM5_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM5 out selected as D3 domain pendclear source*/
  583. #else
  584. #define LPTIM3_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM3 out selected as D3 domain pendclear source*/
  585. #endif /* LPTIM5 */
  586. #if defined (LPTIM4) && defined (LPTIM5)
  587. #define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
  588. ((SOURCE) == LPTIM4_OUT_CLEAR) || ((SOURCE) == LPTIM5_OUT_CLEAR))
  589. #else
  590. #define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
  591. ((SOURCE) == LPTIM2_OUT_CLEAR) || ((SOURCE) == LPTIM3_OUT_CLEAR))
  592. #endif /* LPTIM4 LPTIM5 */
  593. /**
  594. * @}
  595. */
  596. /** @defgroup FMC_SwapBankMapping_Config SwapBankMapping Config
  597. * @{
  598. */
  599. #define FMC_SWAPBMAP_DISABLE (0x00000000U)
  600. #define FMC_SWAPBMAP_SDRAM_SRAM FMC_BCR1_BMAP_0
  601. #define FMC_SWAPBMAP_SDRAMB2 FMC_BCR1_BMAP_1
  602. #define IS_FMC_SWAPBMAP_MODE(__MODE__) (((__MODE__) == FMC_SWAPBMAP_DISABLE) || \
  603. ((__MODE__) == FMC_SWAPBMAP_SDRAM_SRAM) || \
  604. ((__MODE__) == FMC_SWAPBMAP_SDRAMB2))
  605. /**
  606. * @}
  607. */
  608. /* Exported macro ------------------------------------------------------------*/
  609. /** @defgroup ART_Exported_Macros ART Exported Macros
  610. * @{
  611. */
  612. #if defined(DUAL_CORE)
  613. /** @brief ART Enable Macro.
  614. * Enable the Cortex-M4 ART cache.
  615. */
  616. #define __HAL_ART_ENABLE() SET_BIT(ART->CTR, ART_CTR_EN)
  617. /** @brief ART Disable Macro.
  618. * Disable the Cortex-M4 ART cache.
  619. */
  620. #define __HAL_ART_DISABLE() CLEAR_BIT(ART->CTR, ART_CTR_EN)
  621. /** @brief ART Cache BaseAddress Config.
  622. * Configure the Cortex-M4 ART cache Base Address.
  623. */
  624. #define __HAL_ART_CONFIG_BASE_ADDRESS(__BASE_ADDRESS__) MODIFY_REG(ART->CTR, ART_CTR_PCACHEADDR, (((__BASE_ADDRESS__) >> 12U) & 0x000FFF00UL))
  625. #endif /* DUAL_CORE */
  626. /**
  627. * @}
  628. */
  629. /** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
  630. * @{
  631. */
  632. /** @brief SYSCFG Break AXIRAM double ECC lock.
  633. * Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  634. * @note The selected configuration is locked and can be unlocked only by system reset.
  635. This feature is available on STM32H7 rev.B and above.
  636. */
  637. #define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)
  638. /** @brief SYSCFG Break ITCM double ECC lock.
  639. * Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  640. * @note The selected configuration is locked and can be unlocked only by system reset.
  641. This feature is available on STM32H7 rev.B and above.
  642. */
  643. #define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)
  644. /** @brief SYSCFG Break DTCM double ECC lock.
  645. * Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  646. * @note The selected configuration is locked and can be unlocked only by system reset.
  647. This feature is available on STM32H7 rev.B and above.
  648. */
  649. #define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)
  650. /** @brief SYSCFG Break SRAM1 double ECC lock.
  651. * Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  652. * @note The selected configuration is locked and can be unlocked only by system reset.
  653. This feature is available on STM32H7 rev.B and above.
  654. */
  655. #define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)
  656. /** @brief SYSCFG Break SRAM2 double ECC lock.
  657. * Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  658. * @note The selected configuration is locked and can be unlocked only by system reset.
  659. This feature is available on STM32H7 rev.B and above.
  660. */
  661. #define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)
  662. /** @brief SYSCFG Break SRAM3 double ECC lock.
  663. * Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  664. * @note The selected configuration is locked and can be unlocked only by system reset.
  665. This feature is available on STM32H7 rev.B and above.
  666. */
  667. #define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)
  668. /** @brief SYSCFG Break SRAM4 double ECC lock.
  669. * Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  670. * @note The selected configuration is locked and can be unlocked only by system reset.
  671. This feature is available on STM32H7 rev.B and above.
  672. */
  673. #define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)
  674. /** @brief SYSCFG Break Backup SRAM double ECC lock.
  675. * Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
  676. * @note The selected configuration is locked and can be unlocked only by system reset.
  677. This feature is available on STM32H7 rev.B and above.
  678. */
  679. #define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)
  680. /** @brief SYSCFG Break Cortex-M7 Lockup lock.
  681. * Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
  682. * @note The selected configuration is locked and can be unlocked only by system reset.
  683. This feature is available on STM32H7 rev.B and above.
  684. */
  685. #define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)
  686. /** @brief SYSCFG Break FLASH double ECC lock.
  687. * Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.
  688. * @note The selected configuration is locked and can be unlocked only by system reset.
  689. This feature is available on STM32H7 rev.B and above.
  690. */
  691. #define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)
  692. /** @brief SYSCFG Break PVD lock.
  693. * Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.
  694. * @note The selected configuration is locked and can be unlocked only by system reset.
  695. This feature is available on STM32H7 rev.B and above.
  696. */
  697. #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)
  698. #if defined(DUAL_CORE)
  699. /** @brief SYSCFG Break Cortex-M4 Lockup lock.
  700. * Enable and lock the connection of Cortex-M4 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
  701. * @note The selected configuration is locked and can be unlocked only by system reset.
  702. This feature is available on STM32H7 rev.B and above.
  703. */
  704. #define __HAL_SYSCFG_BREAK_CM4_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM4L)
  705. #endif /* DUAL_CORE */
  706. #if !defined(SYSCFG_PMCR_BOOSTEN)
  707. /** @brief Fast-mode Plus driving capability enable/disable macros
  708. * @param __FASTMODEPLUS__ This parameter can be a value of :
  709. * @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
  710. * @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
  711. * @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
  712. * @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9
  713. */
  714. #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
  715. SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
  716. }while(0)
  717. #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
  718. CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
  719. }while(0)
  720. #endif /* !SYSCFG_PMCR_BOOSTEN */
  721. /**
  722. * @}
  723. */
  724. /** @brief Freeze/Unfreeze Peripherals in Debug mode
  725. */
  726. #define __HAL_DBGMCU_FREEZE_WWDG1() (DBGMCU->APB3FZ1 |= (DBGMCU_APB3FZ1_DBG_WWDG1))
  727. #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM2))
  728. #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM3))
  729. #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM4))
  730. #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM5))
  731. #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM6))
  732. #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM7))
  733. #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM12))
  734. #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM13))
  735. #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM14))
  736. #define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_LPTIM1))
  737. #define __HAL_DBGMCU_FREEZE_I2C1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1))
  738. #define __HAL_DBGMCU_FREEZE_I2C2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2))
  739. #define __HAL_DBGMCU_FREEZE_I2C3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3))
  740. #define __HAL_DBGMCU_FREEZE_FDCAN() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN))
  741. #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1))
  742. #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8))
  743. #define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM15))
  744. #define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM16))
  745. #define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM17))
  746. #define __HAL_DBGMCU_FREEZE_HRTIM() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_HRTIM))
  747. #define __HAL_DBGMCU_FREEZE_I2C4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_I2C4))
  748. #define __HAL_DBGMCU_FREEZE_LPTIM2() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM2))
  749. #define __HAL_DBGMCU_FREEZE_LPTIM3() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM3))
  750. #define __HAL_DBGMCU_FREEZE_LPTIM4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM4))
  751. #define __HAL_DBGMCU_FREEZE_LPTIM5() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM5))
  752. #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_RTC))
  753. #define __HAL_DBGMCU_FREEZE_IWDG1() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_IWDG1))
  754. #define __HAL_DBGMCU_UnFreeze_WWDG1() (DBGMCU->APB3FZ1 &= ~ (DBGMCU_APB3FZ1_DBG_WWDG1))
  755. #define __HAL_DBGMCU_UnFreeze_TIM2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM2))
  756. #define __HAL_DBGMCU_UnFreeze_TIM3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM3))
  757. #define __HAL_DBGMCU_UnFreeze_TIM4() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM4))
  758. #define __HAL_DBGMCU_UnFreeze_TIM5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM5))
  759. #define __HAL_DBGMCU_UnFreeze_TIM6() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM6))
  760. #define __HAL_DBGMCU_UnFreeze_TIM7() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM7))
  761. #define __HAL_DBGMCU_UnFreeze_TIM12() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM12))
  762. #define __HAL_DBGMCU_UnFreeze_TIM13() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM13))
  763. #define __HAL_DBGMCU_UnFreeze_TIM14() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM14))
  764. #define __HAL_DBGMCU_UnFreeze_LPTIM1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_LPTIM1))
  765. #define __HAL_DBGMCU_UnFreeze_I2C1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1))
  766. #define __HAL_DBGMCU_UnFreeze_I2C2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2))
  767. #define __HAL_DBGMCU_UnFreeze_I2C3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3))
  768. #define __HAL_DBGMCU_UnFreeze_FDCAN() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_FDCAN))
  769. #define __HAL_DBGMCU_UnFreeze_TIM1() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1))
  770. #define __HAL_DBGMCU_UnFreeze_TIM8() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8))
  771. #define __HAL_DBGMCU_UnFreeze_TIM15() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM15))
  772. #define __HAL_DBGMCU_UnFreeze_TIM16() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM16))
  773. #define __HAL_DBGMCU_UnFreeze_TIM17() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM17))
  774. #define __HAL_DBGMCU_UnFreeze_HRTIM() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_HRTIM))
  775. #define __HAL_DBGMCU_UnFreeze_I2C4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_I2C4))
  776. #define __HAL_DBGMCU_UnFreeze_LPTIM2() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM2))
  777. #define __HAL_DBGMCU_UnFreeze_LPTIM3() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM3))
  778. #define __HAL_DBGMCU_UnFreeze_LPTIM4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM4))
  779. #define __HAL_DBGMCU_UnFreeze_LPTIM5() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM5))
  780. #define __HAL_DBGMCU_UnFreeze_RTC() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_RTC))
  781. #define __HAL_DBGMCU_UnFreeze_IWDG1() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_IWDG1))
  782. #if defined(DUAL_CORE)
  783. #define __HAL_DBGMCU_FREEZE2_IWDG2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG2))
  784. #define __HAL_DBGMCU_FREEZE2_WWDG2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_WWDG2))
  785. #define __HAL_DBGMCU_UnFreeze2_IWDG2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG2))
  786. #define __HAL_DBGMCU_UnFreeze2_WWDG2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_WWDG2))
  787. #define __HAL_DBGMCU_FREEZE2_WWDG1() (DBGMCU->APB3FZ2 |= (DBGMCU_APB3FZ2_DBG_WWDG1))
  788. #define __HAL_DBGMCU_FREEZE2_TIM2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM2))
  789. #define __HAL_DBGMCU_FREEZE2_TIM3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM3))
  790. #define __HAL_DBGMCU_FREEZE2_TIM4() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM4))
  791. #define __HAL_DBGMCU_FREEZE2_TIM5() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM5))
  792. #define __HAL_DBGMCU_FREEZE2_TIM6() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM6))
  793. #define __HAL_DBGMCU_FREEZE2_TIM7() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM7))
  794. #define __HAL_DBGMCU_FREEZE2_TIM12() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM12))
  795. #define __HAL_DBGMCU_FREEZE2_TIM13() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM13))
  796. #define __HAL_DBGMCU_FREEZE2_TIM14() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM14))
  797. #define __HAL_DBGMCU_FREEZE2_LPTIM1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_LPTIM1))
  798. #define __HAL_DBGMCU_FREEZE2_I2C1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C1))
  799. #define __HAL_DBGMCU_FREEZE2_I2C2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C2))
  800. #define __HAL_DBGMCU_FREEZE2_I2C3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C3))
  801. #define __HAL_DBGMCU_FREEZE2_FDCAN() (DBGMCU->APB1HFZ2 |= (DBGMCU_APB1HFZ2_DBG_FDCAN))
  802. #define __HAL_DBGMCU_FREEZE2_TIM1() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM1))
  803. #define __HAL_DBGMCU_FREEZE2_TIM8() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM8))
  804. #define __HAL_DBGMCU_FREEZE2_TIM15() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM15))
  805. #define __HAL_DBGMCU_FREEZE2_TIM16() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM16))
  806. #define __HAL_DBGMCU_FREEZE2_TIM17() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM17))
  807. #define __HAL_DBGMCU_FREEZE2_HRTIM() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_HRTIM))
  808. #define __HAL_DBGMCU_FREEZE2_I2C4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_I2C4))
  809. #define __HAL_DBGMCU_FREEZE2_LPTIM2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM2))
  810. #define __HAL_DBGMCU_FREEZE2_LPTIM3() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM3))
  811. #define __HAL_DBGMCU_FREEZE2_LPTIM4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM4))
  812. #define __HAL_DBGMCU_FREEZE2_LPTIM5() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM5))
  813. #define __HAL_DBGMCU_FREEZE2_RTC() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_RTC))
  814. #define __HAL_DBGMCU_FREEZE2_IWDG1() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG1))
  815. #define __HAL_DBGMCU_UnFreeze2_WWDG1() (DBGMCU->APB3FZ2 &= ~ (DBGMCU_APB3FZ2_DBG_WWDG1))
  816. #define __HAL_DBGMCU_UnFreeze2_TIM2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM2))
  817. #define __HAL_DBGMCU_UnFreeze2_TIM3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM3))
  818. #define __HAL_DBGMCU_UnFreeze2_TIM4() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM4))
  819. #define __HAL_DBGMCU_UnFreeze2_TIM5() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM5))
  820. #define __HAL_DBGMCU_UnFreeze2_TIM6() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM6))
  821. #define __HAL_DBGMCU_UnFreeze2_TIM7() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM7))
  822. #define __HAL_DBGMCU_UnFreeze2_TIM12() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM12))
  823. #define __HAL_DBGMCU_UnFreeze2_TIM13() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM13))
  824. #define __HAL_DBGMCU_UnFreeze2_TIM14() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM14))
  825. #define __HAL_DBGMCU_UnFreeze2_LPTIM1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_LPTIM1))
  826. #define __HAL_DBGMCU_UnFreeze2_I2C1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C1))
  827. #define __HAL_DBGMCU_UnFreeze2_I2C2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C2))
  828. #define __HAL_DBGMCU_UnFreeze2_I2C3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C3))
  829. #define __HAL_DBGMCU_UnFreeze2_FDCAN() (DBGMCU->APB1HFZ2 &= ~ (DBGMCU_APB1HFZ2_DBG_FDCAN))
  830. #define __HAL_DBGMCU_UnFreeze2_TIM1() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM1))
  831. #define __HAL_DBGMCU_UnFreeze2_TIM8() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM8))
  832. #define __HAL_DBGMCU_UnFreeze2_TIM15() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM15))
  833. #define __HAL_DBGMCU_UnFreeze2_TIM16() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM16))
  834. #define __HAL_DBGMCU_UnFreeze2_TIM17() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM17))
  835. #define __HAL_DBGMCU_UnFreeze2_HRTIM() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_HRTIM))
  836. #define __HAL_DBGMCU_UnFreeze2_I2C4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_I2C4))
  837. #define __HAL_DBGMCU_UnFreeze2_LPTIM2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM2))
  838. #define __HAL_DBGMCU_UnFreeze2_LPTIM3() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM3))
  839. #define __HAL_DBGMCU_UnFreeze2_LPTIM4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM4))
  840. #define __HAL_DBGMCU_UnFreeze2_LPTIM5() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM5))
  841. #define __HAL_DBGMCU_UnFreeze2_RTC() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_RTC))
  842. #define __HAL_DBGMCU_UnFreeze2_IWDG1() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG1))
  843. #endif /*DUAL_CORE*/
  844. /** @defgroup HAL_Private_Macros HAL Private Macros
  845. * @{
  846. */
  847. #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
  848. ((FREQ) == HAL_TICK_FREQ_100HZ) || \
  849. ((FREQ) == HAL_TICK_FREQ_1KHZ))
  850. /**
  851. * @}
  852. */
  853. /* Exported variables --------------------------------------------------------*/
  854. /** @addtogroup HAL_Exported_Variables
  855. * @{
  856. */
  857. extern __IO uint32_t uwTick;
  858. extern uint32_t uwTickPrio;
  859. extern HAL_TickFreqTypeDef uwTickFreq;
  860. /**
  861. * @}
  862. */
  863. /* Exported functions --------------------------------------------------------*/
  864. /* Initialization and de-initialization functions ******************************/
  865. HAL_StatusTypeDef HAL_Init(void);
  866. HAL_StatusTypeDef HAL_DeInit(void);
  867. void HAL_MspInit(void);
  868. void HAL_MspDeInit(void);
  869. HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
  870. /* Peripheral Control functions ************************************************/
  871. void HAL_IncTick(void);
  872. void HAL_Delay(uint32_t Delay);
  873. uint32_t HAL_GetTick(void);
  874. uint32_t HAL_GetTickPrio(void);
  875. HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
  876. HAL_TickFreqTypeDef HAL_GetTickFreq(void);
  877. void HAL_SuspendTick(void);
  878. void HAL_ResumeTick(void);
  879. uint32_t HAL_GetHalVersion(void);
  880. uint32_t HAL_GetREVID(void);
  881. uint32_t HAL_GetDEVID(void);
  882. uint32_t HAL_GetUIDw0(void);
  883. uint32_t HAL_GetUIDw1(void);
  884. uint32_t HAL_GetUIDw2(void);
  885. #if defined(SYSCFG_PMCR_EPIS_SEL)
  886. void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface);
  887. #endif /* SYSCFG_PMCR_EPIS_SEL */
  888. void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState );
  889. #if defined(SYSCFG_PMCR_BOOSTEN)
  890. void HAL_SYSCFG_EnableBOOST(void);
  891. void HAL_SYSCFG_DisableBOOST(void);
  892. #endif /* SYSCFG_PMCR_BOOSTEN */
  893. #if defined (SYSCFG_UR2_BOOT_ADD0) || defined (SYSCFG_UR2_BCM7_ADD0)
  894. void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
  895. #endif /* SYSCFG_UR2_BOOT_ADD0 || SYSCFG_UR2_BCM7_ADD0*/
  896. #if defined(DUAL_CORE)
  897. void HAL_SYSCFG_CM4BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
  898. void HAL_SYSCFG_EnableCM7BOOT(void);
  899. void HAL_SYSCFG_DisableCM7BOOT(void);
  900. void HAL_SYSCFG_EnableCM4BOOT(void);
  901. void HAL_SYSCFG_DisableCM4BOOT(void);
  902. #endif /*DUAL_CORE*/
  903. void HAL_EnableCompensationCell(void);
  904. void HAL_DisableCompensationCell(void);
  905. void HAL_SYSCFG_EnableIOSpeedOptimize(void);
  906. void HAL_SYSCFG_DisableIOSpeedOptimize(void);
  907. void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode);
  908. void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
  909. #if defined(SYSCFG_CCCR_NCC_MMC)
  910. void HAL_SYSCFG_VDDMMC_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
  911. #endif /* SYSCFG_CCCR_NCC_MMC */
  912. void HAL_EnableDBGSleepMode(void);
  913. void HAL_DisableDBGSleepMode(void);
  914. void HAL_EnableDBGStopMode(void);
  915. void HAL_DisableDBGStopMode(void);
  916. void HAL_EnableDBGStandbyMode(void);
  917. void HAL_DisableDBGStandbyMode(void);
  918. #if defined(DUAL_CORE)
  919. void HAL_EnableDomain2DBGSleepMode(void);
  920. void HAL_DisableDomain2DBGSleepMode(void);
  921. void HAL_EnableDomain2DBGStopMode(void);
  922. void HAL_DisableDomain2DBGStopMode(void);
  923. void HAL_EnableDomain2DBGStandbyMode(void);
  924. void HAL_DisableDomain2DBGStandbyMode(void);
  925. #endif /*DUAL_CORE*/
  926. void HAL_EnableDomain3DBGStopMode(void);
  927. void HAL_DisableDomain3DBGStopMode(void);
  928. void HAL_EnableDomain3DBGStandbyMode(void);
  929. void HAL_DisableDomain3DBGStandbyMode(void);
  930. void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line , uint32_t EXTI_Edge );
  931. void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
  932. #if defined(DUAL_CORE)
  933. void HAL_EXTI_D2_ClearFlag(uint32_t EXTI_Line);
  934. #endif /*DUAL_CORE*/
  935. void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line);
  936. void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
  937. #if defined(DUAL_CORE)
  938. void HAL_EXTI_D2_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
  939. #endif /*DUAL_CORE*/
  940. void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd , uint32_t EXTI_ClearSrc);
  941. void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig);
  942. uint32_t HAL_GetFMCMemorySwappingConfig(void);
  943. void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling);
  944. void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode);
  945. void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue);
  946. HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void);
  947. void HAL_SYSCFG_DisableVREFBUF(void);
  948. /**
  949. * @}
  950. */
  951. /**
  952. * @}
  953. */
  954. #ifdef __cplusplus
  955. }
  956. #endif
  957. #endif /* STM32H7xx_HAL_H */
  958. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/