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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_mmc.h
  4. * @author MCD Application Team
  5. * @brief Header file of MMC HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32H7xx_HAL_MMC_H
  21. #define STM32H7xx_HAL_MMC_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32h7xx_ll_sdmmc.h"
  27. /** @addtogroup STM32H7xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup MMC
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup MMC_Exported_Types MMC Exported Types
  35. * @{
  36. */
  37. /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
  38. * @{
  39. */
  40. typedef enum
  41. {
  42. HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
  43. HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
  44. HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
  45. HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
  46. HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
  47. HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
  48. HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */
  49. HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
  50. }HAL_MMC_StateTypeDef;
  51. /**
  52. * @}
  53. */
  54. /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
  55. * @{
  56. */
  57. typedef uint32_t HAL_MMC_CardStateTypeDef;
  58. #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */
  59. #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */
  60. #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */
  61. #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */
  62. #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */
  63. #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */
  64. #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */
  65. #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */
  66. #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */
  67. /**
  68. * @}
  69. */
  70. /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
  71. * @{
  72. */
  73. #define MMC_InitTypeDef SDMMC_InitTypeDef
  74. #define MMC_TypeDef SDMMC_TypeDef
  75. /**
  76. * @brief MMC Card Information Structure definition
  77. */
  78. typedef struct
  79. {
  80. uint32_t CardType; /*!< Specifies the card Type */
  81. uint32_t Class; /*!< Specifies the class of the card class */
  82. uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
  83. uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
  84. uint32_t BlockSize; /*!< Specifies one block size in bytes */
  85. uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
  86. uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
  87. }HAL_MMC_CardInfoTypeDef;
  88. /**
  89. * @brief MMC handle Structure definition
  90. */
  91. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  92. typedef struct __MMC_HandleTypeDef
  93. #else
  94. typedef struct
  95. #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
  96. {
  97. MMC_TypeDef *Instance; /*!< MMC registers base address */
  98. MMC_InitTypeDef Init; /*!< MMC required parameters */
  99. HAL_LockTypeDef Lock; /*!< MMC locking object */
  100. uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
  101. uint32_t TxXferSize; /*!< MMC Tx Transfer size */
  102. uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
  103. uint32_t RxXferSize; /*!< MMC Rx Transfer size */
  104. __IO uint32_t Context; /*!< MMC transfer context */
  105. __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
  106. __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
  107. HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
  108. uint32_t CSD[4U]; /*!< MMC card specific data table */
  109. uint32_t CID[4U]; /*!< MMC card identification number table */
  110. uint32_t Ext_CSD[128];
  111. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  112. void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  113. void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  114. void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc);
  115. void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  116. void (* Read_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  117. void (* Read_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  118. void (* Write_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  119. void (* Write_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc);
  120. void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc);
  121. void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc);
  122. #endif
  123. }MMC_HandleTypeDef;
  124. /**
  125. * @}
  126. */
  127. /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
  128. * @{
  129. */
  130. typedef struct
  131. {
  132. __IO uint8_t CSDStruct; /*!< CSD structure */
  133. __IO uint8_t SysSpecVersion; /*!< System specification version */
  134. __IO uint8_t Reserved1; /*!< Reserved */
  135. __IO uint8_t TAAC; /*!< Data read access time 1 */
  136. __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
  137. __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
  138. __IO uint16_t CardComdClasses; /*!< Card command classes */
  139. __IO uint8_t RdBlockLen; /*!< Max. read data block length */
  140. __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
  141. __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
  142. __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
  143. __IO uint8_t DSRImpl; /*!< DSR implemented */
  144. __IO uint8_t Reserved2; /*!< Reserved */
  145. __IO uint32_t DeviceSize; /*!< Device Size */
  146. __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
  147. __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
  148. __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
  149. __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
  150. __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
  151. __IO uint8_t EraseGrSize; /*!< Erase group size */
  152. __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
  153. __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
  154. __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
  155. __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
  156. __IO uint8_t WrSpeedFact; /*!< Write speed factor */
  157. __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
  158. __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
  159. __IO uint8_t Reserved3; /*!< Reserved */
  160. __IO uint8_t ContentProtectAppli; /*!< Content protection application */
  161. __IO uint8_t FileFormatGroup; /*!< File format group */
  162. __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
  163. __IO uint8_t PermWrProtect; /*!< Permanent write protection */
  164. __IO uint8_t TempWrProtect; /*!< Temporary write protection */
  165. __IO uint8_t FileFormat; /*!< File format */
  166. __IO uint8_t ECC; /*!< ECC code */
  167. __IO uint8_t CSD_CRC; /*!< CSD CRC */
  168. __IO uint8_t Reserved4; /*!< Always 1 */
  169. }HAL_MMC_CardCSDTypeDef;
  170. /**
  171. * @}
  172. */
  173. /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
  174. * @{
  175. */
  176. typedef struct
  177. {
  178. __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
  179. __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
  180. __IO uint32_t ProdName1; /*!< Product Name part1 */
  181. __IO uint8_t ProdName2; /*!< Product Name part2 */
  182. __IO uint8_t ProdRev; /*!< Product Revision */
  183. __IO uint32_t ProdSN; /*!< Product Serial Number */
  184. __IO uint8_t Reserved1; /*!< Reserved1 */
  185. __IO uint16_t ManufactDate; /*!< Manufacturing Date */
  186. __IO uint8_t CID_CRC; /*!< CID CRC */
  187. __IO uint8_t Reserved2; /*!< Always 1 */
  188. }HAL_MMC_CardCIDTypeDef;
  189. /**
  190. * @}
  191. */
  192. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  193. /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
  194. * @{
  195. */
  196. typedef enum
  197. {
  198. HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */
  199. HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */
  200. HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */
  201. HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */
  202. HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */
  203. HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */
  204. HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */
  205. HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */
  206. HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */
  207. HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */
  208. }HAL_MMC_CallbackIDTypeDef;
  209. /**
  210. * @}
  211. */
  212. /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
  213. * @{
  214. */
  215. typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc);
  216. /**
  217. * @}
  218. */
  219. #endif
  220. /**
  221. * @}
  222. */
  223. /* Exported constants --------------------------------------------------------*/
  224. /** @defgroup MMC_Exported_Constants Exported Constants
  225. * @{
  226. */
  227. #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
  228. /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
  229. * @{
  230. */
  231. #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
  232. #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
  233. #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
  234. #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
  235. #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
  236. #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
  237. #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
  238. #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
  239. #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
  240. number of transferred bytes does not match the block length */
  241. #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
  242. #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
  243. #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
  244. #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
  245. command or if there was an attempt to access a locked card */
  246. #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
  247. #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
  248. #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
  249. #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
  250. #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
  251. #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
  252. #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
  253. #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
  254. #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
  255. #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
  256. #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
  257. of erase sequence command was received */
  258. #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
  259. #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
  260. #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
  261. #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
  262. #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
  263. #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
  264. #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
  265. #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
  266. #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
  267. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  268. #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
  269. #endif
  270. /**
  271. * @}
  272. */
  273. /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
  274. * @{
  275. */
  276. #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
  277. #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
  278. #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
  279. #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
  280. #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
  281. #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
  282. #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
  283. /**
  284. * @}
  285. */
  286. /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
  287. * @{
  288. */
  289. /**
  290. * @brief
  291. */
  292. #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */
  293. #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */
  294. #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */
  295. #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */
  296. #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
  297. /**
  298. * @}
  299. */
  300. /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
  301. * @{
  302. */
  303. #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */
  304. #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */
  305. /**
  306. * @}
  307. */
  308. /**
  309. * @}
  310. */
  311. /* Exported macro ------------------------------------------------------------*/
  312. /** @defgroup MMC_Exported_macros MMC Exported Macros
  313. * @brief macros to handle interrupts and specific clock configurations
  314. * @{
  315. */
  316. /** @brief Reset MMC handle state.
  317. * @param __HANDLE__ MMC Handle.
  318. * @retval None
  319. */
  320. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  321. #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \
  322. (__HANDLE__)->State = HAL_MMC_STATE_RESET; \
  323. (__HANDLE__)->MspInitCallback = NULL; \
  324. (__HANDLE__)->MspDeInitCallback = NULL; \
  325. } while(0)
  326. #else
  327. #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
  328. #endif
  329. /**
  330. * @brief Enable the MMC device interrupt.
  331. * @param __HANDLE__ MMC Handle.
  332. * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
  333. * This parameter can be one or a combination of the following values:
  334. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  335. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  336. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  337. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  338. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  339. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  340. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  341. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  342. * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
  343. * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
  344. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  345. * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
  346. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  347. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  348. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  349. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  350. * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
  351. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  352. * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
  353. * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
  354. * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
  355. * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
  356. * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
  357. * @retval None
  358. */
  359. #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  360. /**
  361. * @brief Disable the MMC device interrupt.
  362. * @param __HANDLE__ MMC Handle.
  363. * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
  364. * This parameter can be one or a combination of the following values:
  365. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  366. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  367. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  368. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  369. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  370. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  371. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  372. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  373. * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
  374. * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
  375. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  376. * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
  377. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  378. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  379. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  380. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  381. * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
  382. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  383. * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
  384. * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
  385. * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
  386. * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
  387. * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
  388. * @retval None
  389. */
  390. #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  391. /**
  392. * @brief Check whether the specified MMC flag is set or not.
  393. * @param __HANDLE__ MMC Handle.
  394. * @param __FLAG__ specifies the flag to check.
  395. * This parameter can be one of the following values:
  396. * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
  397. * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
  398. * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
  399. * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
  400. * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
  401. * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
  402. * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
  403. * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
  404. * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
  405. * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
  406. * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
  407. * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
  408. * @arg SDMMC_FLAG_DPSMACT: Data path state machine active
  409. * @arg SDMMC_FLAG_CPSMACT: Command path state machine active
  410. * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
  411. * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
  412. * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
  413. * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
  414. * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
  415. * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
  416. * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
  417. * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
  418. * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
  419. * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
  420. * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
  421. * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
  422. * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
  423. * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
  424. * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
  425. * @retval The new state of MMC FLAG (SET or RESET).
  426. */
  427. #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
  428. /**
  429. * @brief Clear the MMC's pending flags.
  430. * @param __HANDLE__ MMC Handle.
  431. * @param __FLAG__ specifies the flag to clear.
  432. * This parameter can be one or a combination of the following values:
  433. * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
  434. * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
  435. * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
  436. * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
  437. * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
  438. * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
  439. * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
  440. * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
  441. * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
  442. * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
  443. * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
  444. * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
  445. * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
  446. * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
  447. * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
  448. * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
  449. * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
  450. * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
  451. * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
  452. * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
  453. * @retval None
  454. */
  455. #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
  456. /**
  457. * @brief Check whether the specified MMC interrupt has occurred or not.
  458. * @param __HANDLE__ MMC Handle.
  459. * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
  460. * This parameter can be one of the following values:
  461. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  462. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  463. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  464. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  465. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  466. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  467. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  468. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  469. * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
  470. * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
  471. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  472. * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
  473. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  474. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  475. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  476. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  477. * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
  478. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  479. * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
  480. * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
  481. * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
  482. * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
  483. * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
  484. * @retval The new state of MMC IT (SET or RESET).
  485. */
  486. #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  487. /**
  488. * @brief Clear the MMC's interrupt pending bits.
  489. * @param __HANDLE__ MMC Handle.
  490. * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
  491. * This parameter can be one or a combination of the following values:
  492. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  493. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  494. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  495. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  496. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  497. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  498. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  499. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  500. * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
  501. * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
  502. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  503. * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
  504. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  505. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  506. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  507. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  508. * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
  509. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  510. * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
  511. * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
  512. * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
  513. * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
  514. * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
  515. * @retval None
  516. */
  517. #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  518. /**
  519. * @}
  520. */
  521. /* Include MMC HAL Extension module */
  522. #include "stm32h7xx_hal_mmc_ex.h"
  523. /* Exported functions --------------------------------------------------------*/
  524. /** @defgroup MMC_Exported_Functions MMC Exported Functions
  525. * @{
  526. */
  527. /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
  528. * @{
  529. */
  530. HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
  531. HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
  532. HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
  533. void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
  534. void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
  535. /**
  536. * @}
  537. */
  538. /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
  539. * @{
  540. */
  541. /* Blocking mode: Polling */
  542. HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
  543. HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
  544. HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
  545. /* Non-Blocking mode: IT */
  546. HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  547. HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  548. /* Non-Blocking mode: DMA */
  549. HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  550. HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  551. void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
  552. /* Callback in non blocking modes (DMA) */
  553. void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
  554. void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
  555. void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
  556. void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
  557. #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
  558. /* MMC callback registering/unregistering */
  559. HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback);
  560. HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
  561. #endif
  562. /**
  563. * @}
  564. */
  565. /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
  566. * @{
  567. */
  568. HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
  569. HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode);
  570. /**
  571. * @}
  572. */
  573. /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
  574. * @{
  575. */
  576. HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
  577. HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
  578. HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
  579. HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
  580. /**
  581. * @}
  582. */
  583. /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
  584. * @{
  585. */
  586. HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
  587. uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
  588. /**
  589. * @}
  590. */
  591. /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
  592. * @{
  593. */
  594. HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
  595. HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
  596. /**
  597. * @}
  598. */
  599. /* Private types -------------------------------------------------------------*/
  600. /** @defgroup MMC_Private_Types MMC Private Types
  601. * @{
  602. */
  603. /**
  604. * @}
  605. */
  606. /* Private defines -----------------------------------------------------------*/
  607. /** @defgroup MMC_Private_Defines MMC Private Defines
  608. * @{
  609. */
  610. /**
  611. * @}
  612. */
  613. /* Private variables ---------------------------------------------------------*/
  614. /** @defgroup MMC_Private_Variables MMC Private Variables
  615. * @{
  616. */
  617. /**
  618. * @}
  619. */
  620. /* Private constants ---------------------------------------------------------*/
  621. /** @defgroup MMC_Private_Constants MMC Private Constants
  622. * @{
  623. */
  624. /**
  625. * @}
  626. */
  627. /* Private macros ------------------------------------------------------------*/
  628. /** @defgroup MMC_Private_Macros MMC Private Macros
  629. * @{
  630. */
  631. /**
  632. * @}
  633. */
  634. /* Private functions prototypes ----------------------------------------------*/
  635. /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
  636. * @{
  637. */
  638. /**
  639. * @}
  640. */
  641. /* Private functions ---------------------------------------------------------*/
  642. /** @defgroup MMC_Private_Functions MMC Private Functions
  643. * @{
  644. */
  645. /**
  646. * @}
  647. */
  648. /**
  649. * @}
  650. */
  651. /**
  652. * @}
  653. */
  654. /**
  655. * @}
  656. */
  657. #ifdef __cplusplus
  658. }
  659. #endif
  660. #endif /* STM32H7xx_HAL_MMC_H */
  661. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/