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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_tim_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of TIM HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32H7xx_HAL_TIM_EX_H
  21. #define STM32H7xx_HAL_TIM_EX_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32h7xx_hal_def.h"
  27. /** @addtogroup STM32H7xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup TIMEx
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief TIM Hall sensor Configuration Structure definition
  39. */
  40. typedef struct
  41. {
  42. uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
  43. This parameter can be a value of @ref TIM_Input_Capture_Polarity */
  44. uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
  45. This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
  46. uint32_t IC1Filter; /*!< Specifies the input capture filter.
  47. This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
  48. uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
  49. This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  50. } TIM_HallSensor_InitTypeDef;
  51. #if defined(TIM_BREAK_INPUT_SUPPORT)
  52. /**
  53. * @brief TIM Break/Break2 input configuration
  54. */
  55. typedef struct
  56. {
  57. uint32_t Source; /*!< Specifies the source of the timer break input.
  58. This parameter can be a value of @ref TIMEx_Break_Input_Source */
  59. uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
  60. This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
  61. uint32_t Polarity; /*!< Specifies the break input source polarity.
  62. This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
  63. Not relevant when analog watchdog output of the DFSDM1 used as break input source */
  64. }
  65. TIMEx_BreakInputConfigTypeDef;
  66. #endif /* TIM_BREAK_INPUT_SUPPORT */
  67. /**
  68. * @}
  69. */
  70. /* End of exported types -----------------------------------------------------*/
  71. /* Exported constants --------------------------------------------------------*/
  72. /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
  73. * @{
  74. */
  75. /** @defgroup TIMEx_Remap TIM Extended Remapping
  76. * @{
  77. */
  78. #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */
  79. #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */
  80. #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */
  81. #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
  82. #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */
  83. #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
  84. #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */
  85. #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */
  86. #define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */
  87. #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */
  88. #define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */
  89. #define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */
  90. #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
  91. #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC2 AWD2 */
  92. #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
  93. #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */
  94. #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */
  95. #define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */
  96. #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */
  97. #define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */
  98. #define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */
  99. #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */
  100. #define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */
  101. #define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */
  102. #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */
  103. #define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */
  104. #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */
  105. #define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */
  106. #define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */
  107. #define TIM_TIM5_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI4 FS_A */
  108. #define TIM_TIM5_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI4 FS_B */
  109. #define TIM_TIM23_ETR_GPIO 0x00000000U /* !< TIM23_ETR is connected to GPIO */
  110. #define TIM_TIM23_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM23_ETR is connected to COMP1 OUT */
  111. #define TIM_TIM23_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM23_ETR is connected to COMP2 OUT */
  112. #define TIM_TIM24_ETR_GPIO 0x00000000U /* !< TIM24_ETR is connected to GPIO */
  113. #define TIM_TIM24_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM24_ETR is connected to SAI4 FS_A */
  114. #define TIM_TIM24_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM24_ETR is connected to SAI4 FS_B */
  115. #define TIM_TIM24_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM24_ETR is connected to SAI1 FS_A */
  116. #define TIM_TIM24_ETR_SAI1_FSB TIM2_AF1_ETRSEL_2 /* !< TIM24_ETR is connected to SAI1 FS_B */
  117. /**
  118. * @}
  119. */
  120. #if defined(TIM_BREAK_INPUT_SUPPORT)
  121. /** @defgroup TIMEx_Break_Input TIM Extended Break input
  122. * @{
  123. */
  124. #define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */
  125. #define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */
  126. /**
  127. * @}
  128. */
  129. /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
  130. * @{
  131. */
  132. #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
  133. #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
  134. #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
  135. #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
  136. /**
  137. * @}
  138. */
  139. /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
  140. * @{
  141. */
  142. #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */
  143. #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */
  144. /**
  145. * @}
  146. */
  147. /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
  148. * @{
  149. */
  150. #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */
  151. #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */
  152. /**
  153. * @}
  154. */
  155. #endif /* TIM_BREAK_INPUT_SUPPORT */
  156. /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
  157. * @{
  158. */
  159. #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1_TI1 is connected to GPIO */
  160. #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */
  161. #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8_TI1 is connected to GPIO */
  162. #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */
  163. #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2_TI4 is connected to GPIO */
  164. #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */
  165. #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */
  166. #define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
  167. #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3_TI1 is connected to GPIO */
  168. #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */
  169. #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */
  170. #define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */
  171. #define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */
  172. #define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */
  173. #define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */
  174. #define TIM_TIM12_TI1_GPIO 0x00000000U /* !< TIM12 TI1 is connected to GPIO */
  175. #define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM12 TI1 is connected to SPDIF FS */
  176. #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */
  177. #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */
  178. #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */
  179. #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */
  180. #define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2) /* !< TIM15_TI1 is connected to RCC LSE */
  181. #define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */
  182. #define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */
  183. #define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */
  184. #define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */
  185. #define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */
  186. #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */
  187. #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */
  188. #define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */
  189. #define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */
  190. #define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */
  191. #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */
  192. #define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */
  193. #define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE 1Mhz */
  194. #define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */
  195. #define TIM_TIM23_TI4_GPIO 0x00000000U /* !< TIM23_TI4 is connected to GPIO */
  196. #define TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM23_TI4 is connected to COMP1 OUT */
  197. #define TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM23_TI4 is connected to COMP2 OUT */
  198. #define TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */
  199. #define TIM_TIM24_TI1_GPIO 0x00000000U /* !< TIM24_TI1 is connected to GPIO */
  200. #define TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM24_TI1 is connected to CAN TMP */
  201. #define TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM24_TI1 is connected to CAN RTP */
  202. #define TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM24_TI1 is connected to CAN SOC */
  203. /**
  204. * @}
  205. */
  206. /**
  207. * @}
  208. */
  209. /* End of exported constants -------------------------------------------------*/
  210. /* Exported macro ------------------------------------------------------------*/
  211. /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
  212. * @{
  213. */
  214. /**
  215. * @}
  216. */
  217. /* End of exported macro -----------------------------------------------------*/
  218. /* Private macro -------------------------------------------------------------*/
  219. /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
  220. * @{
  221. */
  222. #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
  223. ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
  224. #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
  225. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
  226. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
  227. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
  228. #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
  229. ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
  230. #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
  231. ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
  232. #define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) ||\
  233. ((__TISEL__) == TIM_TIM1_TI1_COMP1) ||\
  234. ((__TISEL__) == TIM_TIM8_TI1_GPIO) ||\
  235. ((__TISEL__) == TIM_TIM8_TI1_COMP2) ||\
  236. ((__TISEL__) == TIM_TIM2_TI4_GPIO) ||\
  237. ((__TISEL__) == TIM_TIM2_TI4_COMP1) ||\
  238. ((__TISEL__) == TIM_TIM2_TI4_COMP2) ||\
  239. ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) ||\
  240. ((__TISEL__) == TIM_TIM3_TI1_GPIO) ||\
  241. ((__TISEL__) == TIM_TIM3_TI1_COMP1) ||\
  242. ((__TISEL__) == TIM_TIM3_TI1_COMP2) ||\
  243. ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) ||\
  244. ((__TISEL__) == TIM_TIM5_TI1_GPIO) ||\
  245. ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) ||\
  246. ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) ||\
  247. ((__TISEL__) == TIM_TIM12_TI1_SPDIF_FS) ||\
  248. ((__TISEL__) == TIM_TIM12_TI1_GPIO) ||\
  249. ((__TISEL__) == TIM_TIM15_TI1_GPIO) ||\
  250. ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) ||\
  251. ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) ||\
  252. ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) ||\
  253. ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) ||\
  254. ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) ||\
  255. ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) ||\
  256. ((__TISEL__) == TIM_TIM15_TI2_GPIO) ||\
  257. ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) ||\
  258. ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) ||\
  259. ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) ||\
  260. ((__TISEL__) == TIM_TIM16_TI1_GPIO) ||\
  261. ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) ||\
  262. ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) ||\
  263. ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) ||\
  264. ((__TISEL__) == TIM_TIM17_TI1_GPIO) ||\
  265. ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) ||\
  266. ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\
  267. ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1) ||\
  268. ((__TISEL__) == TIM_TIM23_TI4_GPIO) ||\
  269. ((__TISEL__) == TIM_TIM23_TI4_COMP1) ||\
  270. ((__TISEL__) == TIM_TIM23_TI4_COMP2) ||\
  271. ((__TISEL__) == TIM_TIM23_TI4_COMP1_COMP2) ||\
  272. ((__TISEL__) == TIM_TIM24_TI1_GPIO) ||\
  273. ((__TISEL__) == TIM_TIM24_TI1_CAN_TMP) ||\
  274. ((__TISEL__) == TIM_TIM24_TI1_CAN_RTP) ||\
  275. ((__TISEL__) == TIM_TIM24_TI1_CAN_SOC))
  276. #define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) ||\
  277. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) ||\
  278. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) ||\
  279. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) ||\
  280. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\
  281. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\
  282. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\
  283. ((__RREMAP__) == TIM_TIM1_ETR_COMP1) ||\
  284. ((__RREMAP__) == TIM_TIM1_ETR_COMP2) ||\
  285. ((__RREMAP__) == TIM_TIM8_ETR_GPIO) ||\
  286. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\
  287. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\
  288. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\
  289. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\
  290. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\
  291. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\
  292. ((__RREMAP__) == TIM_TIM8_ETR_COMP1) ||\
  293. ((__RREMAP__) == TIM_TIM8_ETR_COMP2) ||\
  294. ((__RREMAP__) == TIM_TIM2_ETR_GPIO) ||\
  295. ((__RREMAP__) == TIM_TIM2_ETR_COMP1) ||\
  296. ((__RREMAP__) == TIM_TIM2_ETR_COMP2) ||\
  297. ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) ||\
  298. ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) ||\
  299. ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) ||\
  300. ((__RREMAP__) == TIM_TIM3_ETR_GPIO) ||\
  301. ((__RREMAP__) == TIM_TIM3_ETR_COMP1) ||\
  302. ((__RREMAP__) == TIM_TIM5_ETR_GPIO) ||\
  303. ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) ||\
  304. ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB) ||\
  305. ((__RREMAP__) == TIM_TIM23_ETR_GPIO) ||\
  306. ((__RREMAP__) == TIM_TIM23_ETR_COMP1) ||\
  307. ((__RREMAP__) == TIM_TIM23_ETR_COMP2) ||\
  308. ((__RREMAP__) == TIM_TIM24_ETR_GPIO) ||\
  309. ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSA) ||\
  310. ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSB) ||\
  311. ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSA) ||\
  312. ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSB))
  313. /**
  314. * @}
  315. */
  316. /* End of private macro ------------------------------------------------------*/
  317. /* Exported functions --------------------------------------------------------*/
  318. /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
  319. * @{
  320. */
  321. /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  322. * @brief Timer Hall Sensor functions
  323. * @{
  324. */
  325. /* Timer Hall Sensor functions **********************************************/
  326. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
  327. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
  328. void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
  329. void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
  330. /* Blocking mode: Polling */
  331. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
  332. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
  333. /* Non-Blocking mode: Interrupt */
  334. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
  335. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
  336. /* Non-Blocking mode: DMA */
  337. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
  338. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
  339. /**
  340. * @}
  341. */
  342. /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  343. * @brief Timer Complementary Output Compare functions
  344. * @{
  345. */
  346. /* Timer Complementary Output Compare functions *****************************/
  347. /* Blocking mode: Polling */
  348. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
  349. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
  350. /* Non-Blocking mode: Interrupt */
  351. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  352. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  353. /* Non-Blocking mode: DMA */
  354. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
  355. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
  356. /**
  357. * @}
  358. */
  359. /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  360. * @brief Timer Complementary PWM functions
  361. * @{
  362. */
  363. /* Timer Complementary PWM functions ****************************************/
  364. /* Blocking mode: Polling */
  365. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
  366. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
  367. /* Non-Blocking mode: Interrupt */
  368. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  369. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  370. /* Non-Blocking mode: DMA */
  371. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
  372. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
  373. /**
  374. * @}
  375. */
  376. /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  377. * @brief Timer Complementary One Pulse functions
  378. * @{
  379. */
  380. /* Timer Complementary One Pulse functions **********************************/
  381. /* Blocking mode: Polling */
  382. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  383. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  384. /* Non-Blocking mode: Interrupt */
  385. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  386. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  387. /**
  388. * @}
  389. */
  390. /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  391. * @brief Peripheral Control functions
  392. * @{
  393. */
  394. /* Extended Control functions ************************************************/
  395. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  396. uint32_t CommutationSource);
  397. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  398. uint32_t CommutationSource);
  399. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  400. uint32_t CommutationSource);
  401. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  402. TIM_MasterConfigTypeDef *sMasterConfig);
  403. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  404. TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
  405. #if defined(TIM_BREAK_INPUT_SUPPORT)
  406. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
  407. TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
  408. #endif /* TIM_BREAK_INPUT_SUPPORT */
  409. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
  410. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
  411. HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
  412. /**
  413. * @}
  414. */
  415. /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  416. * @brief Extended Callbacks functions
  417. * @{
  418. */
  419. /* Extended Callback **********************************************************/
  420. void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
  421. void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
  422. void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
  423. void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
  424. /**
  425. * @}
  426. */
  427. /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  428. * @brief Extended Peripheral State functions
  429. * @{
  430. */
  431. /* Extended Peripheral State functions ***************************************/
  432. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
  433. /**
  434. * @}
  435. */
  436. /**
  437. * @}
  438. */
  439. /* End of exported functions -------------------------------------------------*/
  440. /* Private functions----------------------------------------------------------*/
  441. /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions
  442. * @{
  443. */
  444. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
  445. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
  446. /**
  447. * @}
  448. */
  449. /* End of private functions --------------------------------------------------*/
  450. /**
  451. * @}
  452. */
  453. /**
  454. * @}
  455. */
  456. #ifdef __cplusplus
  457. }
  458. #endif
  459. #endif /* STM32H7xx_HAL_TIM_EX_H */
  460. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/