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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_i2s.c
  4. * @author MCD Application Team
  5. * @brief I2S HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Integrated Interchip Sound (I2S) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State and Errors functions
  11. @verbatim
  12. ===============================================================================
  13. ##### How to use this driver #####
  14. ===============================================================================
  15. [..]
  16. The I2S HAL driver can be used as follow:
  17. (#) Declare a I2S_HandleTypeDef handle structure.
  18. (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
  19. (##) Enable the SPIx interface clock.
  20. (##) I2S pins configuration:
  21. (+++) Enable the clock for the I2S GPIOs.
  22. (+++) Configure these I2S pins as alternate function pull-up.
  23. (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
  24. and HAL_I2S_Receive_IT() APIs).
  25. (+++) Configure the I2Sx interrupt priority.
  26. (+++) Enable the NVIC I2S IRQ handle.
  27. (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
  28. and HAL_I2S_Receive_DMA() APIs:
  29. (+++) Declare a DMA handle structure for the Tx/Rx Stream/Channel.
  30. (+++) Enable the DMAx interface clock.
  31. (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
  32. (+++) Configure the DMA Tx/Rx Stream/Channel.
  33. (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
  34. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  35. DMA Tx/Rx Stream/Channel.
  36. (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
  37. using HAL_I2S_Init() function.
  38. -@- The specific I2S interrupts (Transmission complete interrupt,
  39. RXNE interrupt and Error Interrupts) will be managed using the macros
  40. __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
  41. (+@) External clock source is configured after setting correctly
  42. the define constant EXTERNAL_CLOCK_VALUE in the stm32h7xx_hal_conf.h file.
  43. (#) Three mode of operations are available within this driver :
  44. *** Polling mode IO operation ***
  45. =================================
  46. [..]
  47. (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
  48. (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
  49. *** Interrupt mode IO operation ***
  50. ===================================
  51. [..]
  52. (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
  53. (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  54. add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  55. (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  56. add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  57. (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
  58. (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  59. add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  60. (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  61. add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  62. (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  63. add his own code by customization of function pointer HAL_I2S_ErrorCallback
  64. *** DMA mode IO operation ***
  65. ==============================
  66. [..]
  67. (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
  68. (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  69. add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  70. (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  71. add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  72. (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
  73. (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  74. add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  75. (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  76. add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  77. (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  78. add his own code by customization of function pointer HAL_I2S_ErrorCallback
  79. (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
  80. (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
  81. (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
  82. *** I2S HAL driver macros list ***
  83. ===================================
  84. [..]
  85. Below the list of most used macros in I2S HAL driver.
  86. (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
  87. (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
  88. (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
  89. (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
  90. (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
  91. [..]
  92. (@) You can refer to the I2S HAL driver header file for more useful macros
  93. *** I2S HAL driver macros list ***
  94. ===================================
  95. [..]
  96. Callback registration:
  97. (#) The compilation flag USE_HAL_I2S_REGISTER_CALLBACKS when set to 1UL
  98. allows the user to configure dynamically the driver callbacks.
  99. Use Functions HAL_I2S_RegisterCallback() to register an interrupt callback.
  100. Function HAL_I2S_RegisterCallback() allows to register following callbacks:
  101. (+) TxCpltCallback : I2S Tx Completed callback
  102. (+) RxCpltCallback : I2S Rx Completed callback
  103. (+) TxHalfCpltCallback : I2S Tx Half Completed callback
  104. (+) RxHalfCpltCallback : I2S Rx Half Completed callback
  105. (+) ErrorCallback : I2S Error callback
  106. (+) MspInitCallback : I2S Msp Init callback
  107. (+) MspDeInitCallback : I2S Msp DeInit callback
  108. This function takes as parameters the HAL peripheral handle, the Callback ID
  109. and a pointer to the user callback function.
  110. (#) Use function HAL_I2S_UnRegisterCallback to reset a callback to the default
  111. weak function.
  112. HAL_I2S_UnRegisterCallback takes as parameters the HAL peripheral handle,
  113. and the Callback ID.
  114. This function allows to reset following callbacks:
  115. (+) TxCpltCallback : I2S Tx Completed callback
  116. (+) RxCpltCallback : I2S Rx Completed callback
  117. (+) TxHalfCpltCallback : I2S Tx Half Completed callback
  118. (+) RxHalfCpltCallback : I2S Rx Half Completed callback
  119. (+) ErrorCallback : I2S Error callback
  120. (+) MspInitCallback : I2S Msp Init callback
  121. (+) MspDeInitCallback : I2S Msp DeInit callback
  122. By default, after the HAL_I2S_Init() and when the state is HAL_I2S_STATE_RESET
  123. all callbacks are set to the corresponding weak functions:
  124. examples HAL_I2S_MasterTxCpltCallback(), HAL_I2S_MasterRxCpltCallback().
  125. Exception done for MspInit and MspDeInit functions that are
  126. reset to the legacy weak functions in the HAL_I2S_Init()/ HAL_I2S_DeInit() only when
  127. these callbacks are null (not registered beforehand).
  128. If MspInit or MspDeInit are not null, the HAL_I2S_Init()/ HAL_I2S_DeInit()
  129. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  130. Callbacks can be registered/unregistered in HAL_I2S_STATE_READY state only.
  131. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  132. in HAL_I2S_STATE_READY or HAL_I2S_STATE_RESET state,
  133. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  134. Then, the user first registers the MspInit/MspDeInit user callbacks
  135. using HAL_I2S_RegisterCallback() before calling HAL_I2S_DeInit()
  136. or HAL_I2S_Init() function.
  137. When The compilation define USE_HAL_I2S_REGISTER_CALLBACKS is set to 0 or
  138. not defined, the callback registering feature is not available
  139. and weak (surcharged) callbacks are used.
  140. @endverbatim
  141. ******************************************************************************
  142. * @attention
  143. *
  144. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  145. * All rights reserved.</center></h2>
  146. *
  147. * This software component is licensed by ST under BSD 3-Clause license,
  148. * the "License"; You may not use this file except in compliance with the
  149. * License. You may obtain a copy of the License at:
  150. * opensource.org/licenses/BSD-3-Clause
  151. *
  152. ******************************************************************************
  153. */
  154. /* Includes ------------------------------------------------------------------*/
  155. #include "stm32h7xx_hal.h"
  156. #ifdef HAL_I2S_MODULE_ENABLED
  157. /** @addtogroup STM32H7xx_HAL_Driver
  158. * @{
  159. */
  160. /** @defgroup I2S I2S
  161. * @brief I2S HAL module driver
  162. * @{
  163. */
  164. /* Private typedef -----------------------------------------------------------*/
  165. /* Private define ------------------------------------------------------------*/
  166. #define I2S_TIMEOUT 0xFFFFUL
  167. /* Private macro -------------------------------------------------------------*/
  168. /* Private variables ---------------------------------------------------------*/
  169. /* Private function prototypes -----------------------------------------------*/
  170. /** @defgroup I2S_Private_Functions I2S Private Functions
  171. * @{
  172. */
  173. static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
  174. static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
  175. static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
  176. static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  177. static void I2S_DMAError(DMA_HandleTypeDef *hdma);
  178. static void I2S_Transmit_16Bit_IT(I2S_HandleTypeDef *hi2s);
  179. static void I2S_Transmit_32Bit_IT(I2S_HandleTypeDef *hi2s);
  180. static void I2S_Receive_16Bit_IT(I2S_HandleTypeDef *hi2s);
  181. static void I2S_Receive_32Bit_IT(I2S_HandleTypeDef *hi2s);
  182. static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, FlagStatus State,
  183. uint32_t Timeout);
  184. /**
  185. * @}
  186. */
  187. /* Exported functions ---------------------------------------------------------*/
  188. /** @defgroup I2S_Exported_Functions I2S Exported Functions
  189. * @{
  190. */
  191. /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
  192. * @brief Initialization and Configuration functions
  193. *
  194. @verbatim
  195. ===============================================================================
  196. ##### Initialization and de-initialization functions #####
  197. ===============================================================================
  198. [..] This subsection provides a set of functions allowing to initialize and
  199. de-initialize the I2Sx peripheral in simplex mode:
  200. (+) User must Implement HAL_I2S_MspInit() function in which he configures
  201. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  202. (+) Call the function HAL_I2S_Init() to configure the selected device with
  203. the selected configuration:
  204. (++) Mode
  205. (++) Standard
  206. (++) Data Format
  207. (++) MCLK Output
  208. (++) Audio frequency
  209. (++) Polarity
  210. (+) Call the function HAL_I2S_DeInit() to restore the default configuration
  211. of the selected I2Sx peripheral.
  212. @endverbatim
  213. * @{
  214. */
  215. /**
  216. * @brief Initializes the I2S according to the specified parameters
  217. * in the I2S_InitTypeDef and create the associated handle.
  218. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  219. * the configuration information for I2S module
  220. * @retval HAL status
  221. */
  222. HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
  223. {
  224. uint32_t i2sdiv;
  225. uint32_t i2sodd;
  226. uint32_t packetlength;
  227. uint32_t tmp;
  228. uint32_t i2sclk;
  229. uint32_t ispcm;
  230. /* Check the I2S handle allocation */
  231. if (hi2s == NULL)
  232. {
  233. return HAL_ERROR;
  234. }
  235. /* Check the I2S parameters */
  236. assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
  237. assert_param(IS_I2S_MODE(hi2s->Init.Mode));
  238. assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
  239. assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
  240. assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
  241. assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
  242. assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
  243. assert_param(IS_I2S_FIRST_BIT(hi2s->Init.FirstBit));
  244. assert_param(IS_I2S_WS_INVERSION(hi2s->Init.WSInversion));
  245. assert_param(IS_I2S_DATA_24BIT_ALIGNMENT(hi2s->Init.Data24BitAlignment));
  246. assert_param(IS_I2S_MASTER_KEEP_IO_STATE(hi2s->Init.MasterKeepIOState));
  247. if (hi2s->State == HAL_I2S_STATE_RESET)
  248. {
  249. /* Allocate lock resource and initialize it */
  250. hi2s->Lock = HAL_UNLOCKED;
  251. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  252. /* Init the I2S Callback settings */
  253. hi2s->TxCpltCallback = HAL_I2S_TxCpltCallback; /* Legacy weak TxCpltCallback */
  254. hi2s->RxCpltCallback = HAL_I2S_RxCpltCallback; /* Legacy weak RxCpltCallback */
  255. hi2s->TxHalfCpltCallback = HAL_I2S_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
  256. hi2s->RxHalfCpltCallback = HAL_I2S_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
  257. hi2s->ErrorCallback = HAL_I2S_ErrorCallback; /* Legacy weak ErrorCallback */
  258. if (hi2s->MspInitCallback == NULL)
  259. {
  260. hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
  261. }
  262. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  263. hi2s->MspInitCallback(hi2s);
  264. #else
  265. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  266. HAL_I2S_MspInit(hi2s);
  267. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  268. }
  269. hi2s->State = HAL_I2S_STATE_BUSY;
  270. /* Disable the selected I2S peripheral */
  271. if ((hi2s->Instance->CR1 & SPI_CR1_SPE) == SPI_CR1_SPE)
  272. {
  273. /* Disable I2S peripheral */
  274. __HAL_I2S_DISABLE(hi2s);
  275. }
  276. /* Clear I2S configuration register */
  277. CLEAR_REG(hi2s->Instance->I2SCFGR);
  278. if (IS_I2S_MASTER(hi2s->Init.Mode))
  279. {
  280. /*------------------------- I2SDIV and ODD Calculation ---------------------*/
  281. /* If the requested audio frequency is not the default, compute the prescaler */
  282. if (hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
  283. {
  284. /* Check the frame length (For the Prescaler computing) ********************/
  285. if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
  286. {
  287. /* Channel length is 32 bits */
  288. packetlength = 2UL;
  289. }
  290. else
  291. {
  292. /* Channel length is 16 bits */
  293. packetlength = 1UL;
  294. }
  295. /* Check if PCM standard is used */
  296. if ((hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT) ||
  297. (hi2s->Init.Standard == I2S_STANDARD_PCM_LONG))
  298. {
  299. ispcm = 1UL;
  300. }
  301. else
  302. {
  303. ispcm = 0UL;
  304. }
  305. /* Get the source clock value: based on System Clock value */
  306. #if defined (SPI_SPI6I2S_SUPPORT)
  307. if (hi2s->Instance == SPI6)
  308. {
  309. /* SPI6 source clock */
  310. i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI6);
  311. }
  312. else
  313. {
  314. /* SPI1,SPI2 and SPI3 share the same source clock */
  315. i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI123);
  316. }
  317. #else
  318. /* SPI1,SPI2 and SPI3 share the same source clock */
  319. i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI123);
  320. #endif
  321. /* Compute the Real divider depending on the MCLK output state, with a floating point */
  322. if (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
  323. {
  324. /* MCLK output is enabled */
  325. tmp = (uint32_t)((((i2sclk / (256UL >> ispcm)) * 10UL) / hi2s->Init.AudioFreq) + 5UL);
  326. }
  327. else
  328. {
  329. /* MCLK output is disabled */
  330. tmp = (uint32_t)((((i2sclk / ((32UL >> ispcm) * packetlength)) * 10UL) / hi2s->Init.AudioFreq) + 5UL);
  331. }
  332. /* Remove the flatting point */
  333. tmp = tmp / 10UL;
  334. /* Check the parity of the divider */
  335. i2sodd = (uint32_t)(tmp & (uint32_t)1UL);
  336. /* Compute the i2sdiv prescaler */
  337. i2sdiv = (uint32_t)((tmp - i2sodd) / 2UL);
  338. }
  339. else
  340. {
  341. /* Set the default values */
  342. i2sdiv = 2UL;
  343. i2sodd = 0UL;
  344. }
  345. /* Test if the obtain values are forbidden or out of range */
  346. if (((i2sodd == 1UL) && (i2sdiv == 1UL)) || (i2sdiv > 0xFFUL))
  347. {
  348. /* Set the error code */
  349. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
  350. return HAL_ERROR;
  351. }
  352. /* Force i2smod to 1 just to be sure that (2xi2sdiv + i2sodd) is always higher than 0 */
  353. if (i2sdiv == 0UL)
  354. {
  355. i2sodd = 1UL;
  356. }
  357. MODIFY_REG(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_I2SDIV | SPI_I2SCFGR_ODD),
  358. ((i2sdiv << SPI_I2SCFGR_I2SDIV_Pos) | (i2sodd << SPI_I2SCFGR_ODD_Pos)));
  359. }
  360. /*-------------------------- I2Sx I2SCFGR Configuration --------------------*/
  361. /* Configure I2SMOD, I2SCFG, I2SSTD, PCMSYNC, DATLEN ,CHLEN ,CKPOL, WSINV, DATAFMT, I2SDIV, ODD and MCKOE bits bits */
  362. /* And configure the I2S with the I2S_InitStruct values */
  363. MODIFY_REG(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SCFG | \
  364. SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | \
  365. SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN | \
  366. SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_WSINV | \
  367. SPI_I2SCFGR_DATFMT | SPI_I2SCFGR_MCKOE),
  368. (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | \
  369. hi2s->Init.Standard | hi2s->Init.DataFormat | \
  370. hi2s->Init.CPOL | hi2s->Init.WSInversion | \
  371. hi2s->Init.Data24BitAlignment | hi2s->Init.MCLKOutput));
  372. /*Clear status register*/
  373. WRITE_REG(hi2s->Instance->IFCR, 0x0FF8);
  374. /*---------------------------- I2Sx CFG2 Configuration ----------------------*/
  375. /* Unlock the AF configuration to configure CFG2 register*/
  376. CLEAR_BIT(hi2s->Instance->CR1, SPI_CR1_IOLOCK);
  377. MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_LSBFRST, hi2s->Init.FirstBit);
  378. /* Insure that AFCNTR is managed only by Master */
  379. if (IS_I2S_MASTER(hi2s->Init.Mode))
  380. {
  381. /* Alternate function GPIOs control */
  382. MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_AFCNTR, (hi2s->Init.MasterKeepIOState));
  383. }
  384. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  385. hi2s->State = HAL_I2S_STATE_READY;
  386. return HAL_OK;
  387. }
  388. /**
  389. * @brief DeInitializes the I2S peripheral
  390. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  391. * the configuration information for I2S module
  392. * @retval HAL status
  393. */
  394. HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
  395. {
  396. /* Check the I2S handle allocation */
  397. if (hi2s == NULL)
  398. {
  399. return HAL_ERROR;
  400. }
  401. /* Check the parameters */
  402. assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
  403. hi2s->State = HAL_I2S_STATE_BUSY;
  404. /* Disable the I2S Peripheral Clock */
  405. __HAL_I2S_DISABLE(hi2s);
  406. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  407. if (hi2s->MspDeInitCallback == NULL)
  408. {
  409. hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
  410. }
  411. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  412. hi2s->MspDeInitCallback(hi2s);
  413. #else
  414. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  415. HAL_I2S_MspDeInit(hi2s);
  416. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  417. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  418. hi2s->State = HAL_I2S_STATE_RESET;
  419. /* Release Lock */
  420. __HAL_UNLOCK(hi2s);
  421. return HAL_OK;
  422. }
  423. /**
  424. * @brief I2S MSP Init
  425. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  426. * the configuration information for I2S module
  427. * @retval None
  428. */
  429. __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
  430. {
  431. /* Prevent unused argument(s) compilation warning */
  432. UNUSED(hi2s);
  433. /* NOTE : This function Should not be modified, when the callback is needed,
  434. the HAL_I2S_MspInit could be implemented in the user file
  435. */
  436. }
  437. /**
  438. * @brief I2S MSP DeInit
  439. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  440. * the configuration information for I2S module
  441. * @retval None
  442. */
  443. __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
  444. {
  445. /* Prevent unused argument(s) compilation warning */
  446. UNUSED(hi2s);
  447. /* NOTE : This function Should not be modified, when the callback is needed,
  448. the HAL_I2S_MspDeInit could be implemented in the user file
  449. */
  450. }
  451. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  452. /**
  453. * @brief Register a User I2S Callback
  454. * To be used instead of the weak predefined callback
  455. * @param hi2s Pointer to a I2S_HandleTypeDef structure that contains
  456. * the configuration information for the specified I2S.
  457. * @param CallbackID ID of the callback to be registered
  458. * @param pCallback pointer to the Callback function
  459. * @retval HAL status
  460. */
  461. HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback)
  462. {
  463. HAL_StatusTypeDef status = HAL_OK;
  464. if (pCallback == NULL)
  465. {
  466. /* Update the error code */
  467. hi2s->ErrorCode |= HAL_I2S_ERROR_INVALID_CALLBACK;
  468. return HAL_ERROR;
  469. }
  470. /* Process locked */
  471. __HAL_LOCK(hi2s);
  472. if (HAL_I2S_STATE_READY == hi2s->State)
  473. {
  474. switch (CallbackID)
  475. {
  476. case HAL_I2S_TX_COMPLETE_CB_ID :
  477. hi2s->TxCpltCallback = pCallback;
  478. break;
  479. case HAL_I2S_RX_COMPLETE_CB_ID :
  480. hi2s->RxCpltCallback = pCallback;
  481. break;
  482. case HAL_I2S_TX_HALF_COMPLETE_CB_ID :
  483. hi2s->TxHalfCpltCallback = pCallback;
  484. break;
  485. case HAL_I2S_RX_HALF_COMPLETE_CB_ID :
  486. hi2s->RxHalfCpltCallback = pCallback;
  487. break;
  488. case HAL_I2S_ERROR_CB_ID :
  489. hi2s->ErrorCallback = pCallback;
  490. break;
  491. case HAL_I2S_MSPINIT_CB_ID :
  492. hi2s->MspInitCallback = pCallback;
  493. break;
  494. case HAL_I2S_MSPDEINIT_CB_ID :
  495. hi2s->MspDeInitCallback = pCallback;
  496. break;
  497. default :
  498. /* Update the error code */
  499. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  500. /* Return error status */
  501. status = HAL_ERROR;
  502. break;
  503. }
  504. }
  505. else if (HAL_I2S_STATE_RESET == hi2s->State)
  506. {
  507. switch (CallbackID)
  508. {
  509. case HAL_I2S_MSPINIT_CB_ID :
  510. hi2s->MspInitCallback = pCallback;
  511. break;
  512. case HAL_I2S_MSPDEINIT_CB_ID :
  513. hi2s->MspDeInitCallback = pCallback;
  514. break;
  515. default :
  516. /* Update the error code */
  517. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  518. /* Return error status */
  519. status = HAL_ERROR;
  520. break;
  521. }
  522. }
  523. else
  524. {
  525. /* Update the error code */
  526. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  527. /* Return error status */
  528. status = HAL_ERROR;
  529. }
  530. /* Release Lock */
  531. __HAL_UNLOCK(hi2s);
  532. return status;
  533. }
  534. /**
  535. * @brief Unregister an I2S Callback
  536. * I2S callback is redirected to the weak predefined callback
  537. * @param hi2s Pointer to a I2S_HandleTypeDef structure that contains
  538. * the configuration information for the specified I2S.
  539. * @param CallbackID ID of the callback to be unregistered
  540. * @retval HAL status
  541. */
  542. HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID)
  543. {
  544. HAL_StatusTypeDef status = HAL_OK;
  545. /* Process locked */
  546. __HAL_LOCK(hi2s);
  547. if (HAL_I2S_STATE_READY == hi2s->State)
  548. {
  549. switch (CallbackID)
  550. {
  551. case HAL_I2S_TX_COMPLETE_CB_ID :
  552. hi2s->TxCpltCallback = HAL_I2S_TxCpltCallback; /* Legacy weak TxCpltCallback */
  553. break;
  554. case HAL_I2S_RX_COMPLETE_CB_ID :
  555. hi2s->RxCpltCallback = HAL_I2S_RxCpltCallback; /* Legacy weak RxCpltCallback */
  556. break;
  557. case HAL_I2S_TX_HALF_COMPLETE_CB_ID :
  558. hi2s->TxHalfCpltCallback = HAL_I2S_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
  559. break;
  560. case HAL_I2S_RX_HALF_COMPLETE_CB_ID :
  561. hi2s->RxHalfCpltCallback = HAL_I2S_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
  562. break;
  563. case HAL_I2S_ERROR_CB_ID :
  564. hi2s->ErrorCallback = HAL_I2S_ErrorCallback; /* Legacy weak ErrorCallback */
  565. break;
  566. case HAL_I2S_MSPINIT_CB_ID :
  567. hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
  568. break;
  569. case HAL_I2S_MSPDEINIT_CB_ID :
  570. hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
  571. break;
  572. default :
  573. /* Update the error code */
  574. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  575. /* Return error status */
  576. status = HAL_ERROR;
  577. break;
  578. }
  579. }
  580. else if (HAL_I2S_STATE_RESET == hi2s->State)
  581. {
  582. switch (CallbackID)
  583. {
  584. case HAL_I2S_MSPINIT_CB_ID :
  585. hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
  586. break;
  587. case HAL_I2S_MSPDEINIT_CB_ID :
  588. hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
  589. break;
  590. default :
  591. /* Update the error code */
  592. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  593. /* Return error status */
  594. status = HAL_ERROR;
  595. break;
  596. }
  597. }
  598. else
  599. {
  600. /* Update the error code */
  601. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
  602. /* Return error status */
  603. status = HAL_ERROR;
  604. }
  605. /* Release Lock */
  606. __HAL_UNLOCK(hi2s);
  607. return status;
  608. }
  609. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  610. /**
  611. * @}
  612. */
  613. /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
  614. * @brief Data transfers functions
  615. *
  616. @verbatim
  617. ===============================================================================
  618. ##### IO operation functions #####
  619. ===============================================================================
  620. [..]
  621. This subsection provides a set of functions allowing to manage the I2S data
  622. transfers.
  623. (#) There are two modes of transfer:
  624. (++) Blocking mode : The communication is performed in the polling mode.
  625. The status of all data processing is returned by the same function
  626. after finishing transfer.
  627. (++) No-Blocking mode : The communication is performed using Interrupts
  628. or DMA. These functions return the status of the transfer startup.
  629. The end of the data processing will be indicated through the
  630. dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
  631. using DMA mode.
  632. (#) Blocking mode functions are :
  633. (++) HAL_I2S_Transmit()
  634. (++) HAL_I2S_Receive()
  635. (#) No-Blocking mode functions with Interrupt are :
  636. (++) HAL_I2S_Transmit_IT()
  637. (++) HAL_I2S_Receive_IT()
  638. (#) No-Blocking mode functions with DMA are :
  639. (++) HAL_I2S_Transmit_DMA()
  640. (++) HAL_I2S_Receive_DMA()
  641. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  642. (++) HAL_I2S_TxCpltCallback()
  643. (++) HAL_I2S_RxCpltCallback()
  644. (++) HAL_I2S_ErrorCallback()
  645. @endverbatim
  646. * @{
  647. */
  648. /**
  649. * @brief Transmit an amount of data in blocking mode
  650. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  651. * the configuration information for I2S module
  652. * @param pData a 16-bit pointer to data buffer.
  653. * @param Size number of data sample to be sent:
  654. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  655. * configuration phase, the Size parameter means the number of 16-bit data length
  656. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  657. * the Size parameter means the number of 16-bit data length.
  658. * @param Timeout Timeout duration
  659. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  660. * between Master and Slave(example: audio streaming).
  661. * @retval HAL status
  662. */
  663. HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  664. {
  665. #if defined (__GNUC__)
  666. __IO uint16_t *ptxdr_16bits = (__IO uint16_t *)(&(hi2s->Instance->TXDR));
  667. #endif /* __GNUC__ */
  668. if ((pData == NULL) || (Size == 0UL))
  669. {
  670. return HAL_ERROR;
  671. }
  672. /* Process Locked */
  673. __HAL_LOCK(hi2s);
  674. if (hi2s->State != HAL_I2S_STATE_READY)
  675. {
  676. __HAL_UNLOCK(hi2s);
  677. return HAL_BUSY;
  678. }
  679. /* Set state and reset error code */
  680. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  681. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  682. hi2s->pTxBuffPtr = pData;
  683. hi2s->TxXferSize = Size;
  684. hi2s->TxXferCount = Size;
  685. /* Initialize fields not used in handle to zero */
  686. hi2s->pRxBuffPtr = NULL;
  687. hi2s->RxXferSize = (uint16_t) 0UL;
  688. hi2s->RxXferCount = (uint16_t) 0UL;
  689. /* Check if the I2S is already enabled */
  690. if ((hi2s->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  691. {
  692. /* Enable I2S peripheral */
  693. __HAL_I2S_ENABLE(hi2s);
  694. }
  695. /* Start the transfer */
  696. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  697. /* Wait until TXP flag is set */
  698. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXP, SET, Timeout) != HAL_OK)
  699. {
  700. /* Set the error code */
  701. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
  702. hi2s->State = HAL_I2S_STATE_READY;
  703. __HAL_UNLOCK(hi2s);
  704. return HAL_ERROR;
  705. }
  706. while (hi2s->TxXferCount > 0UL)
  707. {
  708. if ((hi2s->Init.DataFormat == I2S_DATAFORMAT_24B) || (hi2s->Init.DataFormat == I2S_DATAFORMAT_32B))
  709. {
  710. /* Transmit data in 32 Bit mode */
  711. hi2s->Instance->TXDR = *((uint32_t *)hi2s->pTxBuffPtr);
  712. hi2s->pTxBuffPtr += 2;
  713. hi2s->TxXferCount--;
  714. }
  715. else
  716. {
  717. /* Transmit data in 16 Bit mode */
  718. #if defined (__GNUC__)
  719. *ptxdr_16bits = *((uint16_t *)hi2s->pTxBuffPtr);
  720. #else
  721. *((__IO uint16_t *)&hi2s->Instance->TXDR) = *((uint16_t *)hi2s->pTxBuffPtr);
  722. #endif /* __GNUC__ */
  723. hi2s->pTxBuffPtr++;
  724. hi2s->TxXferCount--;
  725. }
  726. /* Wait until TXP flag is set */
  727. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXP, SET, Timeout) != HAL_OK)
  728. {
  729. /* Set the error code */
  730. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
  731. hi2s->State = HAL_I2S_STATE_READY;
  732. __HAL_UNLOCK(hi2s);
  733. return HAL_ERROR;
  734. }
  735. /* Check if an underrun occurs */
  736. if (__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
  737. {
  738. /* Clear underrun flag */
  739. __HAL_I2S_CLEAR_UDRFLAG(hi2s);
  740. /* Set the error code */
  741. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
  742. }
  743. }
  744. hi2s->State = HAL_I2S_STATE_READY;
  745. __HAL_UNLOCK(hi2s);
  746. return HAL_OK;
  747. }
  748. /**
  749. * @brief Receive an amount of data in blocking mode
  750. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  751. * the configuration information for I2S module
  752. * @param pData a 16-bit pointer to data buffer.
  753. * @param Size number of data sample to be sent:
  754. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  755. * configuration phase, the Size parameter means the number of 16-bit data length
  756. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  757. * the Size parameter means the number of 16-bit data length.
  758. * @param Timeout Timeout duration
  759. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  760. * between Master and Slave(example: audio streaming).
  761. * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
  762. * in continuous way and as the I2S is not disabled at the end of the I2S transaction.
  763. * @retval HAL status
  764. */
  765. HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  766. {
  767. #if defined (__GNUC__)
  768. __IO uint16_t *prxdr_16bits = (__IO uint16_t *)(&(hi2s->Instance->RXDR));
  769. #endif /* __GNUC__ */
  770. if ((pData == NULL) || (Size == 0UL))
  771. {
  772. return HAL_ERROR;
  773. }
  774. /* Process Locked */
  775. __HAL_LOCK(hi2s);
  776. if (hi2s->State != HAL_I2S_STATE_READY)
  777. {
  778. __HAL_UNLOCK(hi2s);
  779. return HAL_BUSY;
  780. }
  781. /* Set state and reset error code */
  782. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  783. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  784. hi2s->pRxBuffPtr = pData;
  785. hi2s->RxXferSize = Size;
  786. hi2s->RxXferCount = Size;
  787. /* Initialize fields not used in handle to zero */
  788. hi2s->pTxBuffPtr = NULL;
  789. hi2s->TxXferSize = (uint16_t) 0UL;
  790. hi2s->TxXferCount = (uint16_t) 0UL;
  791. /* Check if the I2S is already enabled */
  792. if ((hi2s->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  793. {
  794. /* Enable I2S peripheral */
  795. __HAL_I2S_ENABLE(hi2s);
  796. }
  797. /* Start the transfer */
  798. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  799. /* Receive data */
  800. while (hi2s->RxXferCount > 0UL)
  801. {
  802. /* Wait until RXNE flag is set */
  803. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXP, SET, Timeout) != HAL_OK)
  804. {
  805. /* Set the error code */
  806. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
  807. hi2s->State = HAL_I2S_STATE_READY;
  808. __HAL_UNLOCK(hi2s);
  809. return HAL_ERROR;
  810. }
  811. if ((hi2s->Init.DataFormat == I2S_DATAFORMAT_24B) || (hi2s->Init.DataFormat == I2S_DATAFORMAT_32B))
  812. {
  813. /* Receive data in 32 Bit mode */
  814. *((uint32_t *)hi2s->pRxBuffPtr) = hi2s->Instance->RXDR;
  815. hi2s->pRxBuffPtr += 2;
  816. hi2s->RxXferCount--;
  817. }
  818. else
  819. {
  820. /* Receive data in 16 Bit mode */
  821. #if defined (__GNUC__)
  822. *((uint16_t *)hi2s->pRxBuffPtr) = *prxdr_16bits;
  823. #else
  824. *((uint16_t *)hi2s->pRxBuffPtr) = *((__IO uint16_t *)&hi2s->Instance->RXDR);
  825. #endif /* __GNUC__ */
  826. hi2s->pRxBuffPtr++;
  827. hi2s->RxXferCount--;
  828. }
  829. /* Check if an overrun occurs */
  830. if (__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
  831. {
  832. /* Clear overrun flag */
  833. __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  834. /* Set the error code */
  835. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
  836. }
  837. }
  838. hi2s->State = HAL_I2S_STATE_READY;
  839. __HAL_UNLOCK(hi2s);
  840. return HAL_OK;
  841. }
  842. /**
  843. * @brief Transmit an amount of data in non-blocking mode with Interrupt
  844. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  845. * the configuration information for I2S module
  846. * @param pData a 16-bit pointer to data buffer.
  847. * @param Size number of data sample to be sent:
  848. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  849. * configuration phase, the Size parameter means the number of 16-bit data length
  850. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  851. * the Size parameter means the number of 16-bit data length.
  852. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  853. * between Master and Slave(example: audio streaming).
  854. * @retval HAL status
  855. */
  856. HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  857. {
  858. if ((pData == NULL) || (Size == 0UL))
  859. {
  860. return HAL_ERROR;
  861. }
  862. /* Process Locked */
  863. __HAL_LOCK(hi2s);
  864. if (hi2s->State != HAL_I2S_STATE_READY)
  865. {
  866. __HAL_UNLOCK(hi2s);
  867. return HAL_BUSY;
  868. }
  869. /* Set state and reset error code */
  870. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  871. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  872. hi2s->pTxBuffPtr = (uint16_t *)pData;
  873. hi2s->TxXferSize = Size;
  874. hi2s->TxXferCount = Size;
  875. /* Initialize fields not used in handle to zero */
  876. hi2s->pRxBuffPtr = NULL;
  877. hi2s->RxXferSize = (uint16_t) 0UL;
  878. hi2s->RxXferCount = (uint16_t) 0UL;
  879. /* Set the function for IT treatment */
  880. if ((hi2s->Init.DataFormat == I2S_DATAFORMAT_24B) || (hi2s->Init.DataFormat == I2S_DATAFORMAT_32B))
  881. {
  882. hi2s->TxISR = I2S_Transmit_32Bit_IT;
  883. }
  884. else
  885. {
  886. hi2s->TxISR = I2S_Transmit_16Bit_IT;
  887. }
  888. /* Check if the I2S is already enabled */
  889. if ((hi2s->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  890. {
  891. /* Enable I2S peripheral */
  892. __HAL_I2S_ENABLE(hi2s);
  893. }
  894. /* Enable TXP and UDR interrupt */
  895. __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXP | I2S_IT_UDR));
  896. /* Enable TIFRE interrupt if the mode is Slave */
  897. if (hi2s->Init.Mode == I2S_MODE_SLAVE_TX)
  898. {
  899. __HAL_I2S_ENABLE_IT(hi2s, I2S_IT_FRE);
  900. }
  901. /* Start the transfer */
  902. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  903. __HAL_UNLOCK(hi2s);
  904. return HAL_OK;
  905. }
  906. /**
  907. * @brief Receive an amount of data in non-blocking mode with Interrupt
  908. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  909. * the configuration information for I2S module
  910. * @param pData a 16-bit pointer to the Receive data buffer.
  911. * @param Size number of data sample to be sent:
  912. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  913. * configuration phase, the Size parameter means the number of 16-bit data length
  914. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  915. * the Size parameter means the number of 16-bit data length.
  916. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  917. * between Master and Slave(example: audio streaming).
  918. * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronization
  919. * between Master and Slave otherwise the I2S interrupt should be optimized.
  920. * @retval HAL status
  921. */
  922. HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  923. {
  924. if ((pData == NULL) || (Size == 0UL))
  925. {
  926. return HAL_ERROR;
  927. }
  928. /* Process Locked */
  929. __HAL_LOCK(hi2s);
  930. if (hi2s->State != HAL_I2S_STATE_READY)
  931. {
  932. __HAL_UNLOCK(hi2s);
  933. return HAL_BUSY;
  934. }
  935. /* Set state and reset error code */
  936. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  937. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  938. hi2s->pRxBuffPtr = pData;
  939. hi2s->RxXferSize = Size;
  940. hi2s->RxXferCount = Size;
  941. /* Initialize fields not used in handle to zero */
  942. hi2s->pTxBuffPtr = NULL;
  943. hi2s->TxXferSize = (uint16_t) 0UL;
  944. hi2s->TxXferCount = (uint16_t) 0UL;
  945. /* Set the function for IT treatment */
  946. if ((hi2s->Init.DataFormat == I2S_DATAFORMAT_24B) || (hi2s->Init.DataFormat == I2S_DATAFORMAT_32B))
  947. {
  948. hi2s->RxISR = I2S_Receive_32Bit_IT;
  949. }
  950. else
  951. {
  952. hi2s->RxISR = I2S_Receive_16Bit_IT;
  953. }
  954. /* Check if the I2S is already enabled */
  955. if ((hi2s->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  956. {
  957. /* Enable I2S peripheral */
  958. __HAL_I2S_ENABLE(hi2s);
  959. }
  960. /* Enable RXNE and ERR interrupt */
  961. __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXP | I2S_IT_OVR));
  962. /* Enable TIFRE interrupt if the mode is Slave */
  963. if (hi2s->Init.Mode == I2S_MODE_SLAVE_RX)
  964. {
  965. __HAL_I2S_ENABLE_IT(hi2s, I2S_IT_FRE);
  966. }
  967. /* Start the transfer */
  968. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  969. __HAL_UNLOCK(hi2s);
  970. return HAL_OK;
  971. }
  972. /**
  973. * @brief Transmit an amount of data in non-blocking mode with DMA
  974. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  975. * the configuration information for I2S module
  976. * @param pData a 16-bit pointer to the Transmit data buffer.
  977. * @param Size number of data sample to be sent:
  978. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  979. * configuration phase, the Size parameter means the number of 16-bit data length
  980. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  981. * the Size parameter means the number of 16-bit data length.
  982. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  983. * between Master and Slave(example: audio streaming).
  984. * @retval HAL status
  985. */
  986. HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  987. {
  988. if ((pData == NULL) || (Size == 0UL))
  989. {
  990. return HAL_ERROR;
  991. }
  992. /* Process Locked */
  993. __HAL_LOCK(hi2s);
  994. if (hi2s->State != HAL_I2S_STATE_READY)
  995. {
  996. __HAL_UNLOCK(hi2s);
  997. return HAL_BUSY;
  998. }
  999. /* Set state and reset error code */
  1000. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  1001. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  1002. hi2s->pTxBuffPtr = pData;
  1003. hi2s->TxXferSize = Size;
  1004. hi2s->TxXferCount = Size;
  1005. /* Init field not used in handle to zero */
  1006. hi2s->pRxBuffPtr = NULL;
  1007. hi2s->RxXferSize = (uint16_t)0UL;
  1008. hi2s->RxXferCount = (uint16_t)0UL;
  1009. /* Set the I2S Tx DMA Half transfer complete callback */
  1010. hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
  1011. /* Set the I2S Tx DMA transfer complete callback */
  1012. hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
  1013. /* Set the DMA error callback */
  1014. hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
  1015. /* Enable the Tx DMA Stream/Channel */
  1016. if (HAL_OK != HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->TXDR, hi2s->TxXferSize))
  1017. {
  1018. /* Update SPI error code */
  1019. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
  1020. hi2s->State = HAL_I2S_STATE_READY;
  1021. __HAL_UNLOCK(hi2s);
  1022. return HAL_ERROR;
  1023. }
  1024. /* Check if the I2S Tx request is already enabled */
  1025. if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN))
  1026. {
  1027. /* Enable Tx DMA Request */
  1028. SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN);
  1029. }
  1030. /* Check if the I2S is already enabled */
  1031. if (HAL_IS_BIT_CLR(hi2s->Instance->CR1, SPI_CR1_SPE))
  1032. {
  1033. /* Enable I2S peripheral */
  1034. __HAL_I2S_ENABLE(hi2s);
  1035. }
  1036. /* Start the transfer */
  1037. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  1038. __HAL_UNLOCK(hi2s);
  1039. return HAL_OK;
  1040. }
  1041. /**
  1042. * @brief Receive an amount of data in non-blocking mode with DMA
  1043. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1044. * the configuration information for I2S module
  1045. * @param pData a 16-bit pointer to the Receive data buffer.
  1046. * @param Size number of data sample to be sent:
  1047. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  1048. * configuration phase, the Size parameter means the number of 16-bit data length
  1049. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  1050. * the Size parameter means the number of 16-bit data length.
  1051. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  1052. * between Master and Slave(example: audio streaming).
  1053. * @retval HAL status
  1054. */
  1055. HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  1056. {
  1057. if ((pData == NULL) || (Size == 0UL))
  1058. {
  1059. return HAL_ERROR;
  1060. }
  1061. /* Process Locked */
  1062. __HAL_LOCK(hi2s);
  1063. if (hi2s->State != HAL_I2S_STATE_READY)
  1064. {
  1065. __HAL_UNLOCK(hi2s);
  1066. return HAL_BUSY;
  1067. }
  1068. /* Set state and reset error code */
  1069. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  1070. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  1071. hi2s->pRxBuffPtr = pData;
  1072. hi2s->RxXferSize = Size;
  1073. hi2s->RxXferCount = Size;
  1074. /* Init field not used in handle to zero */
  1075. hi2s->pTxBuffPtr = NULL;
  1076. hi2s->TxXferSize = (uint16_t)0UL;
  1077. hi2s->TxXferCount = (uint16_t)0UL;
  1078. /* Set the I2S Rx DMA Half transfer complete callback */
  1079. hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
  1080. /* Set the I2S Rx DMA transfer complete callback */
  1081. hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
  1082. /* Set the DMA error callback */
  1083. hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
  1084. /* Enable the Rx DMA Stream/Channel */
  1085. if (HAL_OK != HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->RXDR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize))
  1086. {
  1087. /* Update SPI error code */
  1088. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
  1089. hi2s->State = HAL_I2S_STATE_READY;
  1090. __HAL_UNLOCK(hi2s);
  1091. return HAL_ERROR;
  1092. }
  1093. /* Check if the I2S Rx request is already enabled */
  1094. if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN))
  1095. {
  1096. /* Enable Rx DMA Request */
  1097. SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN);
  1098. }
  1099. /* Check if the I2S is already enabled */
  1100. if (HAL_IS_BIT_CLR(hi2s->Instance->CR1, SPI_CR1_SPE))
  1101. {
  1102. /* Enable I2S peripheral */
  1103. __HAL_I2S_ENABLE(hi2s);
  1104. }
  1105. /* Start the transfer */
  1106. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  1107. __HAL_UNLOCK(hi2s);
  1108. return HAL_OK;
  1109. }
  1110. /**
  1111. * @brief Pauses the audio DMA Stream/Channel playing from the Media.
  1112. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1113. * the configuration information for I2S module
  1114. * @retval HAL status
  1115. */
  1116. HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
  1117. {
  1118. /* Process Locked */
  1119. __HAL_LOCK(hi2s);
  1120. uint32_t tickstart;
  1121. /* Get tick */
  1122. tickstart = HAL_GetTick();
  1123. /* Check if the I2S peripheral is in master mode */
  1124. if (IS_I2S_MASTER(hi2s->Init.Mode))
  1125. {
  1126. /* Check if there is a transfer on-going */
  1127. if (HAL_IS_BIT_SET(hi2s->Instance->CR1, SPI_CR1_CSTART) == 0UL)
  1128. {
  1129. /* Set error code to no on going transfer */
  1130. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_NO_OGT);
  1131. hi2s->State = HAL_I2S_STATE_READY;
  1132. __HAL_UNLOCK(hi2s);
  1133. return HAL_ERROR;
  1134. }
  1135. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSUSP);
  1136. while (HAL_IS_BIT_SET(hi2s->Instance->CR1, SPI_CR1_CSTART) != 0UL)
  1137. {
  1138. if ((((HAL_GetTick() - tickstart) >= I2S_TIMEOUT) && (I2S_TIMEOUT != HAL_MAX_DELAY)) || (I2S_TIMEOUT == 0U))
  1139. {
  1140. /* Set the I2S State ready */
  1141. hi2s->State = HAL_I2S_STATE_READY;
  1142. /* Process Unlocked */
  1143. __HAL_UNLOCK(hi2s);
  1144. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
  1145. hi2s->State = HAL_I2S_STATE_READY;
  1146. return HAL_TIMEOUT;
  1147. }
  1148. }
  1149. /* Disable I2S peripheral */
  1150. __HAL_I2S_DISABLE(hi2s);
  1151. hi2s->State = HAL_I2S_STATE_READY;
  1152. /* Process Unlocked */
  1153. __HAL_UNLOCK(hi2s);
  1154. return HAL_OK;
  1155. }
  1156. else
  1157. {
  1158. /* Set error code to not supported */
  1159. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_NOT_SUPPORTED);
  1160. hi2s->State = HAL_I2S_STATE_READY;
  1161. /* Process Unlocked */
  1162. __HAL_UNLOCK(hi2s);
  1163. return HAL_ERROR;
  1164. }
  1165. }
  1166. /**
  1167. * @brief Resumes the audio DMA Stream/Channel playing from the Media.
  1168. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1169. * the configuration information for I2S module
  1170. * @retval HAL status
  1171. */
  1172. HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
  1173. {
  1174. /* Process Locked */
  1175. __HAL_LOCK(hi2s);
  1176. if (hi2s->State != HAL_I2S_STATE_READY)
  1177. {
  1178. hi2s->State = HAL_I2S_STATE_READY;
  1179. __HAL_UNLOCK(hi2s);
  1180. return HAL_ERROR;
  1181. }
  1182. /* Set state and reset error code */
  1183. hi2s->State = HAL_I2S_STATE_BUSY;
  1184. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  1185. /* Enable I2S peripheral */
  1186. __HAL_I2S_ENABLE(hi2s);
  1187. /* Start the transfer */
  1188. SET_BIT(hi2s->Instance->CR1, SPI_CR1_CSTART);
  1189. /* Process Unlocked */
  1190. __HAL_UNLOCK(hi2s);
  1191. return HAL_OK;
  1192. }
  1193. /**
  1194. * @brief Stops the audio DMA Stream/Channel playing from the Media.
  1195. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1196. * the configuration information for I2S module
  1197. * @retval HAL status
  1198. */
  1199. HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
  1200. {
  1201. HAL_StatusTypeDef errorcode = HAL_OK;
  1202. /* The Lock is not implemented on this API to allow the user application
  1203. to call the HAL SPI API under callbacks HAL_I2S_TxCpltCallback() or HAL_I2S_RxCpltCallback()
  1204. when calling HAL_DMA_Abort() API the DMA TX or RX Transfer complete interrupt is generated
  1205. and the correspond call back is executed HAL_I2S_TxCpltCallback() or HAL_I2S_RxCpltCallback()
  1206. */
  1207. /* Disable the I2S Tx/Rx DMA requests */
  1208. CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN);
  1209. CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN);
  1210. /* Abort the I2S DMA tx Stream/Channel */
  1211. if (hi2s->hdmatx != NULL)
  1212. {
  1213. /* Disable the I2S DMA tx Stream/Channel */
  1214. if (HAL_OK != HAL_DMA_Abort(hi2s->hdmatx))
  1215. {
  1216. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
  1217. errorcode = HAL_ERROR;
  1218. }
  1219. }
  1220. /* Abort the I2S DMA rx Stream/Channel */
  1221. if (hi2s->hdmarx != NULL)
  1222. {
  1223. /* Disable the I2S DMA rx Stream/Channel */
  1224. if (HAL_OK != HAL_DMA_Abort(hi2s->hdmarx))
  1225. {
  1226. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
  1227. errorcode = HAL_ERROR;
  1228. }
  1229. }
  1230. /* Disable I2S peripheral */
  1231. __HAL_I2S_DISABLE(hi2s);
  1232. hi2s->State = HAL_I2S_STATE_READY;
  1233. return errorcode;
  1234. }
  1235. /**
  1236. * @brief This function handles I2S interrupt request.
  1237. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1238. * the configuration information for I2S module
  1239. * @retval None
  1240. */
  1241. void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
  1242. {
  1243. uint32_t itsource = hi2s->Instance->IER;
  1244. uint32_t itflag = hi2s->Instance->SR;
  1245. uint32_t trigger = itsource & itflag;
  1246. /* I2S in mode Receiver ------------------------------------------------*/
  1247. if ((I2S_CHECK_FLAG(itflag, I2S_FLAG_OVR) == RESET) && HAL_IS_BIT_SET(trigger, I2S_FLAG_RXP))
  1248. {
  1249. hi2s->RxISR(hi2s);
  1250. }
  1251. /* I2S in mode Transmitter -----------------------------------------------*/
  1252. if ((I2S_CHECK_FLAG(itflag, I2S_FLAG_UDR) == RESET) && HAL_IS_BIT_SET(trigger, I2S_FLAG_TXP))
  1253. {
  1254. hi2s->TxISR(hi2s);
  1255. }
  1256. /* I2S interrupt error ----------------------------------------------------*/
  1257. if ((trigger & (I2S_FLAG_OVR| I2S_FLAG_UDR | I2S_FLAG_FRE)) != 0UL)
  1258. {
  1259. /* I2S Overrun error interrupt occurred ---------------------------------*/
  1260. if (I2S_CHECK_FLAG(itflag, I2S_FLAG_OVR) != RESET)
  1261. {
  1262. /* Disable RXP and ERR interrupt */
  1263. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXP | I2S_IT_ERR));
  1264. /* Set the error code and execute error callback*/
  1265. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
  1266. __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  1267. }
  1268. /* I2S Underrun error interrupt occurred --------------------------------*/
  1269. if (I2S_CHECK_FLAG(itflag, I2S_FLAG_UDR) != RESET)
  1270. {
  1271. /* Disable TXP and ERR interrupt */
  1272. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXP | I2S_IT_ERR));
  1273. /* Set the error code and execute error callback*/
  1274. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
  1275. __HAL_I2S_CLEAR_UDRFLAG(hi2s);
  1276. }
  1277. /* I2S Frame error interrupt occurred -----------------------------------*/
  1278. if (I2S_CHECK_FLAG(itflag, I2S_FLAG_FRE) != RESET)
  1279. {
  1280. /* Disable FRE and ERR interrupt */
  1281. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_FRE | I2S_IT_ERR));
  1282. /* Set the error code and execute error callback*/
  1283. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_FRE);
  1284. __HAL_I2S_CLEAR_FREFLAG(hi2s);
  1285. }
  1286. /* Set the I2S State ready */
  1287. hi2s->State = HAL_I2S_STATE_READY;
  1288. /* Call user error callback */
  1289. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1290. hi2s->ErrorCallback(hi2s);
  1291. #else
  1292. HAL_I2S_ErrorCallback(hi2s);
  1293. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1294. }
  1295. }
  1296. /**
  1297. * @brief Tx Transfer Half completed callbacks
  1298. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1299. * the configuration information for I2S module
  1300. * @retval None
  1301. */
  1302. __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1303. {
  1304. /* Prevent unused argument(s) compilation warning */
  1305. UNUSED(hi2s);
  1306. /* NOTE : This function Should not be modified, when the callback is needed,
  1307. the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
  1308. */
  1309. }
  1310. /**
  1311. * @brief Tx Transfer completed callbacks
  1312. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1313. * the configuration information for I2S module
  1314. * @retval None
  1315. */
  1316. __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
  1317. {
  1318. /* Prevent unused argument(s) compilation warning */
  1319. UNUSED(hi2s);
  1320. /* NOTE : This function Should not be modified, when the callback is needed,
  1321. the HAL_I2S_TxCpltCallback could be implemented in the user file
  1322. */
  1323. }
  1324. /**
  1325. * @brief Rx Transfer half completed callbacks
  1326. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1327. * the configuration information for I2S module
  1328. * @retval None
  1329. */
  1330. __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1331. {
  1332. /* Prevent unused argument(s) compilation warning */
  1333. UNUSED(hi2s);
  1334. /* NOTE : This function Should not be modified, when the callback is needed,
  1335. the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
  1336. */
  1337. }
  1338. /**
  1339. * @brief Rx Transfer completed callbacks
  1340. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1341. * the configuration information for I2S module
  1342. * @retval None
  1343. */
  1344. __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
  1345. {
  1346. /* Prevent unused argument(s) compilation warning */
  1347. UNUSED(hi2s);
  1348. /* NOTE : This function Should not be modified, when the callback is needed,
  1349. the HAL_I2S_RxCpltCallback could be implemented in the user file
  1350. */
  1351. }
  1352. /**
  1353. * @brief I2S error callbacks
  1354. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1355. * the configuration information for I2S module
  1356. * @retval None
  1357. */
  1358. __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
  1359. {
  1360. /* Prevent unused argument(s) compilation warning */
  1361. UNUSED(hi2s);
  1362. /* NOTE : This function Should not be modified, when the callback is needed,
  1363. the HAL_I2S_ErrorCallback could be implemented in the user file
  1364. */
  1365. }
  1366. /**
  1367. * @}
  1368. */
  1369. /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
  1370. * @brief Peripheral State functions
  1371. *
  1372. @verbatim
  1373. ===============================================================================
  1374. ##### Peripheral State and Errors functions #####
  1375. ===============================================================================
  1376. [..]
  1377. This subsection permits to get in run-time the status of the peripheral
  1378. and the data flow.
  1379. @endverbatim
  1380. * @{
  1381. */
  1382. /**
  1383. * @brief Return the I2S state
  1384. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1385. * the configuration information for I2S module
  1386. * @retval HAL state
  1387. */
  1388. HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
  1389. {
  1390. return hi2s->State;
  1391. }
  1392. /**
  1393. * @brief Return the I2S error code
  1394. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1395. * the configuration information for I2S module
  1396. * @retval I2S Error Code
  1397. */
  1398. uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
  1399. {
  1400. return hi2s->ErrorCode;
  1401. }
  1402. /**
  1403. * @}
  1404. */
  1405. /**
  1406. * @brief DMA I2S transmit process complete callback
  1407. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1408. * the configuration information for the specified DMA module.
  1409. * @retval None
  1410. */
  1411. static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
  1412. {
  1413. I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  1414. /* if DMA is configured in DMA_NORMAL Mode */
  1415. if (hdma->Init.Mode == DMA_NORMAL)
  1416. {
  1417. /* Disable Tx DMA Request */
  1418. CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN);
  1419. hi2s->TxXferCount = (uint16_t) 0UL;
  1420. hi2s->State = HAL_I2S_STATE_READY;
  1421. }
  1422. /* Call user Tx complete callback */
  1423. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1424. hi2s->TxCpltCallback(hi2s);
  1425. #else
  1426. HAL_I2S_TxCpltCallback(hi2s);
  1427. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1428. }
  1429. /**
  1430. * @brief DMA I2S transmit process half complete callback
  1431. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1432. * the configuration information for the specified DMA module.
  1433. * @retval None
  1434. */
  1435. static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
  1436. {
  1437. I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  1438. /* Call user Tx half complete callback */
  1439. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1440. hi2s->TxHalfCpltCallback(hi2s);
  1441. #else
  1442. HAL_I2S_TxHalfCpltCallback(hi2s);
  1443. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1444. }
  1445. /**
  1446. * @brief DMA I2S receive process complete callback
  1447. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1448. * the configuration information for the specified DMA module.
  1449. * @retval None
  1450. */
  1451. static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
  1452. {
  1453. I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  1454. /* if DMA is configured in DMA_NORMAL Mode */
  1455. if (hdma->Init.Mode == DMA_NORMAL)
  1456. {
  1457. /* Disable Rx DMA Request */
  1458. CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN);
  1459. hi2s->RxXferCount = (uint16_t)0UL;
  1460. hi2s->State = HAL_I2S_STATE_READY;
  1461. }
  1462. /* Call user Rx complete callback */
  1463. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1464. hi2s->RxCpltCallback(hi2s);
  1465. #else
  1466. HAL_I2S_RxCpltCallback(hi2s);
  1467. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1468. }
  1469. /**
  1470. * @brief DMA I2S receive process half complete callback
  1471. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1472. * the configuration information for the specified DMA module.
  1473. * @retval None
  1474. */
  1475. static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  1476. {
  1477. I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  1478. /* Call user Rx half complete callback */
  1479. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1480. hi2s->RxHalfCpltCallback(hi2s);
  1481. #else
  1482. HAL_I2S_RxHalfCpltCallback(hi2s);
  1483. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1484. }
  1485. /**
  1486. * @brief DMA I2S communication error callback
  1487. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1488. * the configuration information for the specified DMA module.
  1489. * @retval None
  1490. */
  1491. static void I2S_DMAError(DMA_HandleTypeDef *hdma)
  1492. {
  1493. I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
  1494. /* Disable Rx and Tx DMA Request */
  1495. CLEAR_BIT(hi2s->Instance->CFG1, (SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN));
  1496. hi2s->TxXferCount = (uint16_t) 0UL;
  1497. hi2s->RxXferCount = (uint16_t) 0UL;
  1498. hi2s->State = HAL_I2S_STATE_READY;
  1499. /* Set the error code and execute error callback*/
  1500. SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
  1501. /* Call user error callback */
  1502. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1503. hi2s->ErrorCallback(hi2s);
  1504. #else
  1505. HAL_I2S_ErrorCallback(hi2s);
  1506. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1507. }
  1508. /**
  1509. * @brief Manage the transmission 16-bit in Interrupt context
  1510. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1511. * the configuration information for I2S module
  1512. * @retval None
  1513. */
  1514. static void I2S_Transmit_16Bit_IT(I2S_HandleTypeDef *hi2s)
  1515. {
  1516. /* Transmit data */
  1517. #if defined (__GNUC__)
  1518. __IO uint16_t *ptxdr_16bits = (__IO uint16_t *)(&(hi2s->Instance->TXDR));
  1519. *ptxdr_16bits = *((uint16_t *)hi2s->pTxBuffPtr);
  1520. #else
  1521. *((__IO uint16_t *)&hi2s->Instance->TXDR) = *((uint16_t *)hi2s->pTxBuffPtr);
  1522. #endif /* __GNUC__ */
  1523. hi2s->pTxBuffPtr++;
  1524. hi2s->TxXferCount--;
  1525. if (hi2s->TxXferCount == 0UL)
  1526. {
  1527. /* Disable TXE and ERR interrupt */
  1528. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXP | I2S_IT_ERR));
  1529. hi2s->State = HAL_I2S_STATE_READY;
  1530. /* Call user Tx complete callback */
  1531. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1532. hi2s->TxCpltCallback(hi2s);
  1533. #else
  1534. HAL_I2S_TxCpltCallback(hi2s);
  1535. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1536. }
  1537. }
  1538. /**
  1539. * @brief Manage the transmission 32-bit in Interrupt context
  1540. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1541. * the configuration information for I2S module
  1542. * @retval None
  1543. */
  1544. static void I2S_Transmit_32Bit_IT(I2S_HandleTypeDef *hi2s)
  1545. {
  1546. /* Transmit data */
  1547. hi2s->Instance->TXDR = *((uint32_t *)hi2s->pTxBuffPtr);
  1548. hi2s->pTxBuffPtr += 2;
  1549. hi2s->TxXferCount--;
  1550. if (hi2s->TxXferCount == 0UL)
  1551. {
  1552. /* Disable TXE and ERR interrupt */
  1553. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXP | I2S_IT_ERR));
  1554. hi2s->State = HAL_I2S_STATE_READY;
  1555. /* Call user Tx complete callback */
  1556. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1557. hi2s->TxCpltCallback(hi2s);
  1558. #else
  1559. HAL_I2S_TxCpltCallback(hi2s);
  1560. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1561. }
  1562. }
  1563. /**
  1564. * @brief Manage the reception 16-bit in Interrupt context
  1565. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1566. * the configuration information for I2S module
  1567. * @retval None
  1568. */
  1569. static void I2S_Receive_16Bit_IT(I2S_HandleTypeDef *hi2s)
  1570. {
  1571. /* Receive data */
  1572. #if defined (__GNUC__)
  1573. __IO uint16_t *prxdr_16bits = (__IO uint16_t *)(&(hi2s->Instance->RXDR));
  1574. *((uint16_t *)hi2s->pRxBuffPtr) = *prxdr_16bits;
  1575. #else
  1576. *((uint16_t *)hi2s->pRxBuffPtr) = *((__IO uint16_t *)&hi2s->Instance->RXDR);
  1577. #endif /* __GNUC__ */
  1578. hi2s->pRxBuffPtr++;
  1579. hi2s->RxXferCount--;
  1580. if (hi2s->RxXferCount == 0UL)
  1581. {
  1582. /* Disable RXNE and ERR interrupt */
  1583. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXP | I2S_IT_ERR));
  1584. hi2s->State = HAL_I2S_STATE_READY;
  1585. /* Call user Rx complete callback */
  1586. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1587. hi2s->RxCpltCallback(hi2s);
  1588. #else
  1589. HAL_I2S_RxCpltCallback(hi2s);
  1590. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1591. }
  1592. }
  1593. /**
  1594. * @brief Manage the reception 32-bit in Interrupt context
  1595. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1596. * the configuration information for I2S module
  1597. * @retval None
  1598. */
  1599. static void I2S_Receive_32Bit_IT(I2S_HandleTypeDef *hi2s)
  1600. {
  1601. /* Receive data */
  1602. *((uint32_t *)hi2s->pRxBuffPtr) = hi2s->Instance->RXDR;
  1603. hi2s->pRxBuffPtr += 2;
  1604. hi2s->RxXferCount--;
  1605. if (hi2s->RxXferCount == 0UL)
  1606. {
  1607. /* Disable RXNE and ERR interrupt */
  1608. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXP | I2S_IT_ERR));
  1609. hi2s->State = HAL_I2S_STATE_READY;
  1610. /* Call user Rx complete callback */
  1611. #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
  1612. hi2s->RxCpltCallback(hi2s);
  1613. #else
  1614. HAL_I2S_RxCpltCallback(hi2s);
  1615. #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
  1616. }
  1617. }
  1618. /**
  1619. * @brief This function handles I2S Communication Timeout.
  1620. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1621. * the configuration information for I2S module
  1622. * @param Flag Flag checked
  1623. * @param State Value of the flag expected
  1624. * @param Timeout Duration of the timeout
  1625. * @retval HAL status
  1626. */
  1627. static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, FlagStatus State, uint32_t Timeout)
  1628. {
  1629. uint32_t tickstart;
  1630. /* Get tick */
  1631. tickstart = HAL_GetTick();
  1632. /* Wait until flag is set to status*/
  1633. while (((__HAL_I2S_GET_FLAG(hi2s, Flag)) ? SET : RESET) != State)
  1634. {
  1635. if (Timeout != HAL_MAX_DELAY)
  1636. {
  1637. if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0UL))
  1638. {
  1639. /* Set the I2S State ready */
  1640. hi2s->State = HAL_I2S_STATE_READY;
  1641. /* Process Unlocked */
  1642. __HAL_UNLOCK(hi2s);
  1643. return HAL_TIMEOUT;
  1644. }
  1645. }
  1646. }
  1647. return HAL_OK;
  1648. }
  1649. /**
  1650. * @}
  1651. */
  1652. /**
  1653. * @}
  1654. */
  1655. /**
  1656. * @}
  1657. */
  1658. #endif /* HAL_I2S_MODULE_ENABLED */
  1659. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/